889 Commits

Author SHA1 Message Date
Jakub Konka
5778077f9f
Merge pull request #12799 from joachimschmidt557/stage2-arm
stage2 ARM: introduce allocRegs mechanism and other improvements
2022-09-10 09:13:08 +02:00
Jakub Konka
485d8819b3 aarch64: update codegen to using a global index rather than local index 2022-09-10 00:57:54 +02:00
Jakub Konka
fc5a6e0e32 x86_64: combine got_load, direct_load and imports_load into linker_load MCV 2022-09-10 00:18:39 +02:00
Jakub Konka
d8f2103545 macho+coff: return index into global table from getGlobalSymbol 2022-09-09 23:30:31 +02:00
joachimschmidt557
94499898e5
stage2 ARM: implement basic array_elem_val 2022-09-09 20:26:04 +02:00
joachimschmidt557
b976997e16
stage2 ARM: implement ptr_elem_val 2022-09-09 19:17:18 +02:00
joachimschmidt557
a0a7d15142
stage2 ARM: support larger function stacks
This is done by introducing a new Mir pseudo-instruction
2022-09-09 19:17:18 +02:00
joachimschmidt557
3794f2c493
stage2 ARM: implement struct_field_val for registers 2022-09-09 19:17:18 +02:00
joachimschmidt557
25729d6155
stage2 ARM: fix multiple uses of reuseOperand
- add missing checks whether destination fits into the operand
- remove reuseOperand invocations from airIsNullPtr and similar
  functions as we need to load the operands into temporary locations
2022-09-09 19:17:18 +02:00
joachimschmidt557
261fec8036
stage2 ARM: amend implementation of various AIR instructions
- unwrap_errunion_err for registers
- unwrap_errunion_payload for registers
- ptr_slice_len_ptr for all MCValues
- ptr_slice_ptr_ptr for all MCValues
2022-09-09 19:17:17 +02:00
joachimschmidt557
e2b029e2c8
stage2 ARM: implement field_parent_ptr 2022-09-09 19:17:17 +02:00
joachimschmidt557
481bd4761a
stage2 ARM: remove remaining uses of binOp{Register,Immediate} 2022-09-09 19:17:17 +02:00
joachimschmidt557
95b8a5f157
stage2 ARM: extract remaining operations out of binOp 2022-09-09 19:17:17 +02:00
joachimschmidt557
fdb2c80bdc
stage2 ARM: extract mul, div, and mod out of binOp 2022-09-09 19:17:17 +02:00
joachimschmidt557
ed4be06883
stage2 ARM: extract add+sub from binOp
This commit also lays the groundwork for further extractions from
binOp.
2022-09-09 19:17:17 +02:00
joachimschmidt557
86dd123392
stage2 ARM: move cmp to new allocReg mechanism; remove from binOp 2022-09-09 19:17:17 +02:00
joachimschmidt557
0414ef591a
stage2 ARM: introduce allocRegs
This new register allocation mechanism which is designed to be more
generic and flexible will replace binOp.
2022-09-09 19:17:16 +02:00
joachimschmidt557
28cc363947
stage2 ARM: improve Mir representation of mov and cmp 2022-09-09 19:17:13 +02:00
Jakub Konka
56b96cd61b
Merge pull request #12772 from ziglang/coff-basic-imports
coff: implement enough of the incremental linker to pass behavior and incremental tests on Windows
2022-09-09 13:08:58 +02:00
Jakub Konka
467d69c68a x86_64: fix SystemV calling convention 2022-09-07 22:42:57 +02:00
Jakub Konka
66bad3eaaf coff: mark relocations dirty when target atoms change 2022-09-07 22:42:57 +02:00
Jakub Konka
e0167ae0e3 x86_64: allow for any index register in complex SIB encodings
This relieves register pressure, and reduce generated code size
(since now we can use the same index register for both `mov_scale_src`
and `mov_scale_dst` MIR instructions).

Fix lowering of ModRM + SIB encodings where index register is extended
- previously, we would carelessly ignore the fact generating incorrect
encodings.
2022-09-07 22:42:57 +02:00
Jakub Konka
619d82234e x86_64: clean up return registers for unspecified cc 2022-09-07 22:42:57 +02:00
Jakub Konka
28f525baa4 x86_64: handle ptr_stack_offset for blocks 2022-09-07 22:42:56 +02:00
Jakub Konka
1d57b347e9 x86_64: clean up logging 2022-09-07 22:42:56 +02:00
Jakub Konka
b9c31a8703 x86_64: refactor cond_br with canonicaliseBranches helper 2022-09-07 22:42:56 +02:00
Jakub Konka
c0e288c782 x86_64: implement canonicalising branches in switch expression 2022-09-07 22:42:56 +02:00
Jakub Konka
3a4c69c018 x86_64: implement Windows x64 calling convention 2022-09-07 22:42:56 +02:00
Jakub Konka
38573fed0b coff: fix runtime traps 2022-09-07 22:42:56 +02:00
Jakub Konka
49b1716064 coff: implement lowering unnamed consts 2022-09-07 22:42:56 +02:00
Jakub Konka
a19e6adbf9 x86_64: add support for Win64/C calling convention 2022-09-07 22:42:56 +02:00
Jakub Konka
aac4c1d3b2 coff: fix contents of IAT, and ensure codegen loads addr into reg
As far as I can see, unlike with MachO, we don't have any stubs
helper routines available and need to load a bound pointer into
a register to then call it.
2022-09-07 22:42:55 +02:00
Jakub Konka
51fba37af7 coff: add relocation for call_extern 2022-09-07 22:42:55 +02:00
Jakub Konka
a35f156cf6 coff: re-enable default entrypoint for Windows 2022-09-07 22:42:55 +02:00
Luuk de Gram
971327d6e0
wasm: fix memory leak 2022-09-07 18:53:16 +02:00
Veikka Tuominen
9ce841a0f0 stage2 llvm: implement aarch64 C ABI
... at least enough to pass all the current tests.
2022-09-04 18:46:56 +03:00
Veikka Tuominen
0f61d1f0df stage2 llvm: improve handling of i128 on Windows C ABI 2022-09-03 03:42:42 +03:00
Veikka Tuominen
b83c037f9f Sema: only ABI sized packed structs are extern compatible 2022-09-03 01:04:46 +03:00
Luuk de Gram
8627858bbc
test/link: add test for extern resolution
Adds a linker tests to verify extern/undefined symbols
representing non-functions are being resolved correctly.
2022-08-30 18:32:08 +02:00
Luuk de Gram
4f72ac265a
wasm: create relocations for extern decls
This also fixes performing relocations for data symbols
of which the target symbol exists in an external object file.
We do this by checking if the target symbol was discarded,
and if so: get the new location so that we can find the
corresponding atom that belongs to said new location. Previously
it would always assume the symbol would live in the same file
as the atom/symbol that is doing the relocation.
2022-08-30 16:38:55 +02:00
Jakub Konka
601f2147e0 coff: cleanup relocations; remove COFF support from other backends
Given that COFF will want to support PIC from ground-up, there is no
point in leaving outdated code for COFF in other backends such as
arm or aarch64. Instead, when we are ready to look into those, we
can start figuring out what to add and where.
2022-08-30 10:42:21 +02:00
Jakub Konka
f0d4ce4494 coff: add basic handling of GOT PC relative indirection 2022-08-30 10:42:21 +02:00
Jakub Konka
90b3599c68 coff: reorganize the linker 2022-08-30 10:42:21 +02:00
Andrew Kelley
7453f56e67 stage2: explicitly tagged enums no longer have one possible value
Previously, Zig had inconsistent semantics for an enum like this:

`enum(u8){zero = 0}`

Although in theory this can only hold one possible value, the tag
`zero`, Zig no longer will treat the type this way. It will do loads and
stores, as if the type has runtime bits.

Closes #12619

Tests passed locally:
 * test-behavior
 * test-cases
2022-08-24 22:20:31 -07:00
Veikka Tuominen
62ff8871ed stage2+stage1: remove type parameter from bit builtins
Closes #12529
Closes #12511
Closes #6835
2022-08-22 11:19:20 +03:00
Luuk de Gram
63c25cc1cc wasm: fix callInstrinsic return value
Rather than storing it in a local and returning that,
we now keep this on the stack as all internal functions
expect it to be on the stack already and therefore were
generating extra `local.set` instructions.
2022-08-18 14:17:01 +02:00
Veikka Tuominen
40eac90280
Merge pull request #12416 from Vexu/stage2-safety
Stage2 error set safety improvements
2022-08-15 11:32:26 +03:00
joachimschmidt557
c9d9fd53a6
stage2 ARM: add inline memcpy to genSetStack 2022-08-13 17:00:03 +02:00
joachimschmidt557
91969ad908
stage2 ARM: Fix tracking of function return values 2022-08-13 17:00:03 +02:00
joachimschmidt557
4c5156544b
stage2 ARM: pass stack arguments in opposite order
Earlier arguments have a smaller address (i.e. towards the bottom of
the stack)
2022-08-13 17:00:00 +02:00