Luuk de Gram
576bb3f0a9
wasm: de -and increment reference count locals
...
When reusing an operand it increases the reference count, then when
an operand dies it will only decrease the reference count. When
this reaches 0, the local will be virtually freed, meaning it can be
re-used for a new local.
2022-10-16 15:54:16 +02:00
Luuk de Gram
b17c8c5424
wasm: reference count locals
...
By reference counting the locals, we can ensure that when we free
a local, no local will be reused while it still has references pointing
to it. This prevents misscompilations. The compiler will also panic if
we free a local more than we reference it, introducing extra safety to
ensure they match up.
2022-10-16 15:54:16 +02:00
Luuk de Gram
b9b20b14ea
wasm: use liveness analysis for locals
...
This hooks reusal of locals into liveness analysis.
Meaning that when an operand dies, and is a local,
it will automatically be freed so it can be re-used
when a new local is required. The result of this, is
a lower allocation required for locals. Having less
locals means smaller binary size, as well as faster
compilation speed when loaded by the runtime.
2022-10-16 15:54:16 +02:00
Robin Voetter
5d429b03e3
stage2: add @addrSpaceCast builtin
2022-10-12 20:36:12 +02:00
jacobly0
562ac8be48
codegen: add support for lowering .field_ptr on a slice
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Closes #13068
2022-10-12 12:40:59 +03:00
Andrew Kelley
7ce1ee1bce
Merge pull request #13081 from r00ster91/docs
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fix(text): hyphenation and other fixes
2022-10-12 05:26:11 -04:00
Luuk de Gram
7f508480f4
wasm-linker: convert relocation addend to i32
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Addends in relocations are signed integers as theoretically it could
be a negative number. As Atom's offsets are relative to their parent
section, the relocation value should still result in a postive number.
For this reason, the final result is stored as an unsigned integer.
Also, rather than using `null` for relocations that do not support
addends. We set the value to 0 for those that do not support addends,
and have to call `addendIsPresent` to determine if an addend exists
or not. This means each Relocation costs 4 bytes less than before,
saving memory while linking.
2022-10-08 17:23:13 +02:00
r00ster91
8e2aaf6aed
fix(text): hyphenate "runtime" adjectives
2022-10-05 21:33:42 +02:00
r00ster91
51d9db8569
fix(text): hyphenate "comptime" adjectives
2022-10-05 21:19:30 +02:00
Veikka Tuominen
0e77259f44
add inline switch union tag captures
2022-09-27 18:33:23 +03:00
joachimschmidt557
f014de6456
stage2 ARM: fix debug info for arguments passed in registers
2022-09-20 17:14:31 +02:00
joachimschmidt557
258b058eec
stage2 ARM: make sub_sp_scratch MIR instruction use r4
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r0 is used for argument passing, so this register is not available as
a scratch register upon function entry.
2022-09-20 17:14:27 +02:00
Jakub Konka
2c971f0085
fix code formatting
2022-09-18 10:00:04 +02:00
Jakub Konka
dc6480dba5
macho: allow for add and ldr when resolving GOT_LOAD_* relocs
2022-09-18 10:00:04 +02:00
Jakub Konka
53bd7bd044
macho: move to incremental writes and global relocs for incremental
2022-09-18 10:00:04 +02:00
Koakuma
86dc982e74
stage2: sparc64: Implement airSlicePtr
2022-09-14 16:58:13 -07:00
Koakuma
ed546a7aad
stage2: sparc64: Add placeholder for some Air instructions
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airAddSat airSubSat airMulSat airShlSat airUnaryMath airPopcount airPrefetch
airPtrElemVal airOptionalPayload airOptionalPayloadPtr airOptionalPayloadPtrSet
2022-09-14 16:58:13 -07:00
Koakuma
0e1c68d90a
stage2: sparc64: Don't track condition_flags_inst in checked binOps
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This stops the emission of spurious CCR spills.
2022-09-14 16:57:31 -07:00
Koakuma
0464512f2e
stage2: sparc64: Implement airShlWithOverflow
2022-09-14 16:57:31 -07:00
Koakuma
de17fe66a5
stage2: sparc64: Tidy up binOp and enable more operations
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sub, mul, addwrap, subwrap, mulwrap, shr, shr_exact
2022-09-14 16:57:31 -07:00
Koakuma
ab3d3b260b
stage2: sparc64: Add airClz/airCtz placeholder
2022-09-14 16:57:31 -07:00
Koakuma
b9897c3b84
stage2: sparc64: Implement airMulOverflow for <= 32 bits
2022-09-14 16:57:31 -07:00
Koakuma
844d3a5a74
stage2: sparc64: Fix SPARCv9 shift opcodes encoding
2022-09-14 16:57:31 -07:00
Koakuma
61265fba04
stage2: sparc64: Implement airBinop for bool_and/or
2022-09-14 16:57:31 -07:00
Koakuma
4fc6df9f62
stage2: sparc64: Implement airTagName
2022-09-14 16:57:31 -07:00
Koakuma
f01867f78e
stage2: sparc64: Implement airWrapOptional
2022-09-14 16:57:31 -07:00
Koakuma
b6307144c0
stage2: sparc64: Implement airPtrToInt
2022-09-14 16:57:31 -07:00
Koakuma
2c9ab03b0b
stage2: sparc64: Add airCmpLtErrorsLen placeholder
2022-09-14 16:57:31 -07:00
Koakuma
5b0134e3ed
stage2: sparc64: Change branch_link Mir field definition
2022-09-14 16:57:31 -07:00
Koakuma
64b61f0740
stage2: sparc64: Add airFloatToInt & airIntToFloat placeholder
2022-09-14 16:57:31 -07:00
Andrew Kelley
0a89624d59
stage2: support being built in ReleaseSafe mode
2022-09-13 18:08:59 -07:00
Andrew Kelley
bec70a1a39
stage2: remove pointless discards from source code
...
Good riddance!
2022-09-13 02:04:20 -07:00
Jakub Konka
5778077f9f
Merge pull request #12799 from joachimschmidt557/stage2-arm
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stage2 ARM: introduce allocRegs mechanism and other improvements
2022-09-10 09:13:08 +02:00
Jakub Konka
485d8819b3
aarch64: update codegen to using a global index rather than local index
2022-09-10 00:57:54 +02:00
Jakub Konka
fc5a6e0e32
x86_64: combine got_load, direct_load and imports_load into linker_load MCV
2022-09-10 00:18:39 +02:00
Jakub Konka
d8f2103545
macho+coff: return index into global table from getGlobalSymbol
2022-09-09 23:30:31 +02:00
joachimschmidt557
94499898e5
stage2 ARM: implement basic array_elem_val
2022-09-09 20:26:04 +02:00
joachimschmidt557
b976997e16
stage2 ARM: implement ptr_elem_val
2022-09-09 19:17:18 +02:00
joachimschmidt557
a0a7d15142
stage2 ARM: support larger function stacks
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This is done by introducing a new Mir pseudo-instruction
2022-09-09 19:17:18 +02:00
joachimschmidt557
3794f2c493
stage2 ARM: implement struct_field_val for registers
2022-09-09 19:17:18 +02:00
joachimschmidt557
25729d6155
stage2 ARM: fix multiple uses of reuseOperand
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- add missing checks whether destination fits into the operand
- remove reuseOperand invocations from airIsNullPtr and similar
functions as we need to load the operands into temporary locations
2022-09-09 19:17:18 +02:00
joachimschmidt557
261fec8036
stage2 ARM: amend implementation of various AIR instructions
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- unwrap_errunion_err for registers
- unwrap_errunion_payload for registers
- ptr_slice_len_ptr for all MCValues
- ptr_slice_ptr_ptr for all MCValues
2022-09-09 19:17:17 +02:00
joachimschmidt557
e2b029e2c8
stage2 ARM: implement field_parent_ptr
2022-09-09 19:17:17 +02:00
joachimschmidt557
481bd4761a
stage2 ARM: remove remaining uses of binOp{Register,Immediate}
2022-09-09 19:17:17 +02:00
joachimschmidt557
95b8a5f157
stage2 ARM: extract remaining operations out of binOp
2022-09-09 19:17:17 +02:00
joachimschmidt557
fdb2c80bdc
stage2 ARM: extract mul, div, and mod out of binOp
2022-09-09 19:17:17 +02:00
joachimschmidt557
ed4be06883
stage2 ARM: extract add+sub from binOp
...
This commit also lays the groundwork for further extractions from
binOp.
2022-09-09 19:17:17 +02:00
joachimschmidt557
86dd123392
stage2 ARM: move cmp to new allocReg mechanism; remove from binOp
2022-09-09 19:17:17 +02:00
joachimschmidt557
0414ef591a
stage2 ARM: introduce allocRegs
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This new register allocation mechanism which is designed to be more
generic and flexible will replace binOp.
2022-09-09 19:17:16 +02:00
joachimschmidt557
28cc363947
stage2 ARM: improve Mir representation of mov and cmp
2022-09-09 19:17:13 +02:00
