18758 Commits

Author SHA1 Message Date
Jakub Konka
e95dfac03e regalloc: make register class bitmask non-optional 2022-05-19 23:54:48 +02:00
frmdstryr
7b63f98cd7
Add aliases to math builtins back into std.math (#11666) 2022-05-19 15:04:40 -04:00
Jakub Konka
f766b25f82 x64: load float from memory to register on PIE targets 2022-05-19 20:24:06 +02:00
Jakub Konka
5cbfd5819e x64: check for floating-point intrinsics in codegen 2022-05-19 19:39:34 +02:00
Jakub Konka
283f40e4e9 x64: use StaticBitSet instead of an integer internally in RegisterManager 2022-05-19 19:39:34 +02:00
Jakub Konka
080d138b9d x64: re-enable incremental tests 2022-05-19 19:39:34 +02:00
Jakub Konka
6d32498c55 x64: re-enable behavior tests 2022-05-19 19:39:34 +02:00
Jakub Konka
36b939e8db x64: handle basic f32 using AVX registers 2022-05-19 19:39:34 +02:00
Jakub Konka
020f99d893 x64: remove special-casing of AVX for br() 2022-05-19 19:39:34 +02:00
Jakub Konka
f346150820 x64: use register classes mask to select between gp and avx 2022-05-19 19:39:34 +02:00
Jakub Konka
549174f743 regalloc: allow for optional selector mask when allocating 2022-05-19 19:39:32 +02:00
Jakub Konka
9e5c8cb008 x64: merge general purpose with simd register into one bitset
This way, we do not have to tweak the `RegisterManager` to handle
multiple register types - we have one linear space instead. Additionally
we can use the bitset itself to separate the registers into overlapping
(the ones that are aliases of differing bitwidths) and nonoverlapping
classes (for example, AVX registers do not overlap general purpose
registers, thus they can be allocated simultaneously).

Another huge benefit of this simple approach is the fact that we can
still refer to *all* registers regardless of their class via enum
literals which makes the code so much more readable.

Finally, `RegisterLock` is universal across different register classes.
2022-05-19 19:37:29 +02:00
Jakub Konka
2aee230251 x64: add unordered cmp with EFLAGS 2022-05-19 19:37:28 +02:00
Jakub Konka
357561840d x64: load/store to/from AVX registers for f64 2022-05-19 19:36:35 +02:00
Jakub Konka
0835486249 x64: add vmovsd RM and MR lowerings (first draft) 2022-05-19 19:36:35 +02:00
Jakub Konka
019cc94ec7 x64: clean up populating VEX prefix 2022-05-19 19:36:35 +02:00
Jakub Konka
875a16030c x64: extend Emit to allow for AVX registers 2022-05-19 19:36:35 +02:00
Jakub Konka
70d809e0bb x64: add AVX registers and Vex prefix sub-encoder 2022-05-19 19:36:35 +02:00
Andrew Kelley
50a5ddecc5
Merge pull request #11635 from wsengir/stage2-errsetcast-safety
stage2: `@errSetCast` safety
2022-05-18 16:35:37 -04:00
Andrew Kelley
8660661af4
Merge pull request #11660 from ziglang/stage2-behavior
stage2: bug fixes towards more behavior tests passing
2022-05-18 15:29:19 -04:00
Andrew Kelley
9031cc54f2 Sema: implement @intCast for vectors 2022-05-17 23:50:38 -07:00
Andrew Kelley
691fba38d8 enable passing behavior test 2022-05-17 23:50:38 -07:00
Andrew Kelley
0fafc8cc44 std.Thread: insert a missing @alignCast
stage1 has a missing compile error for this situation.
2022-05-17 23:50:38 -07:00
Andrew Kelley
b6798c26ef stage2: fix pointer arithmetic result type
This makes it so the result of doing pointer arithmetic creates a new
pointer type that has adjusted alignment.
2022-05-17 23:50:38 -07:00
Andrew Kelley
95f5e17e49 behavior tests: correction of C pointer test
This test was also covering this behavior:

```zig
test "equality of pointers to comptime const" {
    const a: i32 = undefined;
    comptime assert(&a == &a);
}
```

This check belongs in its own behavior test which isolates this
behavior; not bundled along with a C pointer test.
2022-05-17 23:50:38 -07:00
Andrew Kelley
00f3d84f38 LLVM: support mixing extern and export with the same symbol name 2022-05-17 23:50:38 -07:00
Luuk de Gram
e252f92b99 wasm: enable 128bit integer behavior tests 2022-05-18 07:43:33 +02:00
Luuk de Gram
ed25ce77f5 wasm: Implement {add/sub}WithOverflow for 128bit 2022-05-18 07:43:33 +02:00
Luuk de Gram
fd081c74f1 wasm: Support not instruction for 128 bit integers
This also fixes the instruction for all other integer bitsizes,
as it was previously assuming to always be a bool.

128 bit substraction was also fixed as it contained a bug where it swapped
lhs with rhs.
2022-05-18 07:43:33 +02:00
Luuk de Gram
10fe24c043 wasm: Implement trunc/wrap for 128 bit integers
This also implments wrapping for arbitrary integer widths between 64 and 128.
`@truncate` was fixed where the wasm types between operand and result differentiated.
We solved this by first casting and then wrapping.
2022-05-18 07:43:33 +02:00
Luuk de Gram
ea073a6b76 wasm: Support 128bit integers for max/min/ctz/clz
`airMaxMin` was slightly updated to automatically support 128 bit integers,
by using the `cmp` function, instead of doing it manually. This makes the function
more maintanable as well.

`ctz` and `clz` now support 128 bit integers, while updating the previous implementation
also.
2022-05-18 07:43:33 +02:00
Luuk de Gram
502f5d8246 wasm: Fix C-ABI for 128 bit integers
We now pass the correct wasm type when the return type is a 128-bit integer.
When a function accepts a 128-bit integer, we now allocate space on the virtual stack
and store both arguments within that space as currently all following instructions
assume the 128 bit integer doesn't live in a local, but the stack.
2022-05-18 07:43:33 +02:00
Luuk de Gram
03a3ea2c15 wasm: 128 bit intcast and binary operations
Also fixes some bugs in 128-bit binary comparisons where we checked
if the lsb were equal, rather than msb.
2022-05-18 07:43:33 +02:00
Luuk de Gram
167d3089ea wasm: Support 128bit add/sub wrapping operands 2022-05-18 07:43:33 +02:00
Luuk de Gram
59d3714b8d wasm: 128bit integer cmp support
This implements support for all compare operations on a 128bit integer,
for both signed and unsigned integers.

The new implementation is almost more efficient as it requires no control-flow,
unlike the old implementation which used a block with breaks.
2022-05-18 07:43:33 +02:00
Luuk de Gram
c0ad0606df wasm: Support 128bit integer coercion
The Wasm backend now correctly supports coercing a smaller integer
into a 128bit integer. Regardless of signedness.
2022-05-18 07:43:33 +02:00
alice
951ab802a3
std.math: simpler error handling 2022-05-17 22:04:12 +01:00
alice
70b6b98e91
Simplify Copysign 2022-05-17 21:55:22 +01:00
alice
ceeec8d19f
Simplify signbit 2022-05-17 21:41:57 +01:00
YeonJiKun
f3517a1aa6 zig test: Add proper detection for Windows console 2022-05-17 14:22:10 +03:00
Andrew Kelley
df74c45fa7
Merge pull request #11501 from Vexu/stage2-err-return-trace
stage2: error return traces
2022-05-17 03:27:03 -04:00
Jakub Konka
3fde14035b
Merge pull request #11658 from koachan/sparc64-codegen
stage2: sparc64: Make basic test harness run
2022-05-17 09:20:02 +02:00
aiotter
552ef5f2e4 std.c: Implement dirent on std/c/linux.zig 2022-05-17 15:23:55 +09:00
Stephen Gregoratto
a4369918b1 Generate linux syscalls via. the linux source tree
Previously, updating the `SYS` enum for each architecture required
manually looking at the syscall tables and inserting any new additions.

This commit adds a tool, `generate_linux_syscalls.zig`, that automates
this process using the syscall tables in the Linux source tree. On
architectures without a table, it runs `zig cc` as a pre-processor to
extract the system-call numbers from the Linux headers.
2022-05-16 23:55:11 -04:00
Felix "xq" Queißner
6d27341b96 Fixes comptime 'error: cannot assign to constant' error in siphash. 2022-05-16 22:31:09 -04:00
Veikka Tuominen
0a7f3be42e Sema: improve index out of bounds panic message 2022-05-16 17:42:51 -07:00
Veikka Tuominen
ab4ec35b8b stage2: add runtime safety for unwrapping error 2022-05-16 17:42:51 -07:00
Veikka Tuominen
e369752430 Sema: do not call returnError when returning payload of error union 2022-05-16 17:42:51 -07:00
Veikka Tuominen
53a5aee3b3 stage2: enable error return tracing on llvm backend 2022-05-16 17:42:51 -07:00
Veikka Tuominen
66c3988e5e stage2: disable error return tracing on unsupported targets 2022-05-16 17:42:51 -07:00