18758 Commits

Author SHA1 Message Date
Andrew Kelley
2bf532fc23 stage2: use std.debug.Trace only when explicitly enabled
Because it bumps up the stack space requirements, which is making a test
case fail on aarch64 drone CI.
2022-06-09 20:00:59 -07:00
Andrew Kelley
bc36da0cb8 test harness: fix handling of counts
I'm not really happy with parsing compile errors; I think we should just
be checking that the expected compile error matches the actual rendered
version. I will save that change for a later date however.
2022-06-09 15:37:16 -07:00
Andrew Kelley
fd32f6890d stage2: fold redundant error notes 2022-06-09 15:37:16 -07:00
Andrew Kelley
af909f6c93 std.debug.Trace: improve API
Now `std.debug.Trace` is a concrete type with pre-chosen defaults.
`std.debug.ConfigurableTrace` can be used for more advanced cases.
2022-06-09 15:37:16 -07:00
Andrew Kelley
83f300218f upgrade behavior test to stage2 fn ptr semantics 2022-06-09 15:37:16 -07:00
Andrew Kelley
bac132bc8f introduce std.debug.Trace
And use it to debug a LazySrcLoc in stage2 that is set to a bogus value.

The actual fix in this commit is:

```diff
-        try sema.emitBackwardBranch(&child_block, call_src);
+        try sema.emitBackwardBranch(block, call_src);
```
2022-06-09 15:37:16 -07:00
Andrew Kelley
f1cff4fa4a Sema: avoid use of undefined value for generic fn calls
I saw some issues in Valgrind which are fixed after this commit.
2022-06-09 15:09:48 -07:00
Andrew Kelley
a3f05b80f1
Merge pull request #11827 from ziglang/stage2-behavior
stage2: enhancements aimed at more behavior tests passing
2022-06-09 06:13:47 -04:00
Andrew Kelley
f4d5fcde72 AstGen: avoid redundant "ref" instructions
Whenever a `ref` instruction is needed, it is created and saved in
`AstGen.ref_table` instead of being immediately appended to the current
block body. Then, when the referenced instruction is being added to the
parent block (e.g. from setBlockBody), if it has a ref_table entry, then
the ref instruction is added directly after the instruction being referenced.
This makes sure two properties are upheld:
1. All pointers to the same locals return the same address. This is required
   to be compliant with the language specification.
2. `ref` instructions will dominate their uses. This is a required property
   of ZIR.

A complication arises when a ref instruction refs another ref
instruction. The logic in appendBodyWithFixups must take this into
account, recursively handling ref refs.
2022-06-08 20:40:16 -07:00
Andrew Kelley
7c0614ea65 Sema: implement zirRetErrValueCode 2022-06-08 15:51:48 -07:00
Andrew Kelley
d557dedf6c add a missing align() to a behavior test 2022-06-08 15:38:15 -07:00
Andrew Kelley
434226c89d stage2: fix type printing of sub-byte pointers 2022-06-08 15:18:43 -07:00
Andrew Kelley
93d7fd9547 test harness: fix sort comparator
It was returning "true" for lessThan() when the objects were in fact
equal.
2022-06-08 15:17:53 -07:00
Isaac Freund
29dd9a5880 parser: sync comments with formal grammar 2022-06-08 21:53:06 +02:00
Andrew Kelley
868a39b296
Merge pull request #11821 from ziglang/stage2-packed-structs
stage2: better codegen for byte-aligned packed struct fields
2022-06-08 15:24:17 -04:00
Andrew Kelley
f5d97e5e48
Merge pull request #11825 from ifreund/std-build-relro
Enable full RELRO by default, expose in std.build
2022-06-08 15:21:22 -04:00
Isaac Freund
d8cae4d197
std.build: Expose -z norelro and -z lazy 2022-06-08 15:13:04 +02:00
Isaac Freund
3381779426
linker: Enable full RELRO by default
Full RELRO is a hardening feature that makes it impossible to perform
certian attacks involving overwriting parts of the Global Offset Table
to invoke arbitrary code.

It requires all symbols to be resolved before execution of the program
starts which may have an impact on startup time. However most if
not all popular Linux distributions enable full RELRO by default for
all binaries and this does not seem to make a noticeable difference
in practice.

"Partial RELRO" is equivalent to `-z relro -z lazy`.
"Full RELRO" is equivalent to `-z relro -z now`.

LLD defaults to `-z relro -z lazy`, which means Zig's current `-z relro`
option has no effect on LLD's behavior.

The changes made by this commit are as follows:

- Document that `-z relro` is the default and add `-z norelro`.
- Pass `-z now` to LLD by default to enable full RELRO by default.
- Add `-z lazy` to disable passing `-z now`.
2022-06-08 14:33:11 +02:00
Andrew Kelley
53c86febcb stage2: packed struct fixes for big-endian targets 2022-06-07 22:47:08 -07:00
Andrew Kelley
3e30ba3f20 stage2: better codegen for byte-aligned packed struct fields
* Sema: handle overaligned packed struct field pointers
 * LLVM: handle byte-aligned packed struct field pointers
2022-06-07 21:05:40 -07:00
joachimschmidt557
61844b6bd4 stage2 AArch64: introduce MCValue.condition_flags
Follows 9747303d16dfca61316a292d1e05ac901191e3a3 for AArch64
2022-06-07 23:34:42 -04:00
Cody Tapscott
70dc910086 std.math: Add O(log N) implementation of log2(x) for comptime_int
Since Zig provides @clz and not @ffs (find-first-set), log2 for comptime
integers needs to be computed algorithmically. To avoid hitting the
backward branch quota, this updates log2(x) to use a simple O(log N)
algorithm.
2022-06-07 20:07:40 -04:00
Andrew Kelley
6ff7b437ff
Merge pull request #11813 from Vexu/stage2
`zig2 build test-std` finale
2022-06-07 20:07:28 -04:00
Jakub Konka
3cb3873382
Merge pull request #11814 from ziglang/x64-stack-handling
x64: improves stack handling, fixes a heisenbug, adds micro-optimisations
2022-06-07 23:22:20 +02:00
Jakub Konka
6c59aa9e02
Merge pull request #11806 from koachan/sparc64-codegen
stage2: sparc64: Some more Air lowerings
2022-06-07 21:24:56 +02:00
Jonathan Marler
523fae420b add const to msghdr_const iov and control pointers
alongside the typical msghdr struct, Zig has added a msghdr_const
type that can be used with sendmsg which allows const data to
be provided.  I believe that data pointed to by the iov and control
fields in msghdr are also left unmodified, in which case they can
be marked const as well.
2022-06-07 15:23:44 -04:00
Jakub Konka
27dad11ef1 x64: remove outdated TODO comment 2022-06-07 21:05:11 +02:00
Veikka Tuominen
413577c881 std: adjust for stage2 semantics 2022-06-07 21:27:07 +03:00
Veikka Tuominen
6de9eea7bc stage2 llvm: fix float/int conversion compiler-rt calls 2022-06-07 21:27:06 +03:00
Veikka Tuominen
fbd7e4506f stage2: implement asm with multiple outputs 2022-06-07 21:27:06 +03:00
Veikka Tuominen
e4c0b848a4 Sema: allow simple else body even when all errors handled 2022-06-07 21:27:06 +03:00
Veikka Tuominen
d5e3d5d74c Sema: make analyzeIsNonErr even lazier for inferred error sets 2022-06-07 21:27:06 +03:00
Jakub Konka
76ad7af4d8 x64: pull common codepath between store and genSetStack into a helper 2022-06-07 19:33:43 +02:00
Jakub Konka
03068ce6a6 x64: clean up store helper 2022-06-07 19:33:43 +02:00
Jakub Konka
a8bce8f14b x64: pass behavior test bugs/1381 2022-06-07 19:33:43 +02:00
Jakub Konka
0c72760454 x64: optimise element offset calculation if dealing with immediates
If `index` MCValue is actually an immediate, we can calculate offset
directly at "comptime" rather than at runtime.
2022-06-07 19:33:43 +02:00
Jakub Konka
fc015231ad x64: account for non-pow-two stores via register deref
In this case, we need to proceed rather carefully to avoid writing
containing register width rather than the precise amount of bytes.
2022-06-07 19:33:43 +02:00
Jakub Konka
117f9f69e7 x64: simplify saving registers to stack in prologue 2022-06-07 19:33:40 +02:00
Andrew Kelley
e9fc58eab7 LLVM: handle extern function name collisions
Zig allows multiple extern functions with the same name, and the
backends have to handle this possibility.

For LLVM, we keep a sparse map of collisions, and then resolve them in
flushModule(). This introduces some technical debt that will have to be
resolved when adding incremental compilation support to the LLVM
backend.
2022-06-07 00:47:10 -04:00
Jakub Konka
d9b0c984aa
Merge pull request #11794 from ziglang/elf-macho-alignment
elf+macho: use explicit alignment on Decl if specified
2022-06-07 01:03:15 +02:00
Andrew Kelley
d1bfc83774
Merge pull request #11783 from ziglang/stage2-try
introduce a "try" ZIR and AIR instruction
2022-06-06 19:01:39 -04:00
Andrew Kelley
be639eecc2
Merge pull request #11565 from matu3ba/port_abort
std.os: ported signal handling in abort() from musl
2022-06-06 18:35:24 -04:00
Andrew Kelley
073762395e std.os.abort patch cleanups
* move global into function scope
 * clarify comments
 * avoid unnecessary usage of std.atomic API
 * switch on error instead of `catch unreachable`
 * call linux.gettid() instead of going through higher level API and
   doing unnecessary casting
2022-06-06 15:34:20 -07:00
Jan Philipp Hafer
d1e8b73939 std.os.abort: ported signal handling from musl
* Document deviation from Linux man page, which is identical to musl.
  Man page wants always enabled user-provided abort handlers.
  Worst case logic bug, which this can introduce:
    + user disables SIGABRT handler to prevent tear down to last safe
      state
    + abort() gets called and enables user-provided SIGABRT handler
    + SIGABRT tears down to supposed last safe state instead of crash
    + Application, instead of crashing, continues
* Pid 1 within containers needs special handling.
  - fatal signals are not transmitted without privileges,
    so use exit as fallback
* Fix some signaling bits
* Add checks in Debug and ReleaseSafe for wrong sigprocmask
2022-06-06 15:32:39 -07:00
Jakub Konka
920f1dcd27
Merge pull request #11804 from ziglang/elf-dwarf-unions
dwarf: fix incorrect type relocations for union payloads
2022-06-07 00:22:36 +02:00
Andrew Kelley
367e2b2fe4
Merge pull request #11800 from Vexu/stage2
`zig2 build test-std` progress
2022-06-06 16:12:31 -04:00
Veikka Tuominen
14685e59b2 stage2: use correct type (u29) for alignment 2022-06-06 13:11:54 -07:00
Veikka Tuominen
32568dba74 std: handle stage2 function pointer semantics in test 2022-06-06 13:11:50 -07:00
Veikka Tuominen
61c5d8f8f1 std.fs: fix incorrect passing of pointer to temporary 2022-06-06 13:11:50 -07:00
Veikka Tuominen
bb84c87a47 std: add necessary @alignCasts 2022-06-06 13:11:50 -07:00