16757 Commits

Author SHA1 Message Date
Andrew Kelley
d4805472c3 compiler_rt: addXf3: add coercion to @clz
We're going to remove the first parameter from this function in the
future. Stage2 already ignores the first parameter. So we put an `@as`
in here to make it work for both.
2022-02-06 20:06:00 -07:00
Andrew Kelley
495fd4ee3e AstGen: refactor redundant expressions
This is a non-functional change.
2022-02-06 19:45:49 -07:00
Andrew Kelley
287ff4ab58 stage2: add more float arithmetic and f80 support
AstGen: Fixed bug where f80 types in source were triggering illegal
behavior.

Value: handle f80 in floating point arithmetic functions.

Value: implement floatRem and floatMod

This commit introduces dependencies on compiler-rt that are not
implemented. Those are a prerequisite to merging this branch.
2022-02-06 19:27:54 -07:00
John Schmidt
fd1284ebd0 stage2: apply type coercion in if expressions
When setting the break value in an if expression we must explicitly
check if a result location type coercion that needs to happen. This was
already done for switch expression, so let's just imitate that check
and fix for if expressions. To make this possible, we now also propagate
`rl_ty_inst` to sub scopes.
2022-02-06 21:26:26 -05:00
joachimschmidt557
adc9a282d8 stage2 ARM: fix load and store for abi_size < 4
Previously, in these cases, we would emit the ldr instruction even
though ldrb oder ldrh are the correct instructions.
2022-02-06 23:29:36 +01:00
joachimschmidt557
4468abfc42 stage2 ARM: enable a handful of passing behavior tests 2022-02-06 02:23:31 -05:00
Johannes Löthberg
6f87f49f3d CLI: remove remainders of --verbose-ast and --verbose-tokenize
These options were removed in 5e63baae8 (CLI: remove --verbose-ast and
--verbose-tokenize, 2021-06-09) but some remainders were left in.

Signed-off-by: Johannes Löthberg <johannes@kyriasis.com>
2022-02-06 01:57:04 -05:00
Andrew Kelley
8dcb1eba60
Merge pull request #10738 from Vexu/f80
Add compiler-rt functions for f80
2022-02-05 20:57:32 -05:00
Jakub Konka
f132f426b9 x86_64: add distinct MCValue representing symbol index in the linker
For PIE targets, we defer getting an address of value until the linker
has allocated all atoms and performed the relocations. In codegen,
we represent this via `MCValue.linker_sym_index` value.
2022-02-06 00:34:24 +01:00
joachimschmidt557
4b3b487627 stage2 regalloc: Introduce error.OutOfRegisters 2022-02-06 00:14:48 +01:00
joachimschmidt557
d4c3475f3d stage2 ARM: clarify usage of unfreezeRegs in airSliceElemVal 2022-02-05 15:58:46 +01:00
praschke
f2a82bafae std: allow tests to use cache and setOutputDir 2022-02-05 16:33:57 +02:00
gwenzek
0e1afb4d98
stage2: add support for Nvptx target
sample command:

/home/guw/github/zig/stage2/bin/zig build-obj cuda_kernel.zig -target nvptx64-cuda -O ReleaseSafe
this will create a kernel.ptx

expose PtxKernel call convention from LLVM
kernels are `export fn f() callconv(.PtxKernel)`
2022-02-05 16:33:00 +02:00
rohlem
fbc06f9c91 std.build.TranslateCStep: add C macro support
The string construction code is moved out of std.build.LibExeObjStep
into std.build.constructCMacroArg, to allow reusing it elsewhere.
2022-02-05 03:17:07 -05:00
Veikka Tuominen
7d04ab1f14 std.process: add option to support single quotes to ArgIteratorGeneral 2022-02-05 02:59:13 -05:00
Jan Philipp Hafer
01d48e55a5 compiler_rt: optimize mulo
- use usize to decide if register size is big enough to store
  multiplication result or if division is necessary
- multiplication routine with check of integer bounds
- wrapping multipliation and division routine from Hacker's Delight
2022-02-05 01:35:46 -05:00
Veikka Tuominen
5a7d43df23 stage1: make f80 always size 16, align 16 2022-02-04 22:44:56 +02:00
Veikka Tuominen
b2f84c6714 stage1: implement f80 negation on non native targets 2022-02-04 22:38:14 +02:00
Veikka Tuominen
6a736f0c8c compiler-rt: add add/sub for f80 2022-02-04 22:38:13 +02:00
Veikka Tuominen
9bbd3ab257 compiler-rt: add comparison functions for f80 2022-02-04 22:22:43 +02:00
Veikka Tuominen
72cef17b1a compiler-rt: add trunc functions for f80 2022-02-04 22:18:44 +02:00
Veikka Tuominen
5c4ef1a64c compiler-rt: add extend functions for f80 2022-02-04 22:16:07 +02:00
joachimschmidt557
04f379dd41 stage2 ARM: optimize airSliceElemVal for elem_size 1 or 4
In these cases, the AIR inst can be lowered to only one ldr
instruction.

Also fixes shifts in arm.bits.Offset
2022-02-04 21:07:10 +01:00
Kirk Scheibelhut
71321b6941
Various documentation fixes
Co-authored-by: Kirk Scheibelhut <kjs@scheibo.com>
Co-authored-by: extrasharp <genericpb@gmail.com>
2022-02-04 21:27:50 +02:00
Andrew Kelley
95fbce2b95 Sema: fixes to fieldVal, resolveStructFully, Type.eql
fieldVal handles pointer to pointer to array. This can happen for
example, if a pointer to an array is used as the condition expression of
a for loop.

resolveStructFully handles tuples (by doing nothing).

fixed Type comparison for tuples to handle comptime fields properly.
2022-02-03 23:59:32 -07:00
Kazuki Sakamoto
64f7231f86 stage1: Fix missing LLD library 2022-02-04 01:45:44 -05:00
Mateusz Radomski
1b6a1e691f
Sema: check for NaNs in cmp (#10760) 2022-02-04 00:58:27 -05:00
Andrew Kelley
0893326e0e Sema: slice improvements
* resolve_inferred_alloc now gives a proper mutability attribute to the
   corresponding alloc instruction. Previously, it would fail to mark
   things const.
 * slicing: fix the detection for when the end index equals the length
   of the underlying object. Previously it was using `end - start` but
   it should just use the end index directly. It also takes into account
   when slicing a comptime-known slice.
 * `Type.sentinel`: fix not handling all slice tags
2022-02-03 21:05:10 -07:00
Andrew Kelley
71e0cca7a7
Merge pull request #10780 from Luukdegram/wasm-behavior-tests
stage2: Wasm - Account for stack alignment
2022-02-03 20:23:46 -05:00
Jakub Konka
4ca9a8d192 x64: implement storing to MCValue.memory for PIE targets 2022-02-04 00:37:43 +01:00
Luuk de Gram
588b88b987
Move passing behavior tests
Singular tests (such as in the bug ones) are moved to top level with exclusions for non-passing backends.
The big behavior tests such as array_llvm and slice are moved to the inner scope with the C backend disabled.
They all pass for the wasm backend now
2022-02-03 22:31:29 +01:00
Luuk de Gram
e35414bf5c
wasm: Refactor stack to account for alignment
We now calculate the total stack size required for the current frame.
The default alignment of the stack is 16 bytes, and will be overwritten when the alignment
of a given type is larger than that.

After we have generated all instructions for the body, we calculate the total stack size
by forward aligning the stack size while accounting for the max alignment.
We then insert a prologue into the body, where we substract this size from the stack pointer
and save it inside a bottom stackframe local. We use this local then, to calculate
the stack pointer locals of all variables we allocate into the stack.

In a future iteration we can improve this further by storing the offsets as a new `stack_offset` `WValue`.
This has the benefit of not having to spend runtime cost of storing those offsets, but instead we append
those offsets whenever we need the value that lives in the stack.
2022-02-03 21:53:48 +01:00
Luuk de Gram
ae1e3c8f9b
wasm: Implement vector_init for array & structs
Implements the instruction `vector_init` for structs and arrays.
For arrays, it checks if the element must be passed by reference or not.
When not, it can simply use the `offset` field of a store instruction to copy the values
into the array. When it is byref, it will move the pointer by the element size, and then perform
a store operation. This ensures types like structs will be moved into the right position.
For structs we will always move the pointer, as we currently cannot verify if all fields are
not by ref.
2022-02-03 21:43:25 +01:00
Luuk de Gram
29013220d9
wasm: Implement elem_ptr
This implements lowering elem_ptr for decl's and constants.
To generate the correct pointer, we perform a relocation by using the addend
that represents the offset. The offset is calculated by taking the element's size
and multiplying that by the index.

For constants this generates a single immediate instruction, and for decl's
this generates a single pointer address.
2022-02-03 21:42:48 +01:00
Jakub Konka
3832b58229
Merge pull request #10775 from ziglang/x64-freeze-api
stage2: migrate x64 to freeze regalloc API, and remove the concept of register exceptions
2022-02-03 20:12:35 +01:00
Jakub Konka
228b798af5 elf: generated DWARF debug info for named structs 2022-02-03 18:47:36 +01:00
Jakub Konka
74a01e3d64 stage2: remove the concept of register exceptions 2022-02-03 18:08:29 +01:00
Jakub Konka
e0b1170b67 x64: swap out register exceptions for freeze/unfreeze api 2022-02-03 17:55:22 +01:00
Jakub Konka
cfceec15e1 Merge branch 'mparadinha-test-1486' 2022-02-03 14:31:36 +01:00
Jakub Konka
f4e0641450 x64: use freeze/unfreeze api; TODO for PIE 2022-02-03 14:31:16 +01:00
Jakub Konka
e52af26856 Merge branch 'test-1486' of git://github.com/mparadinha/zig into mparadinha-test-1486 2022-02-03 14:00:28 +01:00
Jakub Konka
b77757fe39 elf: add basic handling of .data section 2022-02-03 08:47:06 +01:00
Andrew Kelley
557a097523 CLI: link_libcpp implies link_libc
Improves a warning message for some cases of using `zig run -lc++`.
2022-02-02 14:54:14 -07:00
Jakub Konka
7694361832
Merge pull request #10769 from ziglang/link-lib-fixes
stage2: handle name-qualified imports in sema, add a zerofill sections workaround to incremental macho
2022-02-02 20:59:17 +01:00
Andrew Kelley
3eb8d01f52
Merge pull request #10766 from ziglang/yeet-anytype-fields
remove anytype fields from the language
2022-02-02 13:39:27 -05:00
Jakub Konka
f95fcb2b1f
Merge pull request #10762 from ziglang/stage2-x86_64-new-regalloc-api
stage2: handle more MCValue types in `struct_field_ptr` in x86_64 and pad out nonpacked struct fields when lowering to bytes (all targets incl wasm32)
2022-02-02 16:33:58 +01:00
Jakub Konka
8f3be0e04f stage2: update stage2 tests with qualified import lib names for externs
From

```zig
extern fn write(...);
```

to

```zig
extern "c" fn write(...);
```
2022-02-02 16:25:46 +01:00
Jakub Konka
06a037bb95 macho: handle bss like normal section in stage2
This is just a temporary workaround until I work out how to manage
non-physical sections between stage2 incremental updates.
2022-02-02 16:22:58 +01:00
Jakub Konka
380462ffc0 sema: do not pass libc or libc++ to the linker 2022-02-02 15:33:38 +01:00
GithubPrankster
23e981bbd1 Correct f80 description 2022-02-02 15:54:30 +02:00