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stage2 ARM: clarify usage of unfreezeRegs in airSliceElemVal

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joachimschmidt557 2022-02-05 12:44:32 +01:00 committed by Jakub Konka
parent f2a82bafae
commit d4c3475f3d
1 changed files with 5 additions and 7 deletions
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12
src/arch/arm/CodeGen.zig
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@ -1247,7 +1247,6 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
else => return self.fail("TODO slice_elem_val when slice is {}", .{slice_mcv}),
};
self.register_manager.freezeRegs(&.{base_mcv.register});
defer self.register_manager.unfreezeRegs(&.{base_mcv.register});
switch (elem_size) {
1, 4 => {
@ -1283,6 +1282,8 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
} },
});
self.register_manager.unfreezeRegs(&.{base_mcv.register});
break :result dst_mcv;
},
else => {
@ -1291,7 +1292,6 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
const offset_mcv = try self.genArmMulConstant(bin_op.rhs, @intCast(u32, elem_size));
assert(offset_mcv == .register); // result of multiplication should always be register
self.register_manager.freezeRegs(&.{offset_mcv.register});
defer self.register_manager.unfreezeRegs(&.{offset_mcv.register});
const addr_reg = try self.register_manager.allocReg(null);
self.register_manager.freezeRegs(&.{addr_reg});
@ -1299,11 +1299,9 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
try self.genArmBinOpCode(addr_reg, base_mcv, offset_mcv, false, .add, .unsigned);
// I know we will unfreeze these registers at the end of
// the scope of :result. However, at this point in time,
// neither the base register nor the offset register
// contains any valuable data anymore. In order to reduce
// register pressure, unfreeze them prematurely
// At this point in time, neither the base register
// nor the offset register contains any valuable data
// anymore.
self.register_manager.unfreezeRegs(&.{ base_mcv.register, offset_mcv.register });
try self.load(dst_mcv, .{ .register = addr_reg }, slice_ptr_field_type);