18495 Commits

Author SHA1 Message Date
Luuk de Gram
0a2d3d4155 wasm: Improve overflow add/sub for ints <= 64bits
The implementation for add_with_overflow and sub_with_overflow is now a lot
more robust and takes account for signed integers and arbitrary integer bitsizes.
The final output is equal to that of the LLVM backend.
2022-05-16 13:55:26 -07:00
Jakub Konka
b94d165b69 x64: fix capacity prealloc limit in lowerToMrEnc helper 2022-05-16 13:55:26 -07:00
Andrew Kelley
316bf4fce5 disable 5 failing stage2_wasm tests 2022-05-16 13:55:26 -07:00
Andrew Kelley
03ed0f0d28 C backend: implement overflow arithmetic
Most of the work here was additions to zig.h. The lowering code is
mainly responsible for calling the correct function name depending on
the operand type.

Some of the compiler-rt calls here are not implemented yet and are
non-standard symbols due to the C programming language not needing them.

After this commit, the behavior tests with -ofmt=c are passing again.
2022-05-16 13:55:26 -07:00
William Sengir
a5ea22d069 LLVM: correctly pad result tuple of airOverflow 2022-05-16 13:55:26 -07:00
William Sengir
bb3532e775 stage2: add more vector overflow tests 2022-05-16 13:55:26 -07:00
William Sengir
21be3d9166 stage2: add vectorized overflow arithmetic behavior tests 2022-05-16 13:55:26 -07:00
William Sengir
afc714d5e5 stage2: implement runtime safety checks for shl_exact 2022-05-16 13:55:26 -07:00
William Sengir
c2980f332e Sema: implement integer overflow safety for add, sub, mul 2022-05-16 13:55:26 -07:00
William Sengir
eb06c78a8a Sema: vectorize overflow arithmetic 2022-05-16 13:55:26 -07:00
William Sengir
86a928ce61 stage2: perform comptime vectorization of *_with_overflow in Value 2022-05-16 13:55:26 -07:00
William Sengir
e8117bab6f stage2: clean up creation of boolean Values 2022-05-16 13:55:26 -07:00
William Sengir
6b5c87957b stage2: handle vectors in Value.intFitsInType 2022-05-16 13:55:26 -07:00
William Sengir
ca1ab38d3a stage2: add global Type constant for u1 2022-05-16 13:55:26 -07:00
William Sengir
c2cb9b7cad stage2: vectorize shl_with_overflow in LLVM backend 2022-05-16 13:55:26 -07:00
William Sengir
c641fb8f05 stage2: fix {add,sub,mul}_with_overflow vectorization in LLVM backend 2022-05-16 13:55:26 -07:00
Koakuma
b618dbdf69 stage2: sparc64: Implement SPARCv9 mulx 2022-05-16 23:30:54 +07:00
Koakuma
7245aad689 stage2: sparc64: Implement airBinOp for addition 2022-05-16 23:30:54 +07:00
Koakuma
67a1fedf84 stage2: sparc64: Implement airUnwrapErrErr 2022-05-16 23:30:54 +07:00
Koakuma
77eef33c04 stage2: sparc64: Implement airStructFieldPtrIndex 2022-05-16 23:30:54 +07:00
Koakuma
26116211ec stage2: sparc64: Implement inline memcpy for genSetStack 2022-05-16 23:30:54 +07:00
Koakuma
7822426ff2 stage2: sparc64: Implement airSliceElemVal 2022-05-16 23:30:54 +07:00
Koakuma
ccf438e4de stage2: sparc64: Replace freezeRegs with RegisterLock 2022-05-16 23:30:54 +07:00
Koakuma
26e3d36d74 stage2: sparc64: Implement airSliceLen 2022-05-16 23:30:54 +07:00
Koakuma
8ea80fdf7a stage2: sparc64: Implement airLoop 2022-05-16 23:30:47 +07:00
Koakuma
e4a725c597 stage2: sparc64: Implement airBitCast 2022-05-16 23:17:11 +07:00
Koakuma
0c8ce9ed9d stage2: sparc64: Implement airCmp 2022-05-16 23:17:11 +07:00
Koakuma
ae2d6b7eea stage2: sparc64: Add BPr support for airCondBr 2022-05-16 23:17:11 +07:00
Koakuma
e057ff2496 stage2: sparc64: Implement SPARCv9 bpr 2022-05-16 23:17:11 +07:00
Koakuma
8f8853cd4f stage2: sparc64: Implement airLoad/airStore 2022-05-16 23:17:06 +07:00
Koakuma
0b54649cac stage2: sparc64: Implement error value generation 2022-05-16 22:48:49 +07:00
Koakuma
3ab6634370 stage2: sparc64: Implement airAlloc 2022-05-16 22:48:49 +07:00
Koakuma
339b0517b3 stage2: sparc64: Implement SPARCv9 bpcc 2022-05-16 22:48:49 +07:00
Koakuma
5d260eb573 stage2: sparc64: Implement SPARCv9 subcc 2022-05-16 22:47:53 +07:00
Koakuma
2770f9a034 stage2: sparc64: Implement airBr 2022-05-16 22:47:53 +07:00
Koakuma
b6de8d2565 stage2: sparc64: Implement airUnwrapErrPayload 2022-05-16 22:47:53 +07:00
Koakuma
2dc2ab091e stage2: sparc64: Implement airCondBr from flags register 2022-05-16 22:47:53 +07:00
Koakuma
fd781195de stage2: sparc64: Split the conditionals between integer and FP ones
On SPARCv9 the integer and FP conditional branch codes doesn't align
with each other at all, so the two need to be treated separately.
2022-05-16 22:47:52 +07:00
Koakuma
662a61fcc3 stage2: sparc64: Implement airIsErr and airIsNonErr 2022-05-16 22:47:52 +07:00
Jakub Konka
5b03d55c5e x64: rename brk to int3, and MIR to interrupt 2022-05-15 19:52:43 +02:00
Jakub Konka
5f97652da8 x64: remove verbose_mir functionality
Originally I thought interleaving AIR with MIR will be useful, however
as it stands, I have used it very sporadically, and recently, not at
all, and I do not think anyone else is actually using it. If there is
a simple error such as a wrong instruction emitted,
`objdump` is perfectly capable of narrowing it down, while if there's
something more subtle happening, regardless of having `--verbose-mir`
functionality or not, you still gotta go via the debugger which
offers a better view at interleaved source program with the emitted
machine code. Finally, I believe `-femit-asm` when we add it will offer a
more generic substitute.
2022-05-15 18:21:50 +02:00
Luuk de Gram
5138856a72 test harness: Set filename on error return
While calling `next` an error can occur while parsing the file.
However, we don't set the filename that is currently being processed, until `next` completed successfully.
This means that for invalid test names, the wrong filename was being displayed in the panic message.
The fix is to retrieve the correct filename when an error occurs and then setting the filename appropriately.
2022-05-15 09:30:59 +02:00
Robin
1bdcbd18ae
init-exe: add note about log_level in ReleaseSmall and ReleaseFast build mode (#11626)
As suggested in https://github.com/ziglang/zig/issues/9945#issuecomment-950114977 by @wizzard0.

Fixes #9945.
2022-05-14 12:56:58 +02:00
Andrew Kelley
802f220739
Merge pull request #11647 from ziglang/migrate-runtime-safety-tests
migrate runtime safety tests to the new test harness
2022-05-13 23:57:15 -04:00
Andrew Kelley
0cd43b0f86 runtime safety tests only on the native target
This matches master branch. We can look into adding more target coverage
as we switch to stage2. As it stands, this works around having to
duplicate the "Executor" logic to figure out when to not run the tests
due to them being non-native.
2022-05-13 17:59:06 -07:00
Andrew Kelley
7d8b90b905 test harness: actually run the stage1 "run" tests 2022-05-13 17:32:23 -07:00
Andrew Kelley
c30edd78f9 std.Progress: activate() calls maybeRefresh()
This makes the progress bar display the ongoing operation in the case
that the API user calls activate().
2022-05-13 14:31:30 -07:00
Andrew Kelley
b986fcfc99 test-cases: honor -Dtest-filter argument from zig build 2022-05-13 14:31:02 -07:00
Andrew Kelley
f6e9b6620d build.zig: rename a local variable 2022-05-13 14:30:43 -07:00
Andrew Kelley
915032715f test harness: dump stderr when compiler crashes 2022-05-13 14:03:20 -07:00