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stage2: fix {add,sub,mul}_with_overflow vectorization in LLVM backend

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William Sengir 2022-03-26 15:40:31 -07:00 committed by Andrew Kelley
parent 5b03d55c5e
commit c641fb8f05
1 changed files with 2 additions and 1 deletions
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src/codegen/llvm.zig
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@ -5604,8 +5604,9 @@ pub const FuncGen = struct {
const rhs = try self.resolveInst(extra.rhs);
const lhs_ty = self.air.typeOf(extra.lhs);
const scalar_ty = lhs_ty.scalarType();
const intrinsic_name = if (lhs_ty.isSignedInt()) signed_intrinsic else unsigned_intrinsic;
const intrinsic_name = if (scalar_ty.isSignedInt()) signed_intrinsic else unsigned_intrinsic;
const llvm_lhs_ty = try self.dg.llvmType(lhs_ty);