Andrew Kelley
6dc5ce931c
Merge pull request #10959 from joachimschmidt557/stage2-aarch64
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stage2 AArch64: misc improvements
2022-02-22 01:30:49 -05:00
joachimschmidt557
25f73224f7
stage2 AArch64: pass a few more behavior tests
2022-02-21 23:05:16 +01:00
joachimschmidt557
2ba1ef165a
stage2 AArch64: implement genSetReg for ptr_stack_offset
2022-02-21 22:54:14 +01:00
joachimschmidt557
ec62e76455
stage2 AArch64: replace genMulConstant with binOp
2022-02-21 22:54:09 +01:00
joachimschmidt557
19c683fab0
stage2 AArch64: distinguish between sp/wsp and xzr/wzr
2022-02-21 22:44:47 +01:00
joachimschmidt557
a9154a7eaf
stage2 AArch64: implement storing to memory
2022-02-21 22:44:40 +01:00
Andrew Kelley
74303a3d95
Merge pull request #10925 from Vexu/stage2
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stage2: support anon init through error unions and optionals
2022-02-21 14:18:17 -05:00
gwenzek
628e9e6d04
enable Gpu address spaces ( #10884 )
2022-02-21 14:05:27 -05:00
Carlos Zúñiga
d8da9a01fc
Use lowercase in shasum for windows builds
2022-02-21 00:40:46 -05:00
Ali Chraghi
a4df443f96
Update Tokenizer Dump Function
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fix missed `loc` field
2022-02-20 17:47:42 -05:00
Steven Fackler
2c8541bdde
Support -Wl,--soname
2022-02-20 13:56:12 -05:00
David John
bdb5713941
stage2: fix typo in riscv64/Emit.zig
2022-02-20 19:10:54 +01:00
Luuk de Gram
bb05a8a08a
stage2: Fix 32bit builds
2022-02-20 18:16:28 +01:00
Veikka Tuominen
a5ac062689
stage2: make field/array base ptr work at comptime
2022-02-20 11:59:49 +02:00
Veikka Tuominen
65aa333197
fix formatting in openbsd.zig
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CI was failing for unrelated reasons so this went unnoticed
2022-02-20 11:58:42 +02:00
Dante Catalfamo
ec59a04138
Add OpenBSD auth functions
2022-02-20 09:58:58 +02:00
Andrew Kelley
7d9e3840bb
Sema: fix inline break from a non-comptime scope to outer one
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Prior to this, the compiler would hit an assertion because the
break_inline would not successfully move the compile-time control flow.
2022-02-20 00:20:29 -07:00
Andrew Kelley
01638c250f
Sema: implement readFromMemory for arrays
2022-02-20 00:08:05 -07:00
Andrew Kelley
bfff8544e1
AstGen: emit break_inline for corresponding inline loops
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Prior to this commit there would be a `break` ZIR instruction to break
from a `block_inline` which is a mismatch.
2022-02-19 20:26:57 -07:00
Veikka Tuominen
a2533e6fca
stage2: validate struct/array init ty
2022-02-20 02:11:06 +02:00
Veikka Tuominen
6f0601c793
stage2: support anon init through error unions and optionals at runtime
2022-02-20 02:11:02 +02:00
Andrew Kelley
8841a71aa6
AstGen: evaluate comptime var init expressions in a comptime context
2022-02-19 15:11:18 -07:00
Andrew Kelley
746435a954
Sema: implement @typeInfo for list literals
2022-02-19 15:11:18 -07:00
Lee Cannon
b0cdd3d0e6
StackIterator should not try to check validity on freestanding
2022-02-19 15:38:56 -05:00
Veikka Tuominen
27c63bf433
stage2: implement errunion_payload_ptr_set
2022-02-19 20:48:00 +02:00
Veikka Tuominen
89f6ff1771
stage2: correct use of .unwrap_err_union_* in LLVM and C backend
2022-02-19 20:21:48 +02:00
Veikka Tuominen
e027492243
stage2: support anon init through error unions and optionals
2022-02-19 20:21:19 +02:00
Jakub Konka
539bb8a2d7
Merge pull request #10927 from ziglang/x64-idiv-imul
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stage2,x64: implement integer division
2022-02-19 17:35:58 +01:00
Joachim Schmidt
e86a89d3f0
Merge pull request #10926 from joachimschmidt557/stage2-arm
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stage2 ARM: move to binOp lowering mechanism
2022-02-19 15:37:06 +01:00
Jakub Konka
59df39e949
add integer division tests
2022-02-19 14:24:03 +01:00
Jakub Konka
da86839af0
x64: clean up implementation of divs, mod, rem for integers
2022-02-19 14:24:03 +01:00
Jakub Konka
bd396d7e07
x64: add unsigned div and move logic into a helper fn
2022-02-19 14:24:03 +01:00
Jakub Konka
2c13a4b87e
x64: implement div_exact for ints (signed+unsigned)
2022-02-19 14:24:03 +01:00
Jakub Konka
1f4aa5ef78
x64: add lowering for single operand imul and idiv
2022-02-19 14:24:03 +01:00
joachimschmidt557
669603029e
stage2 ARM: implement airCmp with binOp lowering mechanism
2022-02-19 12:12:29 +01:00
joachimschmidt557
c29bf2f51a
stage2 ARM: move shl, shr to binOp lowering mechanism
2022-02-19 12:06:34 +01:00
joachimschmidt557
3b1762bb47
stage2 ARM: fix boolean and bitwise not
2022-02-19 12:06:34 +01:00
joachimschmidt557
7b833b2fba
stage2 ARM: move {bool,bit}_{or,and} to binOp lowering mechanism
2022-02-19 12:06:34 +01:00
joachimschmidt557
985a442f46
stage2 ARM: move mul to binOp lowering mechanism
2022-02-19 12:06:34 +01:00
joachimschmidt557
67e3346633
stage2 ARM: move add and sub to new binOp lowering mechanism
2022-02-19 12:06:30 +01:00
joachimschmidt557
23915c2c44
stage2 ARM: simplify invocations of genInlineMemcpy
2022-02-19 12:04:54 +01:00
Veikka Tuominen
2f0204aca3
parser: fix "previous field here" pointing to wrong field
2022-02-19 10:15:54 +02:00
Andrew Kelley
2e1c16d649
Merge pull request #10924 from ziglang/air-independence-day
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AIR independence day
2022-02-19 02:57:48 -05:00
Andrew Kelley
4e1e5ab622
stage2: make AIR not reference ZIR for inline assembly
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Instead it stores all the information it needs to into AIR.
closes #10784
2022-02-18 19:41:32 -07:00
Andrew Kelley
123076ea88
ArrayList: add unusedCapacitySlice to the unmanaged API
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This function is super nice thank you whoever added it 👍
2022-02-18 19:35:39 -07:00
Andrew Kelley
09d93ec845
Merge pull request #10887 from topolarity/stage2-bitreverse-byteswap
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stage2 llvm: Implement `@bitReverse`, `@byteSwap` built-ins
2022-02-18 20:29:31 -05:00
Andrew Kelley
32edb9b55d
stage2: eliminate ZIR arg instruction references to ZIR
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Prior to this commit, the AIR arg instruction kept a reference to a ZIR
string index for the corresponding parameter name. This is used by DWARF
emitting code. However, this is a design flaw because we want AIR
objects to be independent from ZIR.
This commit saves the parameter names into memory managed by
`Module.Fn`. This is sub-optimal because we should be able to get the
parameter names from the ZIR for a function without having them
redundantly stored along with `Fn` memory. However the current way that
ZIR param instructions are encoded does not support this case. They
appear in the same ZIR body as the function instruction, just before it.
Instead, they should be embedded within the function instruction, which
will allow this TODO to be solved. That improvement is too big for this
commit, however.
After this there is one last dependency to untangle, which is for inline
assembly. The issue for that is #10784 .
2022-02-18 16:56:12 -07:00
Cody Tapscott
db80dff4e0
Add backend-specific skips for bitreverse, byteswap tests
2022-02-18 14:28:32 -07:00
Cody Tapscott
fe1d6c2f56
Skip failing stage1 @bitReverse test
2022-02-18 14:28:32 -07:00
Cody Tapscott
ef417f19e1
stage2: Implement @bitReverse and @byteSwap
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This change implements the above built-ins for Sema and the LLVM
backend. Other backends have had placeholders added for lowering.
2022-02-18 14:28:32 -07:00
