Luuk de Gram
33b2f4f382
wasm: Implement debug info for parameters
2022-05-09 18:51:46 +02:00
Luuk de Gram
8e1c220be2
wasm: Add basic debug info references
2022-05-09 18:51:46 +02:00
Andrew Kelley
d7f8368da8
Merge pull request #11609 from ziglang/win-compiler-rt
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compiler-rt: avoid symbol collisions with Windows libc
2022-05-08 19:29:21 -04:00
Hannes Bredberg
ea3f5905f0
Add Win64 calling convention
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Closes ziglang/zig#11585
2022-05-08 16:28:10 -04:00
Andrew Kelley
6fde2fcd51
allow in-memory coercion of differently-named floats with same bits
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For example, this allows passing a `*c_longdouble` where a `*f80` is
expected, provided that `c_longdouble` maps to `f80` for this target.
2022-05-08 13:05:16 -07:00
Jakub Konka
9416b4d993
Merge pull request #11608 from ziglang/stage2-regalloc
2022-05-08 11:20:14 +02:00
Jakub Konka
f161d3875a
Merge pull request #11605 from Luukdegram/wasm-mul-overflow
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stage2: wasm - Improve `@mulWithOverflow` implementation
2022-05-07 23:30:08 +02:00
Jakub Konka
6bf67eada4
arm: lock dest register in shl_overflow so that we do not spill it
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Nerf two tests - they will require further investigation, but arm
now passes all tests with the safety PR.
2022-05-07 22:53:17 +02:00
Jakub Konka
756ddf0925
arm: fix CF flags spilling and implement genSetStack for reg with overflow flags
2022-05-07 22:35:41 +02:00
Luuk de Gram
ad4f0dda8b
wasm: Fix @floatToInt and split overflow ops
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As we now store negative signed integers as two's complement,
we must also ensure that when truncating a float, its value is wrapped
around the integer's size.
This also splits `@mulWithOverflow` into its own function to make
the code more maintainable and reduce branching.
2022-05-07 17:04:19 +02:00
Luuk de Gram
0c51e703f1
wasm: @addWithOverflow for bitsize 32
2022-05-07 14:24:18 +02:00
Jakub Konka
f57b059e58
regalloc: refactor locking multiple registers at once
2022-05-07 13:27:11 +02:00
Jakub Konka
bf11cdc9d8
x64: refactor code to avoid stage1 sema limitations
2022-05-07 13:19:53 +02:00
Jakub Konka
197c2a465f
regalloc: rename freeze/unfreeze to lock/unlock registers
2022-05-07 10:46:05 +02:00
Andrew Kelley
e8c85450fe
Merge pull request #11592 from ziglang/stage3-macos-linker
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Sema: solve a false positive "depends on itself"
2022-05-07 04:38:19 -04:00
Jakub Konka
43a627927f
x64: fix misused register locks
2022-05-07 10:31:08 +02:00
Andrew Kelley
ec95e00e28
flatten lib/std/special and improve "pkg inside another" logic
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stage2: change logic for detecting whether the main package is inside
the std package. Previously it relied on realpath() which is not portable.
This uses resolve() which is how imports already work.
* stage2: fix cleanup bug when creating Module
* flatten lib/std/special/* to lib/*
- this was motivated by making main_pkg_is_inside_std false for
compiler_rt & friends.
* rename "mini libc" to "universal libc"
2022-05-06 22:41:00 -07:00
Andrew Kelley
3b60ab4872
stage2: fix std lib tests always filtering out all tests
2022-05-06 22:41:00 -07:00
Andrew Kelley
f034cef262
link/MachO: use const instead of var and limit scope of vars
2022-05-06 22:41:00 -07:00
Andrew Kelley
9afc4fe0e2
Sema: solve a false positive "depends on itself"
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This improves the ABI alignment resolution code.
This commit fully enables the MachO linker code in stage3. Note,
however, that there are still miscompilations in stage3.
2022-05-06 22:40:57 -07:00
Andrew Kelley
0df28f9d45
Merge pull request #11492 from ziglang/ci-stage3-behavior
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CI: add non-LLVM backends to the test matrix
2022-05-06 22:51:55 -04:00
Jakub Konka
efeb031b79
macho: skip cache if cache_mode is .whole
2022-05-07 01:52:00 +02:00
Jakub Konka
a2dbe6589e
macho: share traditional codepaths with stage2+llvm backend
2022-05-07 01:44:26 +02:00
Jakub Konka
ac954eb539
regalloc: ensure we only freeze/unfreeze at the outermost scope
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This prevents a nasty type of bugs where we accidentally unfreeze
a register that was frozen purposely in the outer scope, risking
accidental realloc of a taken register.
Fix CF flags spilling on aarch64 backend.
2022-05-07 00:57:55 +02:00
Luuk de Gram
4df65fc264
wasm: Store signed ints as two's complement
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When a signed integer is negative, the integer will be stored as a two's complement,
rather than its signed value. Instead, we verify the signed bits during arithmetic operations.
This fixes signed cases of `@mulWithOverflow`.
2022-05-06 21:58:25 +02:00
Andrew Kelley
d136cd3202
LLVM: rework the previous commit
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Idiomatic Zig, use const instead of var, simplify the logic.
2022-05-06 11:43:06 -07:00
Jakub Konka
ac1aaec9c3
x64: handle CF flags spilling in overflow calls
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Handle spilling of CF flags set with an overflow call.
Add saving stack offset to memory.
2022-05-06 13:42:11 +02:00
Jakub Konka
edb3adaa33
stage2,llvm: handle softfloats in @intToFloat and @floatToInt
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If the hw doesn't have support for exotic floating-point types such
as `f80`, we lower the call to a compiler-rt function call instead.
I've added a behavior test specifically targeting this use case which
now passes on `aarch64-macos`.
Additionally, this commit makes it possible to successfully build
stage3 on `aarch64-macos`. We can print the compiler's help message,
however, building with it needs a little bit more love still.
2022-05-05 22:29:30 -07:00
Jakub Konka
df38dfa4d1
Merge pull request #11591 from ziglang/x64-overflow
2022-05-06 07:28:44 +02:00
Jakub Konka
09d2b6c4e1
Merge pull request #11487 from koachan/sparc64-codegen
2022-05-06 07:27:30 +02:00
Jakub Konka
e3160ec573
x64: mul_with_overflow: cannot reuse operand if not the result
2022-05-05 22:51:12 +02:00
Jakub Konka
0728847ce7
x64: handle unsigned mul_with_overflow for non-pow-2 ints
2022-05-05 22:51:12 +02:00
Jakub Konka
0fc1e8b54f
x64: handle signed mul_with_overflow for non-pow-2 ints
2022-05-05 22:51:12 +02:00
Jakub Konka
ebfc2825ab
x64: explicitly handle Vector vs Int types for overflow arith
2022-05-05 22:51:12 +02:00
Jakub Konka
90a8817f55
aarch64: ensure we set correct operand size at codegen stage
2022-05-05 22:33:03 +02:00
Jakub Konka
d112cd52f3
aarch64: fix mul_with_overflow for ints <= 32bits
2022-05-05 21:43:36 +02:00
Jakub Konka
f4421c01e8
aarch64: implement mul_with_overflow for ints in range 33-64 bits incl
2022-05-05 21:43:36 +02:00
Jakub Konka
8715b01005
aarch64: implement mul_with_overflow for <= 32bit ints
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Add emitters for `smull`, `umull` and `tst (immediate)` instructions.
2022-05-05 21:43:36 +02:00
joachimschmidt557
aaacda4df9
stage2 AArch64: implement shl_with_overflow
2022-05-05 21:43:35 +02:00
joachimschmidt557
f267e7a8b4
stage2 AArch64: implement {add,sub}_with_overflow for all ints < 64
2022-05-05 21:43:35 +02:00
joachimschmidt557
c2d2307d09
stage2 AArch64: initial implementation of {add,sub}_with_overflow
2022-05-05 21:43:35 +02:00
Jakub Konka
64927aa782
sparcv9: fix typo in def comment
2022-05-05 19:38:55 +02:00
Koakuma
5a6f0d2e51
stage2: sparcv9: Update Mir tag doc comments
2022-05-05 19:34:06 +02:00
Koakuma
e963d5be0b
stage2: sparcv9: Simplify debug info emission, remove unused formats
2022-05-05 19:34:06 +02:00
Koakuma
c73eb00727
stage2: sparcv9: Add debug info generation for args
2022-05-05 19:34:05 +02:00
Koakuma
e76d52c74d
stage2: sparcv9: Remove dbg_arg instruction
2022-05-05 19:34:05 +02:00
Koakuma
ae201807f5
stage2: sparcv9: Simplify genLoad/genStore
2022-05-05 19:34:05 +02:00
Koakuma
f6bf3dd78c
stage2: sparcv9: Fix stack space accounting
2022-05-05 19:34:04 +02:00
Koakuma
e03ec51b4b
stage2: sparcv9: Pad branch delay slots with nops
2022-05-05 19:34:04 +02:00
Koakuma
a00d69ea4a
stage2: sparcv9: Implement basic stack load/stores
2022-05-05 19:34:04 +02:00
