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stage2: sparcv9: Simplify debug info emission, remove unused formats
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c73eb00727
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@ -101,22 +101,22 @@ fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {
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}
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}
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fn mirDebugPrologueEnd(self: *Emit) !void {
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switch (self.debug_output) {
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fn mirDebugPrologueEnd(emit: *Emit) !void {
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switch (emit.debug_output) {
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.dwarf => |dbg_out| {
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try dbg_out.dbg_line.append(DW.LNS.set_prologue_end);
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try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column);
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try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);
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},
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.plan9 => {},
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.none => {},
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}
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}
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fn mirDebugEpilogueBegin(self: *Emit) !void {
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switch (self.debug_output) {
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fn mirDebugEpilogueBegin(emit: *Emit) !void {
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switch (emit.debug_output) {
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.dwarf => |dbg_out| {
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try dbg_out.dbg_line.append(DW.LNS.set_epilogue_begin);
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try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column);
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try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);
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},
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.plan9 => {},
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.none => {},
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@ -232,10 +232,10 @@ fn mirTrap(emit: *Emit, inst: Mir.Inst.Index) !void {
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// Common helper functions
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fn dbgAdvancePCAndLine(self: *Emit, line: u32, column: u32) !void {
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const delta_line = @intCast(i32, line) - @intCast(i32, self.prev_di_line);
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const delta_pc: usize = self.code.items.len - self.prev_di_pc;
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switch (self.debug_output) {
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fn dbgAdvancePCAndLine(emit: *Emit, line: u32, column: u32) !void {
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const delta_line = @intCast(i32, line) - @intCast(i32, emit.prev_di_line);
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const delta_pc: usize = emit.code.items.len - emit.prev_di_pc;
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switch (emit.debug_output) {
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.dwarf => |dbg_out| {
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// TODO Look into using the DWARF special opcodes to compress this data.
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// It lets you emit single-byte opcodes that add different numbers to
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@ -248,38 +248,12 @@ fn dbgAdvancePCAndLine(self: *Emit, line: u32, column: u32) !void {
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leb128.writeILEB128(dbg_out.dbg_line.writer(), delta_line) catch unreachable;
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}
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dbg_out.dbg_line.appendAssumeCapacity(DW.LNS.copy);
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self.prev_di_pc = self.code.items.len;
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self.prev_di_line = line;
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self.prev_di_column = column;
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self.prev_di_pc = self.code.items.len;
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emit.prev_di_pc = emit.code.items.len;
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emit.prev_di_line = line;
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emit.prev_di_column = column;
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emit.prev_di_pc = emit.code.items.len;
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},
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.plan9 => |dbg_out| {
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if (delta_pc <= 0) return; // only do this when the pc changes
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// we have already checked the target in the linker to make sure it is compatable
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const quant = @import("../../link/Plan9/aout.zig").getPCQuant(self.target.cpu.arch) catch unreachable;
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// increasing the line number
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try @import("../../link/Plan9.zig").changeLine(dbg_out.dbg_line, delta_line);
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// increasing the pc
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const d_pc_p9 = @intCast(i64, delta_pc) - quant;
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if (d_pc_p9 > 0) {
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// minus one because if its the last one, we want to leave space to change the line which is one quanta
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try dbg_out.dbg_line.append(@intCast(u8, @divExact(d_pc_p9, quant) + 128) - quant);
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if (dbg_out.pcop_change_index.*) |pci|
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dbg_out.dbg_line.items[pci] += 1;
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dbg_out.pcop_change_index.* = @intCast(u32, dbg_out.dbg_line.items.len - 1);
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} else if (d_pc_p9 == 0) {
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// we don't need to do anything, because adding the quant does it for us
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} else unreachable;
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if (dbg_out.start_line.* == null)
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dbg_out.start_line.* = self.prev_di_line;
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dbg_out.end_line.* = line;
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// only do this if the pc changed
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self.prev_di_line = line;
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self.prev_di_column = column;
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self.prev_di_pc = self.code.items.len;
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},
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.none => {},
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else => {},
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}
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}
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