808 Commits

Author SHA1 Message Date
joachimschmidt557
f89ace4d04
stage2 ARM: add integer modulo with constant power-of-two rhs 2022-07-12 23:22:15 +02:00
joachimschmidt557
47d1874218
stage2 ARM: implement division by constant int power-of-two divisors 2022-07-12 22:43:55 +02:00
Andrew Kelley
6bc6e47b15 stage2: lower float negation explicitly
Rather than lowering float negation as `0.0 - x`.

 * Add AIR instruction for float negation.
 * Add compiler-rt functions for f128, f80 negation

closes #11853
2022-06-30 00:02:00 -07:00
Jakub Konka
59359b2547 aarch64: add airRetLoad for register mcv 2022-06-29 17:19:49 +02:00
joachimschmidt557
960c142060 stage2 ARM: implement basic intCast and error union wrapping 2022-06-25 21:16:51 +02:00
Koakuma
ad176b319d stage2: sparc64: Implement SPARCv9 movr 2022-06-24 21:19:33 +07:00
Koakuma
65c5ef52e9 stage2: sparc64: Implement airRem, airMod, and SPARCv9 s/udivx 2022-06-24 21:19:33 +07:00
Koakuma
27adee3f12 stage2: sparc64: Implement airErrUnionPayloadPtrSet 2022-06-24 21:19:33 +07:00
Koakuma
84a57987c7 stage2: sparc64: Implement airAggregateInit 2022-06-24 21:19:33 +07:00
Koakuma
dd57729299 stage2: sparc64: Update BigTomb implementation to use Liveness
Change BigTomb implementation to call to Liveness' implementation
rather than implementing feed() in itself.
This is modelled after the AArch64 backend.
2022-06-24 21:19:33 +07:00
Koakuma
e2cb25358e stage2: sparc64: Implement airCall with BigTomb use for return 2022-06-24 21:19:33 +07:00
Koakuma
26b63b022f stage2: sparc64: Add airMemset placeholder 2022-06-24 21:19:33 +07:00
Koakuma
4fd0500bb5 stage2: sparc64: Implement airBoolToInt 2022-06-24 21:19:33 +07:00
Koakuma
837cd0d8af stage2: sparc64: Fix airNot comments/error messages 2022-06-24 21:19:33 +07:00
Koakuma
be6718b796 stage2: sparc64: Implement airIsNull/airIsNonNull 2022-06-24 21:19:33 +07:00
Koakuma
4d15284c3c stage2: sparc64: Implement SPARCv9 shifts 2022-06-24 21:19:33 +07:00
Koakuma
513ab4eb56 stage2: sparc64: Implement airIntCast basics 2022-06-24 21:19:33 +07:00
Koakuma
36bfe4b7ef stage2: sparc64: Implement airFence + SPARCv9 membar 2022-06-24 21:19:33 +07:00
Koakuma
18d61d691c stage2: sparc64: Implement airArrayElemVal 2022-06-24 21:19:33 +07:00
Koakuma
672cd2f02f stage2: sparc64: Implement SPARCv9 and 2022-06-24 21:19:33 +07:00
Koakuma
6218d70d09 stage2: sparc64: Implement airBinOp for and, or, and xor 2022-06-24 21:19:33 +07:00
Koakuma
921f776224 stage2: sparc64: Implement airTry 2022-06-24 21:19:27 +07:00
Koakuma
40590c8bf9 stage2: sparc64: Save registers before calling another function 2022-06-24 21:08:41 +07:00
Koakuma
5c8612642b stage2: sparc64: Use official encoding for not rs2, rs1 2022-06-24 21:08:41 +07:00
Koakuma
e7fde5f64e stage2: sparc64: Introduce condition_register MCValue type
Introduce condition_register MCValue type for future uses with BPr/MOVr
(mostly when needing to compare a signed value with zero)
2022-06-24 21:08:41 +07:00
Koakuma
accc3bad63 stage2: sparc64: Move conditional branch emission out of airCondBr 2022-06-24 21:08:41 +07:00
Koakuma
8b3f7d2ad8 stage2: sparc64: Merge the compare_flag structs into condition_flags
This follows the design in the aarch64 backend (commit
61844b6bd405b4cca3ab673284609aa6a651d506).
2022-06-24 21:08:40 +07:00
Luuk de Gram
7c87f9c828 link:clarification & enable MachO getGlobalSymbol
This adds clarification to the getGlobalSymbol doc comments,
as well as renames the `addExternFn` function for MachO to `getGlobalSymbol`.
This function will now be called from 'src/link.zig' as well.

Finally, this also enables compiling zig's libc using LLVM even though
the `fno-LLVM` flag is given.
2022-06-24 08:12:17 +02:00
Luuk de Gram
6ae898b244 wasm: more f16 support and cleanup of intrinsics
`genFunctype` now accepts calling convention, param types, and return type
as part of its function signature rather than `fnData`. This means
we no longer have to create a dummy for our intrinsic call abstraction.
This also adds support for f16 division and builtins such as `@ceil` & more.
2022-06-24 08:12:17 +02:00
Luuk de Gram
9015efe405 wasm: Implement @mulAdd for f16
Implements `@mulAdd` for floats with bitsize 16, where it generates
a call into compiler-rt's `fmaf` function. Note that arguments
for fmaf are different in order than `@mulAdd`.
2022-06-24 08:12:17 +02:00
Luuk de Gram
5ebaf49ebb wasm: Implement basic f16 support
This implements binary operations and comparisons
for floats with bitsize 16. It does this by calling into
compiler-rt to first extend the float to 32 bits, perform the operation,
and then finally truncate back to 16 bits. When loading and storing the f16,
we do this as an unsigned 16bit integer.
2022-06-24 08:12:17 +02:00
Luuk de Gram
8d03e4fc6b link: Implement API to get global symbol index 2022-06-24 08:12:17 +02:00
Luuk de Gram
359b61aec3 wasm: Create compiler-rt symbols and lowering
Implements the creation of an undefined symbol for a compiler-rt intrinsic.
Also implements the building of the function call to said compiler-rt intrinsic.
2022-06-24 08:12:17 +02:00
Luuk de Gram
a50147bfff
wasm: fixes for signed saturation 2022-06-19 17:26:44 +02:00
Luuk de Gram
05600a6d84
wasm: saturating shift-left for signed integers 2022-06-19 15:50:03 +02:00
Luuk de Gram
53831442ef
wasm: saturating shift-left for unsigned integers 2022-06-19 14:30:17 +02:00
Luuk de Gram
ce5d934f5f
wasm: saturating add and sub for signed integers 2022-06-19 14:30:17 +02:00
Luuk de Gram
fcd4280a8c
wasm: implement saturating add, sub for unsigned
Implements +| and -| for unsigned integers <= 64 bits.
2022-06-19 14:30:13 +02:00
Andrew Kelley
ffa700ee58
Merge pull request #11837 from Vexu/stage2
Fix (nearly) all stage2 crashes when testing stdlib
2022-06-12 17:45:57 -04:00
Veikka Tuominen
0333ff4476 stage2: make error{} the same size as anyerror
Having `error{}` be a zero bit type causes issues when it interracts
with empty inferred error sets which are the same size as `anyerror`.
2022-06-11 23:49:33 +03:00
Luuk de Gram
13123afedb wasm: implement @ceil, @floor and @trunc 2022-06-11 19:38:00 +02:00
Luuk de Gram
f05e09a0cf wasm: optimize & simplify sign extension
Rather than storing all the shifts in temporaries, we perform the correct
shifting without temporaries. This makes the runtime code more performant
and also the backend code is simplified as we have a singular abstraction.
2022-06-11 19:38:00 +02:00
Luuk de Gram
18afcc34c6 wasm: implement @divFloor for signed integers 2022-06-11 19:38:00 +02:00
Luuk de Gram
3011ef2d82 wasm: signed integer division (non-floor)
Implements the non-floor variants of signed integer division.
2022-06-11 19:38:00 +02:00
Luuk de Gram
9b84f29503 wasm: support all @div{trunc/floor/exact} ops
This does however not support floats of bitsizes
different than 32 or 64. f16, f80, f126 will require
support for compiler-rt and are out-of-scope for this commit.

Signed integers are currently not supported either.
2022-06-11 19:38:00 +02:00
Luuk de Gram
180baa0546 wasm:@byteSwap for 24 bit integers 2022-06-11 19:38:00 +02:00
Luuk de Gram
bc499de328 wasm: implement @byteSwap for 16/32bit integers 2022-06-11 19:38:00 +02:00
Andrew Kelley
bac132bc8f introduce std.debug.Trace
And use it to debug a LazySrcLoc in stage2 that is set to a bogus value.

The actual fix in this commit is:

```diff
-        try sema.emitBackwardBranch(&child_block, call_src);
+        try sema.emitBackwardBranch(block, call_src);
```
2022-06-09 15:37:16 -07:00
joachimschmidt557
61844b6bd4 stage2 AArch64: introduce MCValue.condition_flags
Follows 9747303d16dfca61316a292d1e05ac901191e3a3 for AArch64
2022-06-07 23:34:42 -04:00
Jakub Konka
3cb3873382
Merge pull request #11814 from ziglang/x64-stack-handling
x64: improves stack handling, fixes a heisenbug, adds micro-optimisations
2022-06-07 23:22:20 +02:00