938 Commits

Author SHA1 Message Date
Veikka Tuominen
972c39e2c0
Merge pull request #13219 from Vexu/stage2-fixes
Stage2 bug fixes
2022-10-21 12:11:49 +02:00
Veikka Tuominen
646d927c79 stage2: fix handling of aarch64 C ABI float array like structs
Closes #11702
Closes #13125
2022-10-20 20:11:12 +03:00
Veikka Tuominen
51491186cb stage2: fix x86_64 C ABI of struct with array member
Closes #12185
2022-10-20 20:11:12 +03:00
joachimschmidt557
67941926b2
stage2 AArch64: Remove remaining legacy binOp code 2022-10-20 16:14:52 +02:00
joachimschmidt557
dd62d5941e
stage2 AArch64: move remaining operations out of binOp 2022-10-20 16:14:52 +02:00
joachimschmidt557
3800bb538a
stage2 AArch64: mov mul,div,mod to new allocRegs mechanism 2022-10-20 16:14:52 +02:00
joachimschmidt557
ea7a60116d
stage2 AArch64: move add+sub to new allocRegs mechanism 2022-10-20 16:14:52 +02:00
joachimschmidt557
d8fddb535c
stage2 AArch64: move cmp to new allocRegs mechanism
Remove cmp from binOp in the process
2022-10-20 16:14:52 +02:00
joachimschmidt557
5838fe89c1
stage2 AArch64: introduce ldr_ptr_stack Mir instruction 2022-10-20 16:14:52 +02:00
joachimschmidt557
230bafa1ab
stage2 AArch64: simplify allocMem 2022-10-20 16:14:52 +02:00
joachimschmidt557
151e15e444
stage2 AArch64: merge floating-point registers into Register enum 2022-10-20 16:14:50 +02:00
Ali Chraghi
ca27055cda all: rename @maximum to @max and @minimum to @min 2022-10-18 14:15:16 +03:00
Luuk de Gram
0aa23fe8b7
wasm: rename 'self' to more explanatory name
'Self' isn't a very good name to describe what it does.
This commit changes the type name into `CodeGen` and the parameter
to `func` as we're generating code for a function.
With this change, the backend's coding style is in line with the
self-hosted Wasm-linker.
2022-10-16 15:54:56 +02:00
Luuk de Gram
ff1cab037c
wasm: re-use operands
When we return an operand directly as a result, we must call
`reuseOperand`. This commit ensures it's done for all currently-
implemented AIR instructions.
2022-10-16 15:54:17 +02:00
Luuk de Gram
273b8e20ca
wasm: allow merging single branches
Rather than accepting a canonical branch and a target branch
we allow to directly merge a branch into the parent branch.
This is possible as there's no overlapping and we have infinite
registers to our availability. This makes merging a lot simpler.
2022-10-16 15:54:17 +02:00
Luuk de Gram
6fcd72355c
wasm: correctly get the type of a local for free
When determining the type of a local (read: register), we would
previously subtract the stack locals also. However, this locals
are also within the same `locals` list, meaning the type of the
local we were retrieving was off by 2. This could create a validation
error when we re-use a local of a different type.
2022-10-16 15:54:17 +02:00
Luuk de Gram
e62bb1d689
wasm: implement branching
Upon a branch, we only allow locals to be freed which were allocated
within the same branch as where they die. This ensures that when two
or more branches target the same operand we do not try to free
it more than once. This does however not implement freeing the local
upon branch merging yet.
2022-10-16 15:54:16 +02:00
Luuk de Gram
576bb3f0a9
wasm: de -and increment reference count locals
When reusing an operand it increases the reference count, then when
an operand dies it will only decrease the reference count. When
this reaches 0, the local will be virtually freed, meaning it can be
re-used for a new local.
2022-10-16 15:54:16 +02:00
Luuk de Gram
b17c8c5424
wasm: reference count locals
By reference counting the locals, we can ensure that when we free
a local, no local will be reused while it still has references pointing
to it. This prevents misscompilations. The compiler will also panic if
we free a local more than we reference it, introducing extra safety to
ensure they match up.
2022-10-16 15:54:16 +02:00
Luuk de Gram
b9b20b14ea
wasm: use liveness analysis for locals
This hooks reusal of locals into liveness analysis.
Meaning that when an operand dies, and is a local,
it will automatically be freed so it can be re-used
when a new local is required. The result of this, is
a lower allocation required for locals. Having less
locals means smaller binary size, as well as faster
compilation speed when loaded by the runtime.
2022-10-16 15:54:16 +02:00
Robin Voetter
5d429b03e3
stage2: add @addrSpaceCast builtin 2022-10-12 20:36:12 +02:00
jacobly0
562ac8be48
codegen: add support for lowering .field_ptr on a slice
Closes #13068
2022-10-12 12:40:59 +03:00
Andrew Kelley
7ce1ee1bce
Merge pull request #13081 from r00ster91/docs
fix(text): hyphenation and other fixes
2022-10-12 05:26:11 -04:00
Luuk de Gram
7f508480f4 wasm-linker: convert relocation addend to i32
Addends in relocations are signed integers as theoretically it could
be a negative number. As Atom's offsets are relative to their parent
section, the relocation value should still result in a postive number.
For this reason, the final result is stored as an unsigned integer.

Also, rather than using `null` for relocations that do not support
addends. We set the value to 0 for those that do not support addends,
and have to call `addendIsPresent` to determine if an addend exists
or not. This means each Relocation costs 4 bytes less than before,
saving memory while linking.
2022-10-08 17:23:13 +02:00
r00ster91
8e2aaf6aed fix(text): hyphenate "runtime" adjectives 2022-10-05 21:33:42 +02:00
r00ster91
51d9db8569 fix(text): hyphenate "comptime" adjectives 2022-10-05 21:19:30 +02:00
Veikka Tuominen
0e77259f44 add inline switch union tag captures 2022-09-27 18:33:23 +03:00
joachimschmidt557
f014de6456
stage2 ARM: fix debug info for arguments passed in registers 2022-09-20 17:14:31 +02:00
joachimschmidt557
258b058eec
stage2 ARM: make sub_sp_scratch MIR instruction use r4
r0 is used for argument passing, so this register is not available as
a scratch register upon function entry.
2022-09-20 17:14:27 +02:00
Jakub Konka
2c971f0085 fix code formatting 2022-09-18 10:00:04 +02:00
Jakub Konka
dc6480dba5 macho: allow for add and ldr when resolving GOT_LOAD_* relocs 2022-09-18 10:00:04 +02:00
Jakub Konka
53bd7bd044 macho: move to incremental writes and global relocs for incremental 2022-09-18 10:00:04 +02:00
Koakuma
86dc982e74 stage2: sparc64: Implement airSlicePtr 2022-09-14 16:58:13 -07:00
Koakuma
ed546a7aad stage2: sparc64: Add placeholder for some Air instructions
airAddSat airSubSat airMulSat airShlSat airUnaryMath airPopcount airPrefetch
airPtrElemVal airOptionalPayload airOptionalPayloadPtr airOptionalPayloadPtrSet
2022-09-14 16:58:13 -07:00
Koakuma
0e1c68d90a stage2: sparc64: Don't track condition_flags_inst in checked binOps
This stops the emission of spurious CCR spills.
2022-09-14 16:57:31 -07:00
Koakuma
0464512f2e stage2: sparc64: Implement airShlWithOverflow 2022-09-14 16:57:31 -07:00
Koakuma
de17fe66a5 stage2: sparc64: Tidy up binOp and enable more operations
sub, mul, addwrap, subwrap, mulwrap, shr, shr_exact
2022-09-14 16:57:31 -07:00
Koakuma
ab3d3b260b stage2: sparc64: Add airClz/airCtz placeholder 2022-09-14 16:57:31 -07:00
Koakuma
b9897c3b84 stage2: sparc64: Implement airMulOverflow for <= 32 bits 2022-09-14 16:57:31 -07:00
Koakuma
844d3a5a74 stage2: sparc64: Fix SPARCv9 shift opcodes encoding 2022-09-14 16:57:31 -07:00
Koakuma
61265fba04 stage2: sparc64: Implement airBinop for bool_and/or 2022-09-14 16:57:31 -07:00
Koakuma
4fc6df9f62 stage2: sparc64: Implement airTagName 2022-09-14 16:57:31 -07:00
Koakuma
f01867f78e stage2: sparc64: Implement airWrapOptional 2022-09-14 16:57:31 -07:00
Koakuma
b6307144c0 stage2: sparc64: Implement airPtrToInt 2022-09-14 16:57:31 -07:00
Koakuma
2c9ab03b0b stage2: sparc64: Add airCmpLtErrorsLen placeholder 2022-09-14 16:57:31 -07:00
Koakuma
5b0134e3ed stage2: sparc64: Change branch_link Mir field definition 2022-09-14 16:57:31 -07:00
Koakuma
64b61f0740 stage2: sparc64: Add airFloatToInt & airIntToFloat placeholder 2022-09-14 16:57:31 -07:00
Andrew Kelley
0a89624d59 stage2: support being built in ReleaseSafe mode 2022-09-13 18:08:59 -07:00
Andrew Kelley
bec70a1a39 stage2: remove pointless discards from source code
Good riddance!
2022-09-13 02:04:20 -07:00
Jakub Konka
5778077f9f
Merge pull request #12799 from joachimschmidt557/stage2-arm
stage2 ARM: introduce allocRegs mechanism and other improvements
2022-09-10 09:13:08 +02:00