174 Commits

Author SHA1 Message Date
Andrew Kelley
597082adf4 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * build.zig
 * src/Compilation.zig
 * src/codegen/spirv/spec.zig
 * src/link/SpirV.zig
 * test/stage2/darwin.zig
   - this one might be problematic; start.zig looks for `main` in the
     root source file, not `_main`. Not sure why there is an underscore
     there in master branch.
2021-05-15 21:44:38 -07:00
Andrew Kelley
07606d12da stage2: remove SPU Mark II backend
As it stands, the backend is incomplete, and there is no active contributor,
making it dead weight.

However, anyone is free to resurrect this backend at any time.
2021-05-15 21:25:42 -07:00
Andrew Kelley
dc036f5b6f codegen: implement const value rendering for ints <= 64 bits 2021-05-15 21:00:15 -07:00
Robin Voetter
42f2ff6ec9 SPIR-V: Re-generate spec.zig 2021-05-14 19:49:32 +02:00
Robin Voetter
d45e7dfc24 SPIR-V: Begin generating types 2021-05-14 19:49:32 +02:00
Andrew Kelley
78632894da AstGen: fix elision of store_to_block_ptr for condbr 2021-05-13 17:56:01 -07:00
Andrew Kelley
c9cc09a3bf Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * lib/std/os/linux.zig
 * lib/std/os/windows/bits.zig
 * src/Module.zig
 * src/Sema.zig
 * test/stage2/test.zig

Mainly I wanted Jakub's new macOS code for respecting stack size, since
we now depend on it for debug builds able to pass one of the test cases
for recursive comptime function calls with `@setEvalBranchQuota`.

The conflicts were all trivial.
2021-05-12 16:41:20 -07:00
Andrew Kelley
a74632b50a C backend: fix emitting '$' in identifier names
This causes warnings from clang when compiled.
2021-05-11 14:51:21 -07:00
Andrew Kelley
bcf15e39e2 stage2: add owns_tv flag to Module.Decl
Decl objects need to know whether they are the owner of the Type/Value
associated with them, in order to decide whether to destroy the
associated Namespace, Fn, or Var when cleaning up.
2021-05-11 14:17:52 -07:00
Andrew Kelley
2299e5ff1d fix merge conflicts from previous commit
Any PRs merged after the one that made testing functions return errors
needs to get rebased!
2021-05-08 23:12:34 -07:00
Andrew Kelley
b88d381dec
Merge pull request #8474 from gracefuu/grace/encode-instruction
stage2 x86_64: encoding helpers, fix bugs
2021-05-09 01:36:51 -04:00
Andrew Kelley
5619ce2406 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * doc/langref.html.in
 * lib/std/enums.zig
 * lib/std/fmt.zig
 * lib/std/hash/auto_hash.zig
 * lib/std/math.zig
 * lib/std/mem.zig
 * lib/std/meta.zig
 * test/behavior/alignof.zig
 * test/behavior/bitcast.zig
 * test/behavior/bugs/1421.zig
 * test/behavior/cast.zig
 * test/behavior/ptrcast.zig
 * test/behavior/type_info.zig
 * test/behavior/vector.zig

Master branch added `try` to a bunch of testing function calls, and some
lines also had changed how to refer to the native architecture and other
`@import("builtin")` stuff.
2021-05-08 14:45:21 -07:00
Veikka Tuominen
42a95197f3 update usage of std.testing in stage2 2021-05-08 15:15:30 +03:00
Andrew Kelley
f86469bc5e stage2: semaDecl properly analyzes the decl block
Also flattened out Decl TypedValue fields into
ty, val, has_tv
and add relevant fields to Decl for alignment and link section.
2021-04-28 16:57:01 -07:00
Andrew Kelley
df24ce52b1 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
In particular I wanted to take advantage of the new hex float parsing
code.
2021-04-28 14:57:38 -07:00
joachimschmidt557
bc06e19828 stage2 riscv64: cleanup code and add tests 2021-04-28 07:20:45 +02:00
Andrew Kelley
4630e3891c AstGen: implement inline asm output 2021-04-19 18:44:59 -07:00
gracefu
0409f9e024
stage2 x86_64: simplify inst encoder to a set of dumb helper fns 2021-04-16 15:21:17 +08:00
gracefu
e1959ccd4e
stage2 x86_64: add instruction encoder helper fn 2021-04-16 15:21:16 +08:00
Andrew Kelley
bcfebb4b2b stage2: improvements aimed at std lib integration
* AstGen: emit decl lookup ZIR instructions rather than directly
   looking up decls in AstGen. This is necessary because we want to
   reuse the same immutable ZIR code for multiple generic instantiations
   (and comptime function calls).
 * AstGen: fix using members_len instead of fields_len for struct decls.
 * structs: the struct_decl ZIR instruction is now also a block. This is
   so that the type expressions, default field value expressions, and
   alignment expressions can be evaluated in a scope that contains the
   decls from the struct namespace itself.
 * Add "std" and "builtin" packages to the builtin package.
 * Don't try to build glibc, musl, or mingw-w64 when using `-ofmt=c`.
 * builtin.zig is generated without `usingnamespace`.
 * builtin.zig takes advantage of `std.zig.fmtId` for CPU features.
 * A first pass at implementing `usingnamespace`. It's problematic and
   should either be deleted, or polished, before merging this branch.
 * Sema: allow explicitly specifying the namespace in which to look up
   Decls. This is used by `struct_decl` in order to put the decls from
   the struct namespace itself in scope when evaluating the type
   expressions, default value expressions, and alignment expressions.
 * Module: fix `analyzeNamespace` assuming that it is the top-level root
   declaration node.
 * Sema: implement comptime and runtime cmp operator.
 * Sema: implement peer type resolution for enums and enum literals.
 * Pull in the changes from master branch:
   262e09c482d98a78531c049a18b7f24146fe157f.
 * ZIR: complete out simple_ptr_type debug printing
2021-04-15 19:06:39 -07:00
Michael Dusan
93cf9560b1
Merge remote-tracking branch 'origin/master' into llvm12 2021-04-11 17:40:19 -04:00
Luuk de Gram
ff5774d93d
Refactor link/wasm.zig to use offset table
This refactor inserts an offset table into wasm's data section
where each offset points to the actual data region.
This means we can keep offset indexes consistant and do not
have to perform any computer to determine where in the data section
something like a static string exists. Instead during runtime
it will load the data offset onto the stack.
2021-04-08 22:47:08 +02:00
Luuk de Gram
47f3642788
Cleanup 2021-04-08 22:47:08 +02:00
Luuk de Gram
1bd5552fc1
Calculate data length to ensure correct pointer offsets 2021-04-08 22:47:08 +02:00
Luuk de Gram
00b2e31589
Basic "Hello world" working 2021-04-08 22:47:08 +02:00
Andrew Kelley
9f744f19e7
Merge pull request #8464 from gracefuu/grace/wasm-ops
stage2 wasm: Add division and bitwise/boolean ops &, |, ^, and, or
2021-04-08 13:41:49 -07:00
joachimschmidt557
d7a89f9876 stage2 AArch64: Add conditional branch instructions 2021-04-08 13:39:11 -07:00
gracefu
e4a60b63f2
stage2 wasm: Add bitwise/boolean ops &, |, ^, and, or 2021-04-08 05:27:00 +08:00
gracefu
4c71942f84
stage2: Add .div to ir.zig 2021-04-08 05:26:56 +08:00
Andrew Kelley
015599d1ef C backend: enumerate all the types in renderType
Now that we're close to supporting all the types, get rid of the `else`
prong and explicitly list out those types that are not yet implemented.

Thanks @g-w1
2021-04-07 13:17:23 -07:00
Andrew Kelley
19cf987198 C backend: implement Enum types and values
They are lowered directly as the integer tag type, with no typedef.
2021-04-06 23:19:46 -07:00
gracefu
ec84742c89
stage2 wasm codegen: refactor to use wasm.buildOpcode 2021-04-05 16:19:52 +08:00
gracefu
3648e43dda
std/wasm: add buildOpcode to help construction of Opcodes 2021-04-05 14:44:00 +08:00
gracefu
869fc06c57
stage2 wasm: codegen mul op 2021-04-05 14:37:04 +08:00
gracefu
d1244d3608
stage2 wasm: codegen sub op 2021-04-05 14:37:04 +08:00
Andrew Kelley
545830c0ff LLVM sub-arch triple: remove TODO comment
See #6542 for more details. Upon investigation, this change is not
needed.
2021-04-04 16:10:54 -07:00
Andrew Kelley
97d7fddfb7 stage2: progress towards basic structs
Introduce `ResultLoc.none_or_ref` which is used by field access
expressions to avoid unnecessary loads when the field access itself
will do the load. This turns:

```zig
p.y - p.x - p.x
```

from

```zir
  %14 = load(%4) node_offset:8:12
  %15 = field_val(%14, "y") node_offset:8:13
  %16 = load(%4) node_offset:8:18
  %17 = field_val(%16, "x") node_offset:8:19
  %18 = sub(%15, %17) node_offset:8:16
  %19 = load(%4) node_offset:8:24
  %20 = field_val(%19, "x") node_offset:8:25
```

to

```zir
  %14 = field_val(%4, "y") node_offset:8:13
  %15 = field_val(%4, "x") node_offset:8:19
  %16 = sub(%14, %15) node_offset:8:16
  %17 = field_val(%4, "x") node_offset:8:25
```

Much more compact. This requires `Sema.zirFieldVal` to support both
pointers and non-pointers.

C backend: Implement typedefs for struct types, as well as the following
TZIR instructions:
 * mul
 * mulwrap
 * addwrap
 * subwrap
 * ref
 * struct_field_ptr

Note that add, addwrap, sub, subwrap, mul, mulwrap instructions are all
incorrect currently and need to be updated to properly handle wrapping
and non wrapping for signed and unsigned.

C backend: change indentation delta to 1, to make the output smaller and
to process fewer bytes.

I promise I will add a test case as soon as I fix those warnings that
are being printed for my test case.
2021-04-02 19:11:51 -07:00
joachimschmidt557
43d364afef stage2 AArch64: Add ldrh and ldrb instructions 2021-04-02 14:46:30 -07:00
Andrew Kelley
a0e89c9b46 Merge remote-tracking branch 'origin/master' into llvm12 2021-04-02 12:09:38 -07:00
Andrew Kelley
070a28e493
Merge pull request #8266 from ziglang/zir-memory-layout
rework ZIR memory layout; overhaul source locations
2021-03-31 23:11:15 -07:00
joachimschmidt557
e088a17f56 stage2 AArch64: implement strb and strh 2021-03-31 23:26:49 +02:00
Andrew Kelley
b85ef2300f Merge remote-tracking branch 'origin/master' into llvm12 2021-03-28 21:42:56 -07:00
Andrew Kelley
281a7baaea Merge remote-tracking branch 'origin/master' into zir-memory-layout
Wanted to make sure those new test cases still pass.

Also grab that CI fix so we can get those green check marks.
2021-03-28 19:42:43 -07:00
jacob gw
0005b34637 stage2: implement sema for @errorToInt and @intToError 2021-03-28 18:22:01 -07:00
Timon Kruiper
982df37135 stage2: handle void value in genRet in LLVM backend 2021-03-23 11:42:46 -07:00
Timon Kruiper
d73b0473a1 stage2: rename fail to todo in LLVM backend
This way we don't have to pass src to every function and we can simply
use the first node as the lazy source location for all the todo
errors.
2021-03-23 11:42:46 -07:00
Luuk de Gram
4b854b75d2
Fix getNot and add test cases 2021-03-22 19:56:38 +01:00
Luuk de Gram
803f9e5dd0
Implement more instructions for more control flow support 2021-03-22 19:56:35 +01:00
Timon Kruiper
a710368054 stage2: restructure LLVM backend
The LLVM backend is now structured into 3 different structs, namely
Object, DeclGen and FuncGen. Object represents an object that is
generated by the LLVM backend. DeclGen is responsible for generating
a decl and FuncGen is responsible for generating llvm instructions
from tzir in a function.
2021-03-20 15:10:44 -07:00
jacob gw
c50397c268 llvm backend: use new srcloc
this allows to compile with ninja
2021-03-19 14:46:37 -07:00