790 Commits

Author SHA1 Message Date
Jakub Konka
852c820841 aarch64: sub_with_overflow should always track V flag 2022-05-16 13:55:26 -07:00
Luuk de Gram
160aa4c11d wasm: Improve shl_with_overflow
This re-implements the shl_with_overflow operation from scratch,
making it a lot more robust and outputs the equal code to the LLVM backend.
2022-05-16 13:55:26 -07:00
Andrew Kelley
316bf4fce5 disable 5 failing stage2_wasm tests 2022-05-16 13:55:26 -07:00
William Sengir
bb3532e775 stage2: add more vector overflow tests 2022-05-16 13:55:26 -07:00
William Sengir
21be3d9166 stage2: add vectorized overflow arithmetic behavior tests 2022-05-16 13:55:26 -07:00
Koakuma
fb0692334e target: Rename sparcv9 -> sparc64
Rename all references of sparcv9 to sparc64, to make Zig align more with
other projects. Also, added new function to convert glibc arch name to Zig
arch name, since it refers to the architecture as sparcv9.

This is based on the suggestion by @kubkon in PR 11847.
(https://github.com/ziglang/zig/pull/11487#pullrequestreview-963761757)
2022-05-13 16:43:59 -04:00
Jakub Konka
6608fa1353
Merge pull request #11628 from ziglang/x64-shifts 2022-05-11 08:24:03 +02:00
Andrew Kelley
b33c8b0b06 Sema: comptime float negation supports negative zero
When handling the `negate` ZIR instruction, Zig now checks for a
comptime operand and handles it as a special case rather than lowering
it as `0 - x` so that the expression `-x` where `x` is a floating point
value known at compile-time, will get the negative zero bitwise
representation.
2022-05-10 21:50:55 -07:00
Jakub Konka
3c69810fe6 x64: fix binary not implementation 2022-05-10 21:30:39 +02:00
Jakub Konka
f6f98a621f x64: enable additional math test 2022-05-10 21:21:09 +02:00
Jakub Konka
1d3b714125 x64: implement shl with overflow for non-pow-2 2022-05-10 21:19:05 +02:00
Jakub Konka
d31875f7ab x64: implement shl_with_overflow for powers of two 2022-05-10 20:53:44 +02:00
Jakub Konka
2a738599a0 x64: implement missing bits in add_with_overflow and sub_with_overflow 2022-05-10 20:45:57 +02:00
Jakub Konka
f131e41db9 x64: implement shl_exact and shr_exact 2022-05-10 19:34:20 +02:00
Luuk de Gram
62453496ba wasm: Write nops for padding debug info 2022-05-09 18:51:46 +02:00
Jakub Konka
9c3d24ea0b x64: add naive impl of shr 2022-05-09 17:39:19 +02:00
Andrew Kelley
d7f8368da8
Merge pull request #11609 from ziglang/win-compiler-rt
compiler-rt: avoid symbol collisions with Windows libc
2022-05-08 19:29:21 -04:00
Andrew Kelley
6fde2fcd51 allow in-memory coercion of differently-named floats with same bits
For example, this allows passing a `*c_longdouble` where a `*f80` is
expected, provided that `c_longdouble` maps to `f80` for this target.
2022-05-08 13:05:16 -07:00
Jakub Konka
9416b4d993
Merge pull request #11608 from ziglang/stage2-regalloc 2022-05-08 11:20:14 +02:00
Jakub Konka
f161d3875a
Merge pull request #11605 from Luukdegram/wasm-mul-overflow
stage2: wasm - Improve `@mulWithOverflow` implementation
2022-05-07 23:30:08 +02:00
Jakub Konka
6bf67eada4 arm: lock dest register in shl_overflow so that we do not spill it
Nerf two tests - they will require further investigation, but arm
now passes all tests with the safety PR.
2022-05-07 22:53:17 +02:00
Luuk de Gram
a110979582
stage2: Split @mulWithOverflow tests 2022-05-07 20:02:02 +02:00
Andrew Kelley
e8c85450fe
Merge pull request #11592 from ziglang/stage3-macos-linker
Sema: solve a false positive "depends on itself"
2022-05-07 04:38:19 -04:00
Andrew Kelley
9afc4fe0e2 Sema: solve a false positive "depends on itself"
This improves the ABI alignment resolution code.

This commit fully enables the MachO linker code in stage3. Note,
however, that there are still miscompilations in stage3.
2022-05-06 22:40:57 -07:00
Jakub Konka
ac954eb539 regalloc: ensure we only freeze/unfreeze at the outermost scope
This prevents a nasty type of bugs where we accidentally unfreeze
a register that was frozen purposely in the outer scope, risking
accidental realloc of a taken register.

Fix CF flags spilling on aarch64 backend.
2022-05-07 00:57:55 +02:00
Jakub Konka
edb3adaa33 stage2,llvm: handle softfloats in @intToFloat and @floatToInt
If the hw doesn't have support for exotic floating-point types such
as `f80`, we lower the call to a compiler-rt function call instead.

I've added a behavior test specifically targeting this use case which
now passes on `aarch64-macos`.

Additionally, this commit makes it possible to successfully build
stage3 on `aarch64-macos`. We can print the compiler's help message,
however, building with it needs a little bit more love still.
2022-05-05 22:29:30 -07:00
Jakub Konka
c592f0ca21 test: pass extended mul_with_overflow tests on x64 2022-05-05 22:53:11 +02:00
Jakub Konka
eab5a1bd5a test: test bitwidths between 1...8 and 8...16 for mul_with_overflow 2022-05-05 21:43:36 +02:00
Jakub Konka
3cef23129a test: test more int sizes for @mulWithOverflow builtin 2022-05-05 21:43:36 +02:00
Jakub Konka
8715b01005 aarch64: implement mul_with_overflow for <= 32bit ints
Add emitters for `smull`, `umull` and `tst (immediate)` instructions.
2022-05-05 21:43:36 +02:00
joachimschmidt557
aaacda4df9 stage2 AArch64: implement shl_with_overflow 2022-05-05 21:43:35 +02:00
joachimschmidt557
c2d2307d09 stage2 AArch64: initial implementation of {add,sub}_with_overflow 2022-05-05 21:43:35 +02:00
Andrew Kelley
1b432b5576 stage2: implement global assembly
So far it's supported by the LLVM backend only. I recommend for the
other backends to wait for the resolution of #10761 before adding
support for this feature.
2022-05-04 20:38:53 -07:00
Andrew Kelley
0bebb688fb stage2: change max int align from 8 to 16 for more ISAs
These targets now have a similar disagreement with LLVM about the
alignment of 128-bit integers as x86_64:
 * riscv64
 * powerpc64
 * powerpc64le
 * mips64
 * mips64el
 * sparcv9

See #2987
2022-05-04 19:11:02 -07:00
Andrew Kelley
af7e945a7d stage2: fix @sizeOf for structs with comptime fields 2022-05-04 18:45:59 -07:00
Andrew Kelley
f21c11a7f7 stage2: change x86_64 max int alignment from 8 to 16
For x86_64, LLVMABIAlignmentOfType(i128) reports 8. However I think 16
is a better number for two reasons:
1. Better machine code when loading into SIMD register.
2. The C ABI wants 16 for extern structs.
2022-05-04 17:34:17 -07:00
Andrew Kelley
5b1c0d922c stage2: improve semantics of atomic operations
ZIR instructions updated: atomic_load, atomic_rmw, atomic_store, cmpxchg
These no longer construct a pointer type as the result location. This
solves a TODO that was preventing the pointer from possibly being
volatile, as well as properly handling allowzero and addrspace.
It also allows the pointer to be over-aligned, which may be needed
depending on the target. As a consequence, the element type needs to be
communicated in the ZIR. This is done by strategically making one of the
operands be ResultLoc.ty instead of ResultLoc.coerced_ty if possible, or
otherwise explicitly adding elem_type into the ZIR encoding, such as in
the case of atomic_load.

The pointer type of atomic operations is now checked in Sema by coercing
it to an expected pointer type, that maybe over-aligned according to
target requirements.

Together with the previous commit, Zig now has smaller alignment for
large integers, depending on the target, and yet still has type safety
for atomic operations that specially require higher alignment.
2022-05-04 17:34:16 -07:00
Andrew Kelley
259f784241 stage2: improve @sizeOf and @alignOf integers
Prior to this commit, the logic for ABI size and ABI alignment for
integers was naive and incorrect. This results in wasted hardware as
well as undefined behavior in the LLVM backend when we memset an
incorrect number of bytes to 0xaa due to disagreeing with LLVM about the
ABI size of integers.

This commit introduces a "max int align" value which is different per
Target. This value is used to derive the ABI size and alignment of all
integers.

This commit makes an interesting change from stage1, which treats
128-bit integers as 16-bytes aligned for x86_64-linux. stage1 is
incorrect. The maximum integer alignment on this system is only 8 bytes.
This change breaks the behavior test called "128-bit cmpxchg" because on
that target, 128-bit cmpxchg does require a 16-bytes aligned pointer to
a 128 bit integer. However, this alignment property does not belong on
*all* 128 bit integers - only on the pointer type in the `@cmpxchg`
builtin function prototype. The user can then use an alignment override
annotation on a 128-bit integer variable or struct field to obtain such
a pointer.
2022-05-04 17:34:16 -07:00
Andrew Kelley
3ed9ef3e6b Sema: fix bigIntToFloat
The implementation had the `@mulAdd` parameters mixed up.
2022-05-03 21:50:00 -07:00
Andrew Kelley
3cfde183f3
Merge pull request #11571 from ziglang/stage2-test-behavior
progress towards stage2 behavior tests for all targets passing with the LLVM backend
2022-05-03 14:58:46 -04:00
Marc Tiehuis
5fbda2c579 temporary fix for stage2/stage1 f128 rounding discrepency
This is only to get tests running again. The root issue should be fixed
in stage1 so rounding is consistent between stages.
2022-05-03 17:14:01 +12:00
Andrew Kelley
d98869da43 behavior tests: fix wrong packed struct test case
Packed structs are defined to have the same alignment and size as their
backing integer.
2022-05-02 22:06:02 -07:00
Andrew Kelley
a3f56154d0 stage1: disable new behavior tests
Oops, I forgot to check if the new behavior tests are passing for
stage1.
2022-05-01 22:11:57 -07:00
Andrew Kelley
82b96ca0de disable failing behavior tests
Oops, I forgot to run the non-LLVM backend tests on that last commit.
2022-05-01 15:35:35 -07:00
Andrew Kelley
60c2972c5d stage2: fix comptime fixed-width float division 2022-05-01 15:02:06 -07:00
Daniele Cocca
d127c1d59e CBE: handle returning undefined for ErrorUnion
Just like for Struct in 8238d4b33585a715c58ab559cd001dd3ea1db55b, in the
case of ErrorUnion struct we need to return a compound literal "(T){...}"
instead of just "{}", which is invalid code when used in e.g. a "return"
expression.
2022-04-30 13:29:21 -04:00
sin-ack
032c722d20
Sema: Fix many-pointer array concatenation at comptime (#11512)
* Sema: Correctly determine whether array_cat lhs and rhs are single ptrs

Many-pointers are also not single-pointers and wouldn't be considered
here. This commit makes the conditions use the appropriately-named
isSinglePointer instead.

* Sema: Correctly obtain ArrayInfo for many-pointer concatenation

Many-pointers at comptime have a known size like slices and can be used
in array concatenation. This fixes a stage1 regression.

* test: Add comptime manyptr concatenation test

Co-authored-by: sin-ack <sin-ack@users.noreply.github.com>
2022-04-29 22:53:06 -04:00
Jakub Konka
3b8187072f
Merge pull request #11530 from ziglang/test-harness
test: move compare and run tests to new test harness
2022-04-29 08:24:02 +02:00
Daniele Cocca
fda143d5d8 CBE: fix renderValue() for struct fields with no runtime bits
These shouldn't count towards the total emitted, or the stray comma
separators would cause compilation errors.
2022-04-28 23:41:42 -04:00
Veikka Tuominen
091fe78337
Merge pull request #11541 from Vexu/stage2-slice-field-ptr
Stage2: fix slice field modification at comptime
2022-04-28 22:27:50 +03:00