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wasm: Improve shl_with_overflow
This re-implements the shl_with_overflow operation from scratch, making it a lot more robust and outputs the equal code to the LLVM backend.
This commit is contained in:
Luuk de Gram
Andrew Kelley
parent
0a2d3d4155
commit
160aa4c11d
@ -1452,7 +1452,7 @@ fn genInst(self: *Self, inst: Air.Inst.Index) !WValue {
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.add_with_overflow => self.airAddSubWithOverflow(inst, .add),
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.sub_with_overflow => self.airAddSubWithOverflow(inst, .sub),
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.shl_with_overflow => self.airBinOpOverflow(inst, .shl),
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.shl_with_overflow => self.airShlWithOverflow(inst),
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.mul_with_overflow => self.airMulWithOverflow(inst),
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.clz => self.airClz(inst),
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@ -3941,115 +3941,6 @@ fn airPtrSliceFieldPtr(self: *Self, inst: Air.Inst.Index, offset: u32) InnerErro
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return self.buildPointerOffset(slice_ptr, offset, .new);
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}
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fn airBinOpOverflow(self: *Self, inst: Air.Inst.Index, op: Op) InnerError!WValue {
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if (self.liveness.isUnused(inst)) return WValue{ .none = {} };
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const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
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const extra = self.air.extraData(Air.Bin, ty_pl.payload).data;
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const lhs = try self.resolveInst(extra.lhs);
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const rhs = try self.resolveInst(extra.rhs);
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const lhs_ty = self.air.typeOf(extra.lhs);
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if (lhs_ty.zigTypeTag() == .Vector) {
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return self.fail("TODO: Implement overflow arithmetic for vectors", .{});
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}
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// We store the bit if it's overflowed or not in this. As it's zero-initialized
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// we only need to update it if an overflow (or underflow) occured.
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const overflow_bit = try self.allocLocal(Type.initTag(.u1));
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const int_info = lhs_ty.intInfo(self.target);
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const wasm_bits = toWasmBits(int_info.bits) orelse {
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return self.fail("TODO: Implement overflow arithmetic for integer bitsize: {d}", .{int_info.bits});
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};
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const zero = switch (wasm_bits) {
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32 => WValue{ .imm32 = 0 },
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64 => WValue{ .imm64 = 0 },
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else => unreachable,
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};
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const int_max = (@as(u65, 1) << @intCast(u7, int_info.bits - @boolToInt(int_info.signedness == .signed))) - 1;
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const int_max_wvalue = switch (wasm_bits) {
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32 => WValue{ .imm32 = @intCast(u32, int_max) },
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64 => WValue{ .imm64 = @intCast(u64, int_max) },
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else => unreachable,
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};
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const int_min = if (int_info.signedness == .unsigned)
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@as(i64, 0)
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else
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-@as(i64, 1) << @intCast(u6, int_info.bits - 1);
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const int_min_wvalue = switch (wasm_bits) {
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32 => WValue{ .imm32 = @bitCast(u32, @intCast(i32, int_min)) },
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64 => WValue{ .imm64 = @bitCast(u64, int_min) },
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else => unreachable,
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};
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if (int_info.signedness == .unsigned and op == .add) {
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const diff = try self.binOp(int_max_wvalue, lhs, lhs_ty, .sub);
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const cmp_res = try self.cmp(rhs, diff, lhs_ty, .gt);
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try self.emitWValue(cmp_res);
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try self.addLabel(.local_set, overflow_bit.local);
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} else if (op == .sub) {
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const cmp_res = try self.cmp(lhs, rhs, lhs_ty, .lt);
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try self.emitWValue(cmp_res);
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try self.addLabel(.local_set, overflow_bit.local);
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} else if (int_info.signedness == .signed and op != .shl) {
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// for overflow, we first check if lhs is > 0 (or lhs < 0 in case of subtraction). If not, we will not overflow.
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// We first create an outer block, where we handle overflow.
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// Then we create an inner block, where underflow is handled.
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try self.startBlock(.block, wasm.block_empty);
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try self.startBlock(.block, wasm.block_empty);
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{
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try self.emitWValue(lhs);
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const cmp_result = try self.cmp(lhs, zero, lhs_ty, .lt);
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try self.emitWValue(cmp_result);
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}
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try self.addLabel(.br_if, 0); // break to outer block, and handle underflow
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// handle overflow
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{
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const diff = try self.binOp(int_max_wvalue, lhs, lhs_ty, .sub);
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const cmp_res = try self.cmp(rhs, diff, lhs_ty, if (op == .add) .gt else .lt);
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try self.emitWValue(cmp_res);
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try self.addLabel(.local_set, overflow_bit.local);
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}
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try self.addLabel(.br, 1); // break from blocks, and continue regular flow.
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try self.endBlock();
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// handle underflow
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{
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const diff = try self.binOp(int_min_wvalue, lhs, lhs_ty, .sub);
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const cmp_res = try self.cmp(rhs, diff, lhs_ty, if (op == .add) .lt else .gt);
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try self.emitWValue(cmp_res);
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try self.addLabel(.local_set, overflow_bit.local);
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}
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try self.endBlock();
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}
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const bin_op = if (op == .shl) blk: {
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const tmp_val = try self.binOp(lhs, rhs, lhs_ty, op);
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const cmp_res = try self.cmp(tmp_val, int_max_wvalue, lhs_ty, .gt);
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try self.emitWValue(cmp_res);
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try self.addLabel(.local_set, overflow_bit.local);
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try self.emitWValue(tmp_val);
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try self.emitWValue(int_max_wvalue);
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switch (wasm_bits) {
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32 => try self.addTag(.i32_and),
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64 => try self.addTag(.i64_and),
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else => unreachable,
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}
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try self.addLabel(.local_set, tmp_val.local);
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break :blk tmp_val;
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} else try self.wrapBinOp(lhs, rhs, lhs_ty, op);
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const result_ptr = try self.allocStack(self.air.typeOfIndex(inst));
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try self.store(result_ptr, bin_op, lhs_ty, 0);
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const offset = @intCast(u32, lhs_ty.abiSize(self.target));
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try self.store(result_ptr, overflow_bit, Type.initTag(.u1), offset);
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return result_ptr;
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}
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fn airAddSubWithOverflow(self: *Self, inst: Air.Inst.Index, op: Op) InnerError!WValue {
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assert(op == .add or op == .sub);
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const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
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@ -4065,13 +3956,9 @@ fn airAddSubWithOverflow(self: *Self, inst: Air.Inst.Index, op: Op) InnerError!W
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const int_info = lhs_ty.intInfo(self.target);
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const is_signed = int_info.signedness == .signed;
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const wasm_bits = toWasmBits(int_info.bits) orelse {
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return self.fail("TODO: Implement sub_with_overflow for integer bitsize: {d}", .{int_info.bits});
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return self.fail("TODO: Implement {{add/sub}}_with_overflow for integer bitsize: {d}", .{int_info.bits});
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};
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if (wasm_bits == 128) {
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return self.fail("TODO: Implement sub_with_overflow for 128 bit integers", .{});
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}
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const zero = switch (wasm_bits) {
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32 => WValue{ .imm32 = 0 },
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64 => WValue{ .imm64 = 0 },
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@ -4123,6 +4010,53 @@ fn airAddSubWithOverflow(self: *Self, inst: Air.Inst.Index, op: Op) InnerError!W
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return result_ptr;
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}
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fn airShlWithOverflow(self: *Self, inst: Air.Inst.Index) InnerError!WValue {
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const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
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const extra = self.air.extraData(Air.Bin, ty_pl.payload).data;
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const lhs = try self.resolveInst(extra.lhs);
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const rhs = try self.resolveInst(extra.rhs);
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const lhs_ty = self.air.typeOf(extra.lhs);
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if (lhs_ty.zigTypeTag() == .Vector) {
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return self.fail("TODO: Implement overflow arithmetic for vectors", .{});
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}
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const int_info = lhs_ty.intInfo(self.target);
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const is_signed = int_info.signedness == .signed;
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const wasm_bits = toWasmBits(int_info.bits) orelse {
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return self.fail("TODO: Implement shl_with_overflow for integer bitsize: {d}", .{int_info.bits});
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};
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const shl = try self.binOp(lhs, rhs, lhs_ty, .shl);
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const result = if (wasm_bits != int_info.bits) blk: {
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break :blk try self.wrapOperand(shl, lhs_ty);
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} else shl;
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const overflow_bit = if (wasm_bits != int_info.bits and is_signed) blk: {
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const shift_amt = wasm_bits - int_info.bits;
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const shift_val = switch (wasm_bits) {
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32 => WValue{ .imm32 = shift_amt },
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64 => WValue{ .imm64 = shift_amt },
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else => unreachable,
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};
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const secondary_shl = try self.binOp(shl, shift_val, lhs_ty, .shl);
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const initial_shr = try self.binOp(secondary_shl, shift_val, lhs_ty, .shr);
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const shr = try self.wrapBinOp(initial_shr, rhs, lhs_ty, .shr);
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break :blk try self.cmp(lhs, shr, lhs_ty, .neq);
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} else blk: {
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const shr = try self.binOp(result, rhs, lhs_ty, .shr);
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break :blk try self.cmp(lhs, shr, lhs_ty, .neq);
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};
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const result_ptr = try self.allocStack(self.air.typeOfIndex(inst));
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try self.store(result_ptr, result, lhs_ty, 0);
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const offset = @intCast(u32, lhs_ty.abiSize(self.target));
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try self.store(result_ptr, overflow_bit, Type.initTag(.u1), offset);
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return result_ptr;
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}
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fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) InnerError!WValue {
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const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
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const extra = self.air.extraData(Air.Bin, ty_pl.payload).data;
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@ -212,7 +212,6 @@ test "union with specified enum tag" {
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
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try doTest();
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comptime try doTest();
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@ -222,7 +221,6 @@ test "packed union generates correctly aligned type" {
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
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if (builtin.zig_backend == .stage1) return error.SkipZigTest;
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const U = packed union {
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@ -146,7 +146,6 @@ test "while with optional as condition" {
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
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numbers_left = 10;
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var sum: i32 = 0;
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@ -160,7 +159,6 @@ test "while with optional as condition with else" {
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
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numbers_left = 10;
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var sum: i32 = 0;
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@ -179,7 +177,6 @@ test "while with error union condition" {
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
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numbers_left = 10;
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var sum: i32 = 0;
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