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x64: implement missing bits in add_with_overflow and sub_with_overflow
This commit is contained in:
Jakub Konka
parent
f131e41db9
commit
2a738599a0
@ -1311,18 +1311,15 @@ fn airAddSubWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
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const bin_op = self.air.extraData(Air.Bin, ty_pl.payload).data;
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const result = if (self.liveness.isUnused(inst)) .dead else result: {
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const ty = self.air.typeOf(bin_op.lhs);
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const abi_size = ty.abiSize(self.target.*);
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switch (ty.zigTypeTag()) {
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.Vector => return self.fail("TODO implement add_with_overflow for Vector type", .{}),
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.Int => {
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const int_info = ty.intInfo(self.target.*);
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if (int_info.bits > 64) {
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if (abi_size > 8) {
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return self.fail("TODO implement add_with_overflow for Ints larger than 64bits", .{});
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}
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try self.spillCompareFlagsIfOccupied();
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self.compare_flags_inst = inst;
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const lhs = try self.resolveInst(bin_op.lhs);
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const rhs = try self.resolveInst(bin_op.rhs);
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@ -1333,11 +1330,30 @@ fn airAddSubWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
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else => unreachable,
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};
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const partial = try self.genBinOp(base_tag, null, lhs, rhs, ty, ty);
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const result: MCValue = switch (int_info.signedness) {
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.signed => .{ .register_overflow_signed = partial.register },
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.unsigned => .{ .register_overflow_unsigned = partial.register },
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};
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break :result result;
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const int_info = ty.intInfo(self.target.*);
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if (math.isPowerOfTwo(int_info.bits) and int_info.bits >= 8) {
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self.compare_flags_inst = inst;
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const result: MCValue = switch (int_info.signedness) {
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.signed => .{ .register_overflow_signed = partial.register },
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.unsigned => .{ .register_overflow_unsigned = partial.register },
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};
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break :result result;
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}
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self.compare_flags_inst = null;
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const tuple_ty = self.air.typeOfIndex(inst);
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const tuple_size = @intCast(u32, tuple_ty.abiSize(self.target.*));
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const tuple_align = tuple_ty.abiAlignment(self.target.*);
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const overflow_bit_offset = @intCast(i32, tuple_ty.structFieldOffset(1, self.target.*));
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const stack_offset = @intCast(i32, try self.allocMem(inst, tuple_size, tuple_align));
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try self.genSetStackTruncatedOverflowCompare(ty, stack_offset, overflow_bit_offset, partial.register);
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break :result MCValue{ .stack_offset = stack_offset };
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},
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else => unreachable,
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}
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@ -1346,6 +1362,75 @@ fn airAddSubWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
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return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none });
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}
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fn genSetStackTruncatedOverflowCompare(
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self: *Self,
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ty: Type,
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stack_offset: i32,
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overflow_bit_offset: i32,
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reg: Register,
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) !void {
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const reg_lock = self.register_manager.lockReg(reg);
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defer if (reg_lock) |lock| self.register_manager.unlockReg(lock);
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const int_info = ty.intInfo(self.target.*);
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const extended_ty = switch (int_info.signedness) {
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.signed => Type.isize,
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.unsigned => ty,
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};
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const temp_regs = try self.register_manager.allocRegs(3, .{ null, null, null });
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const temp_regs_locks = self.register_manager.lockRegsAssumeUnused(3, temp_regs);
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defer for (temp_regs_locks) |rreg| {
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self.register_manager.unlockReg(rreg);
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};
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const overflow_reg = temp_regs[0];
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const flags: u2 = switch (int_info.signedness) {
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.signed => 0b00,
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.unsigned => 0b10,
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};
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_ = try self.addInst(.{
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.tag = .cond_set_byte_overflow,
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.ops = (Mir.Ops{
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.reg1 = overflow_reg.to8(),
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.flags = flags,
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}).encode(),
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.data = undefined,
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});
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const scratch_reg = temp_regs[1];
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try self.genSetReg(extended_ty, scratch_reg, .{ .register = reg });
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try self.truncateRegister(ty, scratch_reg);
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try self.genBinOpMir(
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.cmp,
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extended_ty,
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.{ .register = reg },
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.{ .register = scratch_reg },
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);
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const eq_reg = temp_regs[2];
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_ = try self.addInst(.{
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.tag = .cond_set_byte_eq_ne,
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.ops = (Mir.Ops{
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.reg1 = eq_reg.to8(),
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.flags = 0b00,
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}).encode(),
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.data = undefined,
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});
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try self.genBinOpMir(
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.@"or",
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Type.u8,
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.{ .register = overflow_reg },
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.{ .register = eq_reg },
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);
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try self.genSetStack(ty, stack_offset, .{ .register = scratch_reg }, .{});
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try self.genSetStack(Type.initTag(.u1), stack_offset - overflow_bit_offset, .{
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.register = overflow_reg.to8(),
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}, .{});
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}
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fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
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const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
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const bin_op = self.air.extraData(Air.Bin, ty_pl.payload).data;
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@ -1355,17 +1440,18 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
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}
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const ty = self.air.typeOf(bin_op.lhs);
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const abi_size = ty.abiSize(self.target.*);
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const result: MCValue = result: {
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switch (ty.zigTypeTag()) {
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.Vector => return self.fail("TODO implement mul_with_overflow for Vector type", .{}),
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.Int => {
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const int_info = ty.intInfo(self.target.*);
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if (int_info.bits > 64) {
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if (abi_size > 8) {
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return self.fail("TODO implement mul_with_overflow for Ints larger than 64bits", .{});
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}
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if (math.isPowerOfTwo(int_info.bits)) {
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const int_info = ty.intInfo(self.target.*);
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if (math.isPowerOfTwo(int_info.bits) and int_info.bits >= 8) {
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try self.spillCompareFlagsIfOccupied();
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self.compare_flags_inst = inst;
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@ -1428,71 +1514,14 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
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},
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}
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};
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const dst_reg_lock = self.register_manager.lockRegAssumeUnused(dst_reg);
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defer self.register_manager.unlockReg(dst_reg_lock);
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const tuple_ty = self.air.typeOfIndex(inst);
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const tuple_size = @intCast(u32, tuple_ty.abiSize(self.target.*));
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const tuple_align = tuple_ty.abiAlignment(self.target.*);
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const overflow_bit_offset = @intCast(i32, tuple_ty.structFieldOffset(1, self.target.*));
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const stack_offset = @intCast(i32, try self.allocMem(inst, tuple_size, tuple_align));
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const extended_ty = switch (int_info.signedness) {
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.signed => Type.isize,
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.unsigned => ty,
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};
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const temp_regs = try self.register_manager.allocRegs(3, .{ null, null, null });
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const temp_regs_locks = self.register_manager.lockRegsAssumeUnused(3, temp_regs);
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defer for (temp_regs_locks) |reg| {
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self.register_manager.unlockReg(reg);
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};
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const overflow_reg = temp_regs[0];
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const flags: u2 = switch (int_info.signedness) {
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.signed => 0b00,
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.unsigned => 0b10,
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};
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_ = try self.addInst(.{
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.tag = .cond_set_byte_overflow,
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.ops = (Mir.Ops{
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.reg1 = overflow_reg.to8(),
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.flags = flags,
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}).encode(),
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.data = undefined,
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});
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const scratch_reg = temp_regs[1];
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try self.genSetReg(extended_ty, scratch_reg, .{ .register = dst_reg });
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try self.truncateRegister(ty, scratch_reg);
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try self.genBinOpMir(
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.cmp,
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extended_ty,
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.{ .register = dst_reg },
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.{ .register = scratch_reg },
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);
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const eq_reg = temp_regs[2];
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_ = try self.addInst(.{
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.tag = .cond_set_byte_eq_ne,
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.ops = (Mir.Ops{
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.reg1 = eq_reg.to8(),
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.flags = 0b00,
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}).encode(),
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.data = undefined,
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});
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try self.genBinOpMir(
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.@"or",
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Type.u8,
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.{ .register = overflow_reg },
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.{ .register = eq_reg },
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);
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try self.genSetStack(ty, stack_offset, .{ .register = scratch_reg }, .{});
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try self.genSetStack(Type.initTag(.u1), stack_offset - overflow_bit_offset, .{
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.register = overflow_reg.to8(),
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}, .{});
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try self.genSetStackTruncatedOverflowCompare(ty, stack_offset, overflow_bit_offset, dst_reg);
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break :result MCValue{ .stack_offset = stack_offset };
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},
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@ -640,7 +640,6 @@ test "@addWithOverflow" {
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test "small int addition" {
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if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
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