51 Commits

Author SHA1 Message Date
Ryan Liptak
70ef9bc75c Fix ensureTotalCapacity calls that should be ensureUnusedCapacity calls
If these functions are called more than once, then the array list would no longer be guaranteed to have enough capacity during the appendAssumeCapacity calls. With ensureUnusedCapacity, they will always be guaranteed to have enough capacity regardless of how many times the function is called.
2021-11-01 15:08:41 -04:00
Andrew Kelley
7f70c27e9d stage2: more division support
AIR:
 * div is renamed to div_trunc.
 * Add div_float, div_floor, div_exact.
   - Implemented in Sema and LLVM codegen. C backend has a stub.

Improvements to std.math.big.Int:
 * Add `eqZero` function to `Mutable`.
 * Fix incorrect results for `divFloor`.

Compiler-rt:
 * Add muloti4 to the stage2 section.
2021-10-21 19:05:26 -07:00
Martin Wickham
272bad3f12 Delete Module.Scope, move Block into Sema 2021-10-02 15:21:49 -05:00
Martin Wickham
53a36eacfa Remove my dumb "namespace decl" hack 2021-10-02 15:21:48 -05:00
Josh Soref
664941bf14
Spelling corrections (#9833)
Signed-off-by: Josh Soref <jsoref@users.noreply.github.com>
Co-authored-by: Josh Soref <jsoref@users.noreply.github.com>
2021-09-24 13:39:20 -04:00
Ryan Liptak
59f5053bed Update all ensureCapacity calls to the relevant non-deprecated version 2021-09-19 13:52:56 +02:00
Andrew Kelley
4a0f38bb76 stage2: update LLVM backend to new AIR memory layout
Also fix compile errors when not using -Dskip-non-native
2021-07-20 12:19:16 -07:00
Andrew Kelley
0f38f68696 stage2: Air and Liveness are passed ephemerally
to the link infrastructure, instead of being stored with Module.Fn. This
moves towards a strategy to make more efficient use of memory by not
storing Air or Liveness data in the Fn struct, but computing it on
demand, immediately sending it to the backend, and then immediately
freeing it.

Backends which want to defer codegen until flush() such as SPIR-V
must move the Air/Liveness data upon `updateFunc` being called and keep
track of that data in the backend implementation itself.
2021-07-20 12:19:16 -07:00
Andrew Kelley
913393fd3b stage2: first pass over Module.zig for AIR memory layout 2021-07-20 12:19:16 -07:00
Andrew Kelley
ef7080aed1 stage2: update Liveness, SPIR-V for new AIR memory layout
also do the inline assembly instruction
2021-07-20 12:19:16 -07:00
Andrew Kelley
5d6f7b44c1 stage2: rework AIR memory layout
This commit changes the AIR file and the documentation of the memory
layout. The actual work of modifying the surrounding code (in Sema and
codegen) is not yet done.
2021-07-20 12:18:14 -07:00
Andrew Kelley
28dd9d478d C backend: TypedefMap is now ArrayHashMap
The C backend depends on insertion order into this map so that type
definitions will be declared before they are used.
2021-07-12 12:40:32 -07:00
Jacob G-W
641ecc260f std, src, doc, test: remove unused variables 2021-06-21 17:03:03 -07:00
Andrew Kelley
138afd5cbf zig fmt 2021-06-10 20:13:43 -07:00
Martin Wickham
fc9430f567 Breaking hash map changes for 0.8.0
- hash/eql functions moved into a Context object
- *Context functions pass an explicit context
- *Adapted functions pass specialized keys and contexts
- new getPtr() function returns a pointer to value
- remove functions renamed to fetchRemove
- new remove functions return bool
- removeAssertDiscard deleted, use assert(remove(...)) instead
- Keys and values are stored in separate arrays
- Entry is now {*K, *V}, the new KV is {K, V}
- BufSet/BufMap functions renamed to match other set/map types
- fixed iterating-while-modifying bug in src/link/C.zig
2021-06-03 17:02:16 -05:00
Andrew Kelley
63aabbbba7
Merge pull request #8852 from Snektron/spirv
SPIR-V: More codegen
2021-05-22 18:20:20 -04:00
Andrew Kelley
79dee75b1c stage2: rename ir.zig to air.zig
We've settled on the nomenclature for the artifacts the compiler
pipeline produces:

1. Tokens
2. AST (Abstract Syntax Tree)
3. ZIR (Zig Intermediate Representation)
4. AIR (Analyzed Intermediate Representation)
5. Machine Code

Renaming `ir` identifiers to `air` will come with the inevitable
air-memory-layout branch that I plan to start after the 0.8.0 release.
2021-05-22 14:29:16 -07:00
Robin Voetter
cba97e4773 SPIR-V: Make functions which always return a null result return void instead 2021-05-22 16:11:56 +02:00
Robin Voetter
228f71fa0c SPIR-V: Generate locals at the start of a function 2021-05-22 16:11:56 +02:00
Robin Voetter
6634abfd26 SPIR-V: Debug line info/source info 2021-05-22 16:11:56 +02:00
Robin Voetter
e3be1a1e88 SPIR-V: DeclGen constructor/destructor 2021-05-22 16:11:56 +02:00
Robin Voetter
46184ab85e SPIR-V: branching 2021-05-22 16:11:56 +02:00
Robin Voetter
5edc5f9730 SPIR-V: Pass source location to genType and genConstant for better error reporting 2021-05-22 16:11:56 +02:00
Robin Voetter
63d0576f1c SPIR-V: Preliminary alloc/store/load generation 2021-05-22 16:11:56 +02:00
Robin Voetter
6a121d9ccd SPIR-V: Split out genCmp from genBinOp 2021-05-22 16:11:56 +02:00
Robin Voetter
b8444d2c51 SPIR-V: Preliminary integer constant encoding 2021-05-22 16:11:56 +02:00
Robin Voetter
c190b2ff83 SPIR-V: ResultId and Word aliases to improve code clarity 2021-05-22 16:11:56 +02:00
Robin Voetter
9ddd7f4a60 SPIR-V: Put types in SPIRVModule, some general restructuring 2021-05-22 16:11:56 +02:00
Robin Voetter
bcda3c5b82 SPIR-V: Use Value.toFloat instead of switching on value tag when generating float constants 2021-05-22 16:11:56 +02:00
Andrew Kelley
615d45da77 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * src/codegen/spirv.zig
 * src/link/SpirV.zig

We're going to want to improve the stage2 test harness to print
the source file name when a compile error occurs otherwise std lib
contributors are going to see some confusing CI failures when they cause
stage2 AstGen compile errors.
2021-05-17 19:30:38 -07:00
Robin Voetter
880473dc3f SPIR-V: Unary not operation 2021-05-16 14:55:09 +02:00
Robin Voetter
489b3ef7d4 SPIR-V: bool binary operations 2021-05-16 14:52:11 +02:00
Robin Voetter
585122b1ac SPIR-V: comparison and equality operations 2021-05-16 14:46:58 +02:00
Robin Voetter
f14000c7e1 SPIR-V: More bitwise binary operations 2021-05-16 14:20:18 +02:00
Robin Voetter
4735e95d16 SPIR-V: More binary operations 2021-05-16 14:20:12 +02:00
Robin Voetter
10678af876 SPIR-V: genBinOp setup 2021-05-16 14:13:23 +02:00
Robin Voetter
ae2e21639a SPIR-V: Some initial floating point constant generation 2021-05-16 14:13:23 +02:00
Robin Voetter
cbf5280f54 SPIR-V: Some instructions + constant generation setup 2021-05-16 14:13:23 +02:00
Robin Voetter
da0cc732ea SPIR-V: Function parameter generation 2021-05-16 14:13:23 +02:00
Robin Voetter
074cb9f1da SPIR-V: OpFunction/OpFunctionEnd generation 2021-05-16 14:13:23 +02:00
Robin Voetter
4403f3598a SPIR-V: Proper floating point type generation 2021-05-16 14:13:23 +02:00
Robin Voetter
38cdfebad3 SPIR-V: Function prototype generation 2021-05-16 14:13:23 +02:00
Robin Voetter
458c338aeb SPIR-V: Compute backing integer bits 2021-05-16 14:13:23 +02:00
Robin Voetter
de6df2bc12 SPIR-V: Restructure codegen a bit 2021-05-16 14:13:23 +02:00
Andrew Kelley
597082adf4 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * build.zig
 * src/Compilation.zig
 * src/codegen/spirv/spec.zig
 * src/link/SpirV.zig
 * test/stage2/darwin.zig
   - this one might be problematic; start.zig looks for `main` in the
     root source file, not `_main`. Not sure why there is an underscore
     there in master branch.
2021-05-15 21:44:38 -07:00
Robin Voetter
d45e7dfc24 SPIR-V: Begin generating types 2021-05-14 19:49:32 +02:00
Andrew Kelley
449f4de382 zig fmt src/ 2021-02-24 21:54:23 -07:00
Robin Voetter
1055344673 SPIR-V: Use free list for result id generation 2021-01-19 15:28:17 +01:00
Robin Voetter
801732aebd SPIR-V: OpMemoryModel and basic capability generation 2021-01-19 15:28:17 +01:00
Robin Voetter
71ac82ecb0 SPIR-V: Make emitting binary more efficient 2021-01-19 15:28:17 +01:00