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zig fmt src/

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This commit is contained in:
Andrew Kelley 2021-02-24 21:54:23 -07:00
parent 9b8a94265a
commit 449f4de382
9 changed files with 45 additions and 57 deletions
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9
src/Module.zig
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@ -1251,11 +1251,10 @@ fn astgenAndSemaFn(
.param_types = param_types,
.cc = cc,
});
} else
try astgen.addZirInstTag(mod, &fn_type_scope.base, fn_src, .fn_type, .{
.return_type = return_type_inst,
.param_types = param_types,
});
} else try astgen.addZirInstTag(mod, &fn_type_scope.base, fn_src, .fn_type, .{
.return_type = return_type_inst,
.param_types = param_types,
});
if (std.builtin.mode == .Debug and mod.comp.verbose_ir) {
zir.dumpZir(mod.gpa, "fn_type", decl.name, fn_type_scope.instructions.items) catch {};

27
src/astgen.zig
View File

@ -2143,11 +2143,10 @@ fn ifExpr(
.src = token_starts[tree.lastToken(else_node)],
.result = try expr(mod, sub_scope, block_scope.break_result_loc, else_node),
};
} else
.{
.src = token_starts[tree.lastToken(if_full.ast.then_expr)],
.result = null,
};
} else .{
.src = token_starts[tree.lastToken(if_full.ast.then_expr)],
.result = null,
};
return finishThenElseBlock(
mod,
@ -2316,11 +2315,10 @@ fn whileExpr(
.src = token_starts[tree.lastToken(else_node)],
.result = try expr(mod, sub_scope, loop_scope.break_result_loc, else_node),
};
} else
.{
.src = token_starts[tree.lastToken(while_full.ast.then_expr)],
.result = null,
};
} else .{
.src = token_starts[tree.lastToken(while_full.ast.then_expr)],
.result = null,
};
if (loop_scope.label) |some| {
if (!some.used) {
@ -2514,11 +2512,10 @@ fn forExpr(
.src = token_starts[tree.lastToken(else_node)],
.result = try expr(mod, sub_scope, loop_scope.break_result_loc, else_node),
};
} else
.{
.src = token_starts[tree.lastToken(for_full.ast.then_expr)],
.result = null,
};
} else .{
.src = token_starts[tree.lastToken(for_full.ast.then_expr)],
.result = null,
};
if (loop_scope.label) |some| {
if (!some.used) {

3
src/codegen.zig
View File

@ -2950,8 +2950,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
4, 8 => {
const offset = if (math.cast(i9, adj_off)) |imm|
Instruction.LoadStoreOffset.imm_post_index(-imm)
else |_|
Instruction.LoadStoreOffset.reg(try self.copyToTmpRegister(src, Type.initTag(.u64), MCValue{ .immediate = adj_off }));
else |_| Instruction.LoadStoreOffset.reg(try self.copyToTmpRegister(src, Type.initTag(.u64), MCValue{ .immediate = adj_off }));
const rn: Register = switch (arch) {
.aarch64, .aarch64_be => .x29,
.aarch64_32 => .w29,

3
src/codegen/c.zig
View File

@ -626,8 +626,7 @@ fn genBlock(o: *Object, inst: *Inst.Block) !CValue {
const local = try o.allocLocal(inst.base.ty, .Mut);
try writer.writeAll(";\n");
break :blk local;
} else
CValue{ .none = {} };
} else CValue{ .none = {} };
inst.codegen.mcv = @bitCast(@import("../codegen.zig").AnyMCValue, result);
try genBody(o, inst.body);

4
src/codegen/spirv.zig
View File

@ -45,7 +45,5 @@ pub const SPIRVModule = struct {
return self.next_id;
}
pub fn genDecl(self: SPIRVModule, id: u32, code: *std.ArrayList(u32), decl: *Decl) !void {
}
pub fn genDecl(self: SPIRVModule, id: u32, code: *std.ArrayList(u32), decl: *Decl) !void {}
};

32
src/link/SpirV.zig
View File

@ -1,17 +1,3 @@
const SpirV = @This();
const std = @import("std");
const Allocator = std.mem.Allocator;
const assert = std.debug.assert;
const Module = @import("../Module.zig");
const Compilation = @import("../Compilation.zig");
const link = @import("../link.zig");
const codegen = @import("../codegen/spirv.zig");
const trace = @import("../tracy.zig").trace;
const build_options = @import("build_options");
const spec = @import("../codegen/spirv/spec.zig");
//! SPIR-V Spec documentation: https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html
//! According to above documentation, a SPIR-V module has the following logical layout:
//! Header.
@ -30,6 +16,20 @@ const spec = @import("../codegen/spirv/spec.zig");
//! All function declarations without a body (extern functions presumably).
//! All regular functions.
const SpirV = @This();
const std = @import("std");
const Allocator = std.mem.Allocator;
const assert = std.debug.assert;
const Module = @import("../Module.zig");
const Compilation = @import("../Compilation.zig");
const link = @import("../link.zig");
const codegen = @import("../codegen/spirv.zig");
const trace = @import("../tracy.zig").trace;
const build_options = @import("build_options");
const spec = @import("../codegen/spirv/spec.zig");
pub const FnData = struct {
id: ?u32 = null,
code: std.ArrayListUnmanaged(u32) = .{},
@ -199,7 +199,7 @@ fn writeCapabilities(binary: *std.ArrayList(u32), target: std.Target) !void {
else => unreachable, // TODO
};
try codegen.writeInstruction(binary, .OpCapability, &[_]u32{ @enumToInt(cap) });
try codegen.writeInstruction(binary, .OpCapability, &[_]u32{@enumToInt(cap)});
}
fn writeMemoryModel(binary: *std.ArrayList(u32), target: std.Target) !void {
@ -221,7 +221,7 @@ fn writeMemoryModel(binary: *std.ArrayList(u32), target: std.Target) !void {
};
try codegen.writeInstruction(binary, .OpMemoryModel, &[_]u32{
@enumToInt(addressing_model), @enumToInt(memory_model)
@enumToInt(addressing_model), @enumToInt(memory_model),
});
}

3
src/main.zig
View File

@ -3221,8 +3221,7 @@ pub const ClangArgIterator = struct {
self.zig_equivalent = clang_arg.zig_equivalent;
break :find_clang_arg;
},
}
else {
} else {
fatal("Unknown Clang option: '{s}'", .{arg});
}
}

15
src/translate_c.zig
View File

@ -2313,8 +2313,7 @@ fn transCaseStmt(c: *Context, scope: *Scope, stmt: *const clang.Stmt, items: *st
const rhs_node = try transExprCoercing(c, scope, rhs, .used);
break :blk try Tag.ellipsis3.create(c.arena, .{ .lhs = lhs_node, .rhs = rhs_node });
} else
try transExprCoercing(c, scope, case_stmt.getLHS(), .used);
} else try transExprCoercing(c, scope, case_stmt.getLHS(), .used);
try items.append(expr);
sub = case_stmt.getSubStmt();
@ -2551,8 +2550,7 @@ fn transArrayAccess(c: *Context, scope: *Scope, stmt: *const clang.ArraySubscrip
// check if long long first so that signed long long doesn't just become unsigned long long
var typeid_node = if (is_longlong) try Tag.identifier.create(c.arena, "usize") else try transQualTypeIntWidthOf(c, qt, false);
break :blk try Tag.int_cast.create(c.arena, .{ .lhs = typeid_node, .rhs = try transExpr(c, scope, subscr_expr, .used) });
} else
try transExpr(c, scope, subscr_expr, .used);
} else try transExpr(c, scope, subscr_expr, .used);
const node = try Tag.array_access.create(c.arena, .{
.lhs = container_node,
@ -2752,8 +2750,7 @@ fn transUnaryOperator(c: *Context, scope: *Scope, stmt: *const clang.UnaryOperat
} else if (cIsUnsignedInteger(op_expr.getType())) {
// use -% x for unsigned integers
return Tag.negate_wrap.create(c.arena, try transExpr(c, scope, op_expr, .used));
} else
return fail(c, error.UnsupportedTranslation, stmt.getBeginLoc(), "C negation with non float non integer", .{});
} else return fail(c, error.UnsupportedTranslation, stmt.getBeginLoc(), "C negation with non float non integer", .{});
},
.Not => {
return Tag.bit_not.create(c.arena, try transExpr(c, scope, op_expr, .used));
@ -4593,7 +4590,8 @@ fn parseCPrimaryExprInner(c: *Context, m: *MacroCtx, scope: *Scope) ParseError!N
// (type)alignof(x)
.Keyword_alignof,
// (type)identifier
.Identifier => {},
.Identifier,
=> {},
// (type)integer
.IntegerLiteral => {
saw_integer_literal = true;
@ -5068,8 +5066,7 @@ fn getContainerTypeOf(c: *Context, ref: Node) ?Node {
return getContainer(c, field.type);
}
}
} else
return ty_node;
} else return ty_node;
}
}
return null;

6
src/translate_c/ast.zig
View File

@ -312,7 +312,7 @@ pub const Node = extern union {
=> Payload.Value,
.@"if" => Payload.If,
.@"while" => Payload.While,
.@"switch", .array_init,.switch_prong => Payload.Switch,
.@"switch", .array_init, .switch_prong => Payload.Switch,
.break_val => Payload.BreakVal,
.call => Payload.Call,
.var_decl => Payload.VarDecl,
@ -394,7 +394,8 @@ pub const Node = extern union {
some.data
else if (case.castTag(.switch_prong)) |some|
some.data.cond
else unreachable;
else
unreachable;
if (!body.isNoreturn(break_counts)) return false;
}
@ -406,7 +407,6 @@ pub const Node = extern union {
}
return false;
}
};
pub const Payload = struct {