202 Commits

Author SHA1 Message Date
Robin Voetter
63d0576f1c SPIR-V: Preliminary alloc/store/load generation 2021-05-22 16:11:56 +02:00
Robin Voetter
6a121d9ccd SPIR-V: Split out genCmp from genBinOp 2021-05-22 16:11:56 +02:00
Robin Voetter
b8444d2c51 SPIR-V: Preliminary integer constant encoding 2021-05-22 16:11:56 +02:00
Robin Voetter
c190b2ff83 SPIR-V: ResultId and Word aliases to improve code clarity 2021-05-22 16:11:56 +02:00
Robin Voetter
9ddd7f4a60 SPIR-V: Put types in SPIRVModule, some general restructuring 2021-05-22 16:11:56 +02:00
Robin Voetter
bcda3c5b82 SPIR-V: Use Value.toFloat instead of switching on value tag when generating float constants 2021-05-22 16:11:56 +02:00
Luuk de Gram
f8d0501f50
Also support multi-prong branches 2021-05-20 16:21:11 +02:00
Luuk de Gram
81d8fe7558
stage2 wasm: Support basic switches
- Adds support for single branches
- Allows both enums and integers
- Supports 'else' branch
2021-05-20 14:21:02 +02:00
Luuk de Gram
87a9c6946d
wasm backend: implement multi_value for WValue
This allows us to differentiate between regular locals and variables that create multiple locals
on the stack such as optionals and structs.
Now `struct_a = struct_b;` works and only updates a reference, rather than update all local's values.

Also created more test cases to test against this.
2021-05-20 09:25:02 +02:00
Luuk de Gram
6962647862
Do not create a local for the struct itself + test cases 2021-05-19 10:37:44 +02:00
Luuk de Gram
ac5fd47e2e
Initial support for structs in wasm backend
- Creates a 'local' for the struct itself and each field
- The index of the local is calculated from the struct's local index + field index
2021-05-19 10:37:44 +02:00
Luuk de Gram
141a0cbb5a
Explicit return & more complex wasm enum test
- When returning within a block, we must use an explicit return opcode. For now always emit the opcode when calling return, rather than using implicit return statements.
- Also added a more comprehensive test case to test for enum values using conditions
2021-05-19 10:35:45 +02:00
Luuk de Gram
b22e22ef55
wasm backend - Initial enum support
- This adds support for enum values using field indexes
- EmitConstant's signature was changed so it's easier to recursively call it using a different type (enum -> int type).
- Implemented initial support for bitcast which for now just returns the `WValue` of the operand.
2021-05-19 08:59:08 +02:00
Andrew Kelley
615d45da77 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * src/codegen/spirv.zig
 * src/link/SpirV.zig

We're going to want to improve the stage2 test harness to print
the source file name when a compile error occurs otherwise std lib
contributors are going to see some confusing CI failures when they cause
stage2 AstGen compile errors.
2021-05-17 19:30:38 -07:00
Robin Voetter
880473dc3f SPIR-V: Unary not operation 2021-05-16 14:55:09 +02:00
Robin Voetter
489b3ef7d4 SPIR-V: bool binary operations 2021-05-16 14:52:11 +02:00
Robin Voetter
585122b1ac SPIR-V: comparison and equality operations 2021-05-16 14:46:58 +02:00
Robin Voetter
f14000c7e1 SPIR-V: More bitwise binary operations 2021-05-16 14:20:18 +02:00
Robin Voetter
4735e95d16 SPIR-V: More binary operations 2021-05-16 14:20:12 +02:00
Robin Voetter
10678af876 SPIR-V: genBinOp setup 2021-05-16 14:13:23 +02:00
Robin Voetter
ae2e21639a SPIR-V: Some initial floating point constant generation 2021-05-16 14:13:23 +02:00
Robin Voetter
cbf5280f54 SPIR-V: Some instructions + constant generation setup 2021-05-16 14:13:23 +02:00
Robin Voetter
da0cc732ea SPIR-V: Function parameter generation 2021-05-16 14:13:23 +02:00
Robin Voetter
074cb9f1da SPIR-V: OpFunction/OpFunctionEnd generation 2021-05-16 14:13:23 +02:00
Robin Voetter
4403f3598a SPIR-V: Proper floating point type generation 2021-05-16 14:13:23 +02:00
Robin Voetter
38cdfebad3 SPIR-V: Function prototype generation 2021-05-16 14:13:23 +02:00
Robin Voetter
458c338aeb SPIR-V: Compute backing integer bits 2021-05-16 14:13:23 +02:00
Robin Voetter
de6df2bc12 SPIR-V: Restructure codegen a bit 2021-05-16 14:13:23 +02:00
Andrew Kelley
597082adf4 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * build.zig
 * src/Compilation.zig
 * src/codegen/spirv/spec.zig
 * src/link/SpirV.zig
 * test/stage2/darwin.zig
   - this one might be problematic; start.zig looks for `main` in the
     root source file, not `_main`. Not sure why there is an underscore
     there in master branch.
2021-05-15 21:44:38 -07:00
Andrew Kelley
07606d12da stage2: remove SPU Mark II backend
As it stands, the backend is incomplete, and there is no active contributor,
making it dead weight.

However, anyone is free to resurrect this backend at any time.
2021-05-15 21:25:42 -07:00
Andrew Kelley
dc036f5b6f codegen: implement const value rendering for ints <= 64 bits 2021-05-15 21:00:15 -07:00
Robin Voetter
42f2ff6ec9 SPIR-V: Re-generate spec.zig 2021-05-14 19:49:32 +02:00
Robin Voetter
d45e7dfc24 SPIR-V: Begin generating types 2021-05-14 19:49:32 +02:00
Andrew Kelley
78632894da AstGen: fix elision of store_to_block_ptr for condbr 2021-05-13 17:56:01 -07:00
Andrew Kelley
c9cc09a3bf Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * lib/std/os/linux.zig
 * lib/std/os/windows/bits.zig
 * src/Module.zig
 * src/Sema.zig
 * test/stage2/test.zig

Mainly I wanted Jakub's new macOS code for respecting stack size, since
we now depend on it for debug builds able to pass one of the test cases
for recursive comptime function calls with `@setEvalBranchQuota`.

The conflicts were all trivial.
2021-05-12 16:41:20 -07:00
Andrew Kelley
a74632b50a C backend: fix emitting '$' in identifier names
This causes warnings from clang when compiled.
2021-05-11 14:51:21 -07:00
Andrew Kelley
bcf15e39e2 stage2: add owns_tv flag to Module.Decl
Decl objects need to know whether they are the owner of the Type/Value
associated with them, in order to decide whether to destroy the
associated Namespace, Fn, or Var when cleaning up.
2021-05-11 14:17:52 -07:00
Andrew Kelley
2299e5ff1d fix merge conflicts from previous commit
Any PRs merged after the one that made testing functions return errors
needs to get rebased!
2021-05-08 23:12:34 -07:00
Andrew Kelley
b88d381dec
Merge pull request #8474 from gracefuu/grace/encode-instruction
stage2 x86_64: encoding helpers, fix bugs
2021-05-09 01:36:51 -04:00
Andrew Kelley
5619ce2406 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * doc/langref.html.in
 * lib/std/enums.zig
 * lib/std/fmt.zig
 * lib/std/hash/auto_hash.zig
 * lib/std/math.zig
 * lib/std/mem.zig
 * lib/std/meta.zig
 * test/behavior/alignof.zig
 * test/behavior/bitcast.zig
 * test/behavior/bugs/1421.zig
 * test/behavior/cast.zig
 * test/behavior/ptrcast.zig
 * test/behavior/type_info.zig
 * test/behavior/vector.zig

Master branch added `try` to a bunch of testing function calls, and some
lines also had changed how to refer to the native architecture and other
`@import("builtin")` stuff.
2021-05-08 14:45:21 -07:00
Veikka Tuominen
42a95197f3 update usage of std.testing in stage2 2021-05-08 15:15:30 +03:00
Andrew Kelley
f86469bc5e stage2: semaDecl properly analyzes the decl block
Also flattened out Decl TypedValue fields into
ty, val, has_tv
and add relevant fields to Decl for alignment and link section.
2021-04-28 16:57:01 -07:00
Andrew Kelley
df24ce52b1 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
In particular I wanted to take advantage of the new hex float parsing
code.
2021-04-28 14:57:38 -07:00
joachimschmidt557
bc06e19828 stage2 riscv64: cleanup code and add tests 2021-04-28 07:20:45 +02:00
Andrew Kelley
4630e3891c AstGen: implement inline asm output 2021-04-19 18:44:59 -07:00
gracefu
0409f9e024
stage2 x86_64: simplify inst encoder to a set of dumb helper fns 2021-04-16 15:21:17 +08:00
gracefu
e1959ccd4e
stage2 x86_64: add instruction encoder helper fn 2021-04-16 15:21:16 +08:00
Andrew Kelley
bcfebb4b2b stage2: improvements aimed at std lib integration
* AstGen: emit decl lookup ZIR instructions rather than directly
   looking up decls in AstGen. This is necessary because we want to
   reuse the same immutable ZIR code for multiple generic instantiations
   (and comptime function calls).
 * AstGen: fix using members_len instead of fields_len for struct decls.
 * structs: the struct_decl ZIR instruction is now also a block. This is
   so that the type expressions, default field value expressions, and
   alignment expressions can be evaluated in a scope that contains the
   decls from the struct namespace itself.
 * Add "std" and "builtin" packages to the builtin package.
 * Don't try to build glibc, musl, or mingw-w64 when using `-ofmt=c`.
 * builtin.zig is generated without `usingnamespace`.
 * builtin.zig takes advantage of `std.zig.fmtId` for CPU features.
 * A first pass at implementing `usingnamespace`. It's problematic and
   should either be deleted, or polished, before merging this branch.
 * Sema: allow explicitly specifying the namespace in which to look up
   Decls. This is used by `struct_decl` in order to put the decls from
   the struct namespace itself in scope when evaluating the type
   expressions, default value expressions, and alignment expressions.
 * Module: fix `analyzeNamespace` assuming that it is the top-level root
   declaration node.
 * Sema: implement comptime and runtime cmp operator.
 * Sema: implement peer type resolution for enums and enum literals.
 * Pull in the changes from master branch:
   262e09c482d98a78531c049a18b7f24146fe157f.
 * ZIR: complete out simple_ptr_type debug printing
2021-04-15 19:06:39 -07:00
Michael Dusan
93cf9560b1
Merge remote-tracking branch 'origin/master' into llvm12 2021-04-11 17:40:19 -04:00
Luuk de Gram
ff5774d93d
Refactor link/wasm.zig to use offset table
This refactor inserts an offset table into wasm's data section
where each offset points to the actual data region.
This means we can keep offset indexes consistant and do not
have to perform any computer to determine where in the data section
something like a static string exists. Instead during runtime
it will load the data offset onto the stack.
2021-04-08 22:47:08 +02:00