8912 Commits

Author SHA1 Message Date
Koakuma
31f24dbc55 stage2: sparc64: Implement airWrapErrUnionErr 2022-06-06 20:34:53 +07:00
Koakuma
c00d493a00 stage2: sparc64: Add some notes about stack space allocation 2022-06-06 20:34:53 +07:00
Koakuma
5d61f32887 stage2: sparc64: Implement airSlice 2022-06-06 20:34:53 +07:00
Koakuma
8b70abfcc6 stage2: sparc64: Fix & optimize 64-bit truncRegister 2022-06-06 20:34:53 +07:00
Koakuma
4d50e52c37 stage2: sparc64: Implement SPARCv9 xor, xnor, & not 2022-06-06 20:34:53 +07:00
Koakuma
97f9bf7e90 stage2: sparc64: Add BPr relocation to performReloc 2022-06-06 20:34:53 +07:00
Koakuma
23150de9c4 stage2: sparc64: Implement airNot 2022-06-06 20:34:53 +07:00
Koakuma
9ad74b6087 stage2: sparc64: Implement SPARCv9 addcc and movcc 2022-06-06 20:34:53 +07:00
Koakuma
97c43afefe stage2: sparc64: Spill CCR before doing calls 2022-06-06 20:34:53 +07:00
Koakuma
2dfe307d60 stage2: sparc64: Some bookkeeping fixes 2022-06-06 20:34:53 +07:00
Koakuma
89b4195c69 stage2: sparc64: Account for delay slot in airBlock 2022-06-06 20:34:53 +07:00
Koakuma
3220e0b61c stage2: sparc64: Proper handling of compare flags 2022-06-06 20:34:53 +07:00
Koakuma
9db81fee5d stage2: sparc64: Implement airStructFieldVal 2022-06-06 20:34:53 +07:00
Koakuma
3d662cfaf4 stage2: sparc64: Implement airAddSubOverflow 2022-06-06 20:34:53 +07:00
Koakuma
093332c02e stage2: sparc64: Implement condition code spilling 2022-06-06 20:34:53 +07:00
Koakuma
38aa431e03 stage2: sparc64: Fix CompareOperator <-> ICondition mapping 2022-06-06 20:34:52 +07:00
Gregory Anders
135b91aecd
Treat blocks with "return" as "noreturn"
Block statements that end with "break" should not be considered
"noreturn" for the enclosing scope, but other "noreturn" instructions
(return, panic, compile error, etc.) should be. This differentiation
necessitates handling "break" differently from the other "noreturn"
instructions when inside a block statement.
2022-06-06 13:13:52 +03:00
Jakub Konka
1b5dd4e148
Merge pull request #11790 from joachimschmidt557/stage2-arm
stage2 ARM: implement basic switch expressions
2022-06-05 09:10:12 +02:00
joachimschmidt557
d5ee451177
stage2 ARM: introduce support for basic switch expressions 2022-06-04 19:58:34 +02:00
Veikka Tuominen
50a6b0f3ac Sema: fix function type callconv inference 2022-06-04 11:33:18 +03:00
Veikka Tuominen
2b93546b39 Sema: fix initialization of array with comptime only elem type 2022-06-03 20:21:20 +03:00
Veikka Tuominen
4e1aa5d543 Sema: handle the_only_possible_value in beginComptimePtrMutation 2022-06-03 15:25:53 +03:00
Veikka Tuominen
019537cb2a Sema: @sizeOf function should give an error 2022-06-03 15:24:58 +03:00
Veikka Tuominen
8f45e81c84 stage2: ignore asm inputs named _
This is a hacky solution but the entire asm syntax is supposed to be
reworked anyways.
2022-06-03 15:10:37 +03:00
Veikka Tuominen
5c65b086d6 Value: implement {read,write}Value for more types 2022-06-03 14:29:24 +03:00
Veikka Tuominen
3db4513b33 Sema: fix type of alloc 2022-06-03 14:28:56 +03:00
Veikka Tuominen
1258b5f7d6 Type: implement elemType2 for anyframe 2022-06-03 14:28:10 +03:00
joachimschmidt557
4fdacca512
stage2 ARM: rework cmp in preparation for switch 2022-06-02 20:19:18 +02:00
Jakub Konka
e498fb1550 tapi: sync with upstream
gitrev kubkon/zig-yaml 8cf8dc3bb901fac8189f441392fc0989ad14cf71

Calculate line and col info indexed by token index. We can then
re-use this info to track current column number (aka indentation
level) of each "key:value" pair (map) or "- element" (list).
This significantly cleans up the code, and leads naturally to
handling of unindented lists in tbd files.
2022-06-02 10:41:13 +02:00
Andrew Kelley
288e89b606 Sema: fix compiler crash with comptime arithmetic involving @ptrToInt 2022-06-01 16:45:28 -07:00
Andrew Kelley
a4cdb49a58
Merge pull request #11763 from Vexu/stage2-alloc-const
Stage2: detect when initializer of const variable is comptime known
2022-06-01 18:59:13 -04:00
Andrew Kelley
b82cccc9e9 Sema: fix alignment of element ptr result type 2022-06-01 15:43:21 -07:00
Andrew Kelley
de14fba247 LLVM: convert two ArrayLists into a MultiArrayList 2022-06-01 11:53:47 -07:00
Veikka Tuominen
9431100736 Sema: apply previous changes to validateUnionInit 2022-06-01 13:01:39 +03:00
Andrew Kelley
cbb806da6e stage2: -fbuild-id causes default linker to be LLD
until zig's self-hosted linker gains this functionality.
2022-05-31 22:56:39 -07:00
Andrew Kelley
8c0f4e6f54 LLVM: add target-cpu and target-features fn attributes 2022-05-31 22:13:24 -07:00
Andrew Kelley
2f9533f639 LLVM: pass slices as ptr/len combo
LLVM optimization passes handle this better, and it allows Zig to
specify pointer parameter attributes such as readonly, nonnull, noalias,
and alignment.

closes #561
2022-05-31 18:25:57 -07:00
Andrew Kelley
356a865b87 stage2: introduce support for noalias
Not implemented yet is enhancements to coerceInMemory to account for
noalias parameters.

Related to #11498.
2022-05-31 17:38:42 -07:00
Veikka Tuominen
3c4e7abfbf Sema: handle dbg_smtts when deleting runtime instructions in validateStructInit 2022-06-01 02:18:45 +03:00
Veikka Tuominen
a73895339a Sema: handle bitcasts produced by coerce_result_ptr in validate{Array,Struct}Init 2022-06-01 02:10:18 +03:00
Andrew Kelley
ec919c3c9b LLVM: integrate param attrs with iterateParamTypes
This moves some logic from resolveLlvmFunction to updateFunc and takes
advantage of the iteration we already do that takes into account C ABI
lowering, making LLVM parameter attributes accurate for C ABI functions
as well as our own unspecified calling convention.

Related to #11498.
2022-05-31 15:32:15 -07:00
Veikka Tuominen
f2626a3d8e Sema: validate{Array,Struct}Init shortcut only valid if base ptr is comptime known 2022-06-01 01:24:11 +03:00
Veikka Tuominen
e49fd39463 Sema: detect comptime values in zirMakePtrConst 2022-06-01 01:23:52 +03:00
Andrew Kelley
43311e19f4 LLVM: add readonly, nonnull, align attributes to pointer params 2022-05-31 15:16:38 -07:00
Andrew Kelley
59219e7e91 stage2: add support for -fbuild-id,-fno-build-id
closes #3047
2022-05-31 13:36:33 -07:00
Andrew Kelley
d09d61be97
Merge pull request #11762 from Vexu/stage2
Stage2 fixes
2022-05-31 15:19:25 -04:00
Andrew Kelley
282437c753 stage2: fix hash/eql on function types
to account for generic callconv and generic alignment.
2022-05-31 12:17:48 -07:00
Andrew Kelley
d410693dad LLVM: elide some loads when lowering
Generally, the load instruction may need to make a copy of an
isByRef=true value, such as in the case of the following code:

```zig
pub fn swap(comptime T: type, a: *T, b: *T) void {
    const tmp = a.*;
    a.* = b.*;
    b.* = tmp;
}
```

However, it only needs to do so if there are any instructions which can
possibly write to memory. When calling functions with isByRef=true
parameters, the AIR code that is generated looks like loads followed
directly by call.

This allows for a peephole optimization when lowering loads: if the load
instruction operates on an isByRef=true type and dies before any side effects
occur, then we can safely lower the load as a no-op that returns its
operand.

This is one out of three changes I intend to make to address #11498.
However I will put these changes in separate branches and merge them
separately so that we can have three independent points on the perf
charts.
2022-05-31 14:17:54 -04:00
Veikka Tuominen
56608cbb3d Sema: do not add calls to returnError for comptime known non-error values 2022-05-31 17:14:49 +03:00
Veikka Tuominen
36df79cd37 stage2: ignore generic return type when hashing function type
Generic parameter types are already ignored.
2022-05-31 16:43:58 +03:00