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stage2: sparc64: Some bookkeeping fixes
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@ -686,6 +686,8 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void {
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// zig fmt: on
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}
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assert(!self.register_manager.lockedRegsExist());
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if (std.debug.runtime_safety) {
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if (self.air_bookkeeping < old_air_bookkeeping + 1) {
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std.debug.panic("in codegen.zig, handling of AIR instruction %{d} ('{}') did not do proper bookkeeping. Look for a missing call to finishAir.", .{ inst, air_tags[inst] });
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@ -2915,7 +2917,7 @@ fn isNonErr(self: *Self, ty: Type, operand: MCValue) !MCValue {
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switch (is_err_result) {
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.compare_flags_unsigned => |op| {
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assert(op.cmp == .gt);
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return MCValue{ .compare_flags_unsigned = .{ .cmp = .gt, .ccr = op.ccr } };
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return MCValue{ .compare_flags_unsigned = .{ .cmp = .lte, .ccr = op.ccr } };
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},
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.immediate => |imm| {
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assert(imm == 0);
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@ -3176,7 +3178,7 @@ fn resolveInst(self: *Self, inst: Air.Inst.Ref) InnerError!MCValue {
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const ref_int = @enumToInt(inst);
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if (ref_int < Air.Inst.Ref.typed_value_map.len) {
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const tv = Air.Inst.Ref.typed_value_map[ref_int];
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if (!tv.ty.hasRuntimeBits()) {
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if (!tv.ty.hasRuntimeBits() and !tv.ty.isError()) {
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return MCValue{ .none = {} };
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}
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return self.genTypedValue(tv);
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@ -3184,7 +3186,7 @@ fn resolveInst(self: *Self, inst: Air.Inst.Ref) InnerError!MCValue {
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// If the type has no codegen bits, no need to store it.
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const inst_ty = self.air.typeOf(inst);
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if (!inst_ty.hasRuntimeBits())
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if (!inst_ty.hasRuntimeBits() and !inst_ty.isError())
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return MCValue{ .none = {} };
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const inst_index = @intCast(Air.Inst.Index, ref_int - Air.Inst.Ref.typed_value_map.len);
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