16724 Commits

Author SHA1 Message Date
Andrew Kelley
308f72701a update cmake files to LLVM 14 2022-02-03 13:38:48 -07:00
Jakub Konka
3832b58229
Merge pull request #10775 from ziglang/x64-freeze-api
stage2: migrate x64 to freeze regalloc API, and remove the concept of register exceptions
2022-02-03 20:12:35 +01:00
Jakub Konka
228b798af5 elf: generated DWARF debug info for named structs 2022-02-03 18:47:36 +01:00
Jakub Konka
74a01e3d64 stage2: remove the concept of register exceptions 2022-02-03 18:08:29 +01:00
Jakub Konka
e0b1170b67 x64: swap out register exceptions for freeze/unfreeze api 2022-02-03 17:55:22 +01:00
Jakub Konka
cfceec15e1 Merge branch 'mparadinha-test-1486' 2022-02-03 14:31:36 +01:00
Jakub Konka
f4e0641450 x64: use freeze/unfreeze api; TODO for PIE 2022-02-03 14:31:16 +01:00
Jakub Konka
e52af26856 Merge branch 'test-1486' of git://github.com/mparadinha/zig into mparadinha-test-1486 2022-02-03 14:00:28 +01:00
Jakub Konka
b77757fe39 elf: add basic handling of .data section 2022-02-03 08:47:06 +01:00
Andrew Kelley
557a097523 CLI: link_libcpp implies link_libc
Improves a warning message for some cases of using `zig run -lc++`.
2022-02-02 14:54:14 -07:00
Jakub Konka
7694361832
Merge pull request #10769 from ziglang/link-lib-fixes
stage2: handle name-qualified imports in sema, add a zerofill sections workaround to incremental macho
2022-02-02 20:59:17 +01:00
Andrew Kelley
3eb8d01f52
Merge pull request #10766 from ziglang/yeet-anytype-fields
remove anytype fields from the language
2022-02-02 13:39:27 -05:00
Jakub Konka
f95fcb2b1f
Merge pull request #10762 from ziglang/stage2-x86_64-new-regalloc-api
stage2: handle more MCValue types in `struct_field_ptr` in x86_64 and pad out nonpacked struct fields when lowering to bytes (all targets incl wasm32)
2022-02-02 16:33:58 +01:00
Jakub Konka
8f3be0e04f stage2: update stage2 tests with qualified import lib names for externs
From

```zig
extern fn write(...);
```

to

```zig
extern "c" fn write(...);
```
2022-02-02 16:25:46 +01:00
Jakub Konka
06a037bb95 macho: handle bss like normal section in stage2
This is just a temporary workaround until I work out how to manage
non-physical sections between stage2 incremental updates.
2022-02-02 16:22:58 +01:00
Jakub Konka
380462ffc0 sema: do not pass libc or libc++ to the linker 2022-02-02 15:33:38 +01:00
GithubPrankster
23e981bbd1 Correct f80 description 2022-02-02 15:54:30 +02:00
Jakub Konka
c157b19878 wasm32: fix struct padding 2022-02-02 13:43:46 +01:00
Jakub Konka
15ff891f04 stage2: pad out (non-packed) struct fields when lowering to bytes
* pad out (non-packed) struct fields when lowering to bytes to be
  saved in the binary - prior to this change, fields would be
  saved at non-aligned addresses leading to wrong accesses
* add a matching test case to `behavior/struct.zig` tests
* fix offset to field calculation in `struct_field_ptr` on `x86_64`
2022-02-02 13:43:41 +01:00
Jakub Konka
521bd2e94a x86_64: pass more behaviour tests 2022-02-02 10:48:21 +01:00
Jakub Konka
0cccd8a887 x86_64: handle struct_field_ptr for stack_offset mcv 2022-02-02 10:48:21 +01:00
Jakub Konka
9de30bb065 x86_64: handle struct_field_ptr for register mcv 2022-02-02 10:48:21 +01:00
Jakub Konka
09e69c8c77 x86_64: start moving to new regalloc freeze API 2022-02-02 10:48:21 +01:00
mparadinha
ef4c54ba38 need to go through the GOT, and use a temporary register 2022-02-02 09:24:39 +00:00
mparadinha
b67b89025c implement store for 8 byte immediates 2022-02-02 08:50:37 +00:00
mparadinha
cc16ac9314 implement storing to MCValue.memory 2022-02-02 08:50:37 +00:00
Andrew Kelley
449554a730 stage2: remove anytype fields from the language
closes #10705
2022-02-01 19:06:40 -07:00
Andrew Kelley
f4a249325e stage1: avoid anytype fields for type info
prerequisite for #10705
2022-02-01 18:10:19 -07:00
Andrew Kelley
5cf918143c Sema: remove the data field from TypeInfo.Declaration
stage2 follow-up to aa326328d0b4a0d4ee8167be9b2ab25fd560b0c9
2022-02-01 11:40:29 -07:00
Andrew Kelley
217025e9f0
Merge pull request #10751 from mitchellh/stage2/cmp-eq-undefined
stage2: cmp between untyped undefines values results in undef bool
2022-02-01 13:38:56 -05:00
Andrew Kelley
4188d54130 Sema: replace some initTag calls with constants
No functional changes.
2022-02-01 11:37:29 -07:00
Mitchell Hashimoto
970f954039 stage2: cmp_eq between untyped undefines values results in undef bool 2022-02-01 11:21:23 -07:00
Andrew Kelley
3e99495ed8
Merge pull request #10742 from ziglang/ArrayHashMapEql
std: make ArrayHashMap eql function accept an additional param
2022-02-01 13:20:28 -05:00
Andrew Kelley
0298442100
Merge pull request #10753 from ziglang/nerf-type-info
stage1: remove the `data` field from `TypeInfo.Declaration`
2022-02-01 13:16:00 -05:00
Andrew Kelley
4d22fa5a2a update behavior tests and compile error tests 2022-01-31 22:33:49 -07:00
Andrew Kelley
75bbc74d56 a small crusade against std.meta.declarations 2022-01-31 22:25:49 -07:00
Andrew Kelley
aa326328d0 stage1: remove the data field from TypeInfo.Declaration
Partially implements #10706
2022-01-31 22:09:41 -07:00
Andrew Kelley
39983d7ff5 stage2: update to new ArrayHashMap API 2022-01-31 21:12:37 -07:00
Andrew Kelley
44b105a38d stage2: make --debug-log work by default for debug builds
can be disabled with `-Dlog=false`
2022-01-31 21:11:41 -07:00
Andrew Kelley
d3e40b0d80
Merge pull request #10743 from m-radomski/master
std: correct rounding in parse_hex_float.zig
2022-01-31 22:59:49 -05:00
Andrew Kelley
c46f7588ce std.fmt.parseHexFloat: clean up bitwise logic
* fold a couple separate operations into one
 * use const instead of var
 * naming conventions
2022-01-31 20:59:32 -07:00
Mateusz Radomski
7f024d6786 std: correct rounding in parse_hex_float.zig 2022-01-31 20:59:32 -07:00
Jakub Konka
627cf6ce48 astgen: clean up source line calculation and management
Clarify that `astgen.advanceSourceCursor` already increments absolute
values of the line and columns numbers; i.e., `GenZir.calcLine` is thus
not only obsolete but wrong by design.

Incidentally, this clean up allows for specifying the `FnDecl` line
numbers for DWARF use correctly as relative values with respect to
the start of the parent `Decl`. This `Decl` in turn has its line number
information specified relatively to its parent `Decl`, and so on, until
we reach the global scope.
2022-01-31 22:29:29 -05:00
Andrew Kelley
abbcf40327 Sema: fix index type in AIR being u64 instead of usize 2022-01-31 16:41:14 -07:00
John Schmidt
8e497eb32c debug: fix edge cases in macOS debug symbol lookup
This commit fixes two related things:

1. If the loop goes all the way through the slice without a match, on
   the last iteration `mid == symbols.len - 1` which causes
   `&symbols[mid + 1]` to be out of bounds. End one step before that
   instead.

2. If the address we're looking for is greater than the address of the
   last symbol in the slice, we now match it to that symbol. Previously,
   we would miss this case since we only matched if the address was _in
   between_ the address of two symbols.
2022-01-31 23:55:19 +01:00
joachimschmidt557
2913950ca9 stage2 ARM: implement ptr_stack_offset function parameters 2022-01-31 23:52:32 +01:00
Žiga Željko
5210b9074c os,wasi: use wasi-libc if available 2022-01-31 22:54:30 +01:00
Andrew Kelley
cf88cf2657 std: make ArrayHashMap eql function accept an additional param
which is the index of the key that already exists in the hash map.

This enables the use case of using `AutoArrayHashMap(void, void)` which
may seem surprising at first, but is actually pretty handy!
This commit includes a proof-of-concept of how I want to use it, with a
new InternArena abstraction for stage2 that provides a compact way to
store values (and types) in an "internment arena", thus making types
stored exactly once (per arena), representable with a single u32 as a
reference to a type within an InternArena, and comparable with a
simple u32 integer comparison. If both types are in the same
InternArena, you can check if they are equal by seeing if their index is
the same.

What's neat about `AutoArrayHashMap(void, void)` is that it allows us to
look up the indexes by key, *without actually storing the keys*.
Instead, keys are treated as ephemeral values that are constructed as
needed.

As a result, we have an extremely efficient encoding of types and
values, represented only by three arrays, which has no pointers, and can
therefore be serialized and deserialized by a single writev/readv call.
The `map` field is denormalized data and can be computed from the other
two fields.

This is in contrast to our current Type/Value system which makes
extensive use of pointers.

The test at the bottom of InternArena.zig passes in this commit.
2022-01-31 01:20:45 -07:00
joachimschmidt557
66cf011aa9 stage2 ARM: Move to new regalloc freeze API 2022-01-30 19:41:51 -05:00
Andrew Kelley
227968d78c
Merge pull request #10723 from joachimschmidt557/stage2-riscv
stage2 RISCV64: Move to new regalloc freeze API
2022-01-30 19:41:35 -05:00