1999 Commits

Author SHA1 Message Date
Alex Rønne Petersen
c9e67e71c1
std.Target: Replace isARM() with isArmOrThumb() and rename it to isArm().
The old isARM() function was a portability trap. With the name it had, it seemed
like the obviously correct function to use, but it didn't include Thumb. In the
vast majority of cases where someone wants to ask "is the target Arm?", Thumb
*should* be included.

There are exactly 3 cases in the codebase where we do actually need to exclude
Thumb, although one of those is in Aro and mirrors a check in Clang that is
itself likely a bug. These rare cases can just add an extra isThumb() check.
2024-11-03 09:29:30 +01:00
Alex Rønne Petersen
4e843b4e2b
llvm: Remove extraneous commas for branch hint metadata in textual IR output. 2024-11-02 11:06:33 +01:00
Alex Rønne Petersen
fccf15fc9f std.Target: Remove armv7k/armv7s.
Like d1d95294fd657f771657ea671a6984b860347fb0, this is more Apple nonsense where
they abused the arch component of the triple to encode what's really an ABI.

Handling this correctly in Zig's target triple model would take quite a bit of
work. Fortunately, the last Armv7-based Apple Watch was released in 2017 and
these targets are now considered legacy. By the time Zig hits 1.0, they will be
a distant memory. So just remove them.
2024-11-02 10:25:40 +01:00
Alex Rønne Petersen
3c1ccbdf39
std.Target: Add support for specifying Android API level. 2024-11-01 06:23:59 +01:00
Alex Rønne Petersen
c5395f7cd9
llvm: Set OS min version and libc version in ~all cases.
Except Windows, because that just doesn't really fit into LLVM's target triple
format currently.
2024-11-01 06:23:59 +01:00
Alex Rønne Petersen
60c0f522d9
llvm: Set vendor type in LLVM target triple for more OSs.
Annoyingly, LLVM and Clang have various checks throughout that depend on these
vendor types being set.
2024-11-01 06:23:59 +01:00
Robin Voetter
ba5f57616f
Merge pull request #21861 from alichraghi/master
spirv: push constants and small fixes
2024-11-01 03:44:37 +01:00
Ali Cheraghi
c07b3c8279
spirv: decorate arrays stride 2024-11-01 02:04:27 +03:30
Ali Cheraghi
a1cb9563f6
spirv: Uniform/PushConstant variables
- Rename GPU address spaces to match with SPIR-V spec.
- Emit `Block` Decoration for Uniform/PushConstant variables.
- Don't emit `OpTypeForwardPointer` for non-opencl targets.
  (there's still a false-positive about recursive structs)

Signed-off-by: Ali Cheraghi <alichraghi@proton.me>
2024-11-01 02:03:33 +03:30
mlugg
d11bbde5f9
compiler: remove anonymous struct types, unify all tuples
This commit reworks how anonymous struct literals and tuples work.

Previously, an untyped anonymous struct literal
(e.g. `const x = .{ .a = 123 }`) was given an "anonymous struct type",
which is a special kind of struct which coerces using structural
equivalence. This mechanism was a holdover from before we used
RLS / result types as the primary mechanism of type inference. This
commit changes the language so that the type assigned here is a "normal"
struct type. It uses a form of equivalence based on the AST node and the
type's structure, much like a reified (`@Type`) type.

Additionally, tuples have been simplified. The distinction between
"simple" and "complex" tuple types is eliminated. All tuples, even those
explicitly declared using `struct { ... }` syntax, use structural
equivalence, and do not undergo staged type resolution. Tuples are very
restricted: they cannot have non-`auto` layouts, cannot have aligned
fields, and cannot have default values with the exception of `comptime`
fields. Tuples currently do not have optimized layout, but this can be
changed in the future.

This change simplifies the language, and fixes some problematic
coercions through pointers which led to unintuitive behavior.

Resolves: #16865
2024-10-31 20:42:53 +00:00
Alex Rønne Petersen
f1f804e532
zig_llvm: Reduce our exposure to LLVM API breakage.
LLVM recently introduced new Triple::ArchType members in 19.1.3 which broke our
static assertions in zig_llvm.cpp. When implementing a fix for that, I realized
that we don't even need a lot of the stuff we have in zig_llvm.(cpp,h) anymore.
This commit trims the interface down considerably.
2024-10-31 01:27:22 +01:00
Robin Voetter
3450809e3d
Merge pull request #21826 from Snektron/spirv-vulkan
spirv: vulkan setup
2024-10-29 19:58:51 +01:00
David Rubin
93e5ea033c
implement new interrupts in the llvm backend 2024-10-27 13:33:27 -07:00
Robin Voetter
39013619b9
spirv: generate test entry points for vulkan 2024-10-27 15:19:57 +01:00
Robin Voetter
7c69231367
spirv: use PhysicalStorageBuffer64 for global pointers under vk
We can use real pointers with this storage class!!
2024-10-27 15:19:56 +01:00
Robin Voetter
6de456c179
spirv: fix up calling conventions for vulkan
* Fragment and Vertex CCs are only valid for SPIR-V when
  running under Vulkan.
* Emit GLCompute instead of Kernel for SPIR-V kernels.
2024-10-27 15:19:55 +01:00
Alex Rønne Petersen
03d0e296cb
Merge pull request #21710 from alexrp/function-alignment
Some improvements to the compiler's handling of function alignment
2024-10-25 11:10:28 +02:00
Andrew Kelley
78f643c46d
Merge pull request #21758 from kcbanner/dll_storage_class
Add `is_dll_import` to @extern, to support `__declspec(dllimport)` with the MSVC ABI
2024-10-23 15:35:54 -07:00
kcbanner
a4690ecb1f Cause a compilation error to occur if using @extern with is_dll_import in a comptime scope.
Add a note about thread local / dll import being the cause.
2024-10-22 12:41:35 -04:00
kcbanner
ee25757245 Add support for specifying dll_storage_class in @extern 2024-10-22 12:41:35 -04:00
Alex Rønne Petersen
6c1e306484
llvm: Add some missing fnptr alignment specifications in DataLayoutBuilder. 2024-10-20 09:21:17 +02:00
mlugg
289b2f82c3
llvm: fix lowering arm_aapcs_vfp functions 2024-10-19 19:21:33 +01:00
mlugg
3ef8bb6354
llvn: fix incorrect mips64 callconv handling 2024-10-19 19:21:32 +01:00
mlugg
1f11eed3d1
llvm: fix lowering of avr_interrupt and m68k_interrupt callconvs 2024-10-19 19:21:32 +01:00
mlugg
cb48376bec
cbe,translate-c: support more callconvs
There are several more that we could support here, but I didn't feel
like going down the rabbit-hole of figuring them out. In particular,
some of the Clang enum fields aren't specific enough for us, so we'll
have to switch on the target to figure out how to translate-c them. That
can be a future enhancement.
2024-10-19 19:15:24 +01:00
mlugg
2d9a167cd2
std.Target: rename defaultCCallingConvention and Cpu.Arch.fromCallconv 2024-10-19 19:15:23 +01:00
mlugg
bc797a97b1
std: update for new CallingConvention
The old `CallingConvention` type is replaced with the new
`NewCallingConvention`. References to `NewCallingConvention` in the
compiler are updated accordingly. In addition, a few parts of the
standard library are updated to use the new type correctly.
2024-10-19 19:15:23 +01:00
mlugg
51706af908
compiler: introduce new CallingConvention
This commit begins implementing accepted proposal #21209 by making
`std.builtin.CallingConvention` a tagged union.

The stage1 dance here is a little convoluted. This commit introduces the
new type as `NewCallingConvention`, keeping the old `CallingConvention`
around. The compiler uses `std.builtin.NewCallingConvention`
exclusively, but when fetching the type from `std` when running the
compiler (e.g. with `getBuiltinType`), the name `CallingConvention` is
used. This allows a prior build of Zig to be used to build this commit.
The next commit will update `zig1.wasm`, and then the compiler and
standard library can be updated to completely replace
`CallingConvention` with `NewCallingConvention`.

The second half of #21209 is to remove `@setAlignStack`, which will be
implemented in another commit after updating `zig1.wasm`.
2024-10-19 19:08:59 +01:00
Andrew Kelley
8504e1f550
Merge pull request #21610 from alexrp/riscv-abis
Fix some RISC-V ABI issues and add ILP32/LP64 (soft float) to module tests
2024-10-17 12:54:44 -07:00
Alex Rønne Petersen
7a3626d1c6
llvm: Disable f16 lowering for loongarch.
This should be reverted with LLVM 20.
2024-10-16 01:19:00 +02:00
Alex Rønne Petersen
5e4249eb8b
llvm: Fix natural int width specifications for loongarch in DataLayoutBuilder. 2024-10-16 01:10:36 +02:00
Alex Rønne Petersen
958f57d65d
llvm: Enable native f16 lowering for riscv32. 2024-10-15 19:29:56 +02:00
Alex Rønne Petersen
3550cacd73
llvm: Fix compiler crash when lowering f16 for riscv32 ilp32. 2024-10-15 19:29:56 +02:00
Robin Voetter
e2e79960d2
Merge pull request #21688 from Snektron/spirv-fix
spirv: fix some bitrot
2024-10-13 22:33:03 +02:00
David Rubin
e131a2c8e2
implement packed struct equality (#21679) 2024-10-12 20:59:12 -07:00
Robin Voetter
c1132edd53
spirv: don't generate OpUnreachable after noreturn call
It seems that these are now automatically added to AIR in Sema.
2024-10-13 01:57:35 +02:00
Robin Voetter
973f846251
spirv: implement repeat and dbg_arg_inline 2024-10-13 01:57:06 +02:00
Robin Voetter
3cd19b8884
spirv: don't try to lower types which have no runtime bits 2024-10-13 01:56:33 +02:00
Alex Rønne Petersen
ece265b1c2
Merge pull request #21605 from alexrp/ohos-stuff
`std.Target`: Introduce `Abi.ohoseabi` to distinguish the soft float case.
2024-10-06 16:26:24 +02:00
Alex Rønne Petersen
be5378b038
Merge pull request #21587 from alexrp/hexagon-porting
Some initial `hexagon-linux` port work
2024-10-06 13:35:56 +02:00
Alex Rønne Petersen
84e192c88b
std.Target: Introduce Abi.ohoseabi to distinguish the soft float case.
For the same reason as #21504.
2024-10-05 15:13:37 +02:00
Alex Rønne Petersen
d23db9427b
Merge pull request #21574 from alexrp/llvm-sub-arch
`llvm`: Implement sub-architecture translation in `targetTriple()`.
2024-10-05 13:49:05 +02:00
David Rubin
043b1adb8d
remove @fence (#21585)
closes #11650
2024-10-04 22:21:27 +00:00
Felix Queißner
7c74edec8d
Adds new cpu architectures propeller1 and propeller2. (#21563)
* Adds new cpu architectures propeller1 and propeller2.

These cpu architectures allow targeting the Parallax Propeller 1 and Propeller 2, which are both very special microcontrollers with 512 registers and 8 cpu cores.

Resolves #21559

* Adds std.elf.EM.PROPELLER and std.elf.EM.PROPELLER2
* Fixes missing switch prongs in src/codegen/llvm.zig
* Fixes order in std.Target.Arch

---------

Co-authored-by: Felix "xq" Queißner <git@random-projects.net>
2024-10-04 13:53:28 -07:00
Alex Rønne Petersen
eb363bf845
Merge pull request #21572 from alexrp/tests-llvm-targets
`test`: Rewrite the target triple list for `llvm_targets`.
2024-10-04 19:37:12 +02:00
Alex Rønne Petersen
f31173d379
llvm: Disable f16 lowering for hexagon.
In theory, this should work for v68+. In practice, it runs into an LLVM
assertion when using a `freeze` instruction on `f16` values, similar to the
issue we had for LoongArch.
2024-10-03 09:53:59 +02:00
Alex Rønne Petersen
b4ddff396d
llvm: Fix C ABI integer promotion for s390x. 2024-10-03 06:19:23 +02:00
Alex Rønne Petersen
3f322c49bc
std.Target: Remove Os.Tag.shadermodel.
This was a leftover from the Cpu.Arch.dxil removal.
2024-10-03 05:01:24 +02:00
Alex Rønne Petersen
85bf1e2b1f
llvm: Implement sub-architecture translation in targetTriple(). 2024-10-03 02:39:12 +02:00
Alex Rønne Petersen
e0ac776749
Merge pull request #21504 from alexrp/android-softfp
`std.Target`: Introduce `Abi.androideabi` to distinguish the soft float case.
2024-10-03 00:15:35 +02:00