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Merge pull request #21610 from alexrp/riscv-abis
Fix some RISC-V ABI issues and add ILP32/LP64 (soft float) to module tests
This commit is contained in:
Andrew Kelley
GitHub
commit
8504e1f550
@ -103,7 +103,7 @@ pub fn F16T(comptime OtherType: type) type {
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else
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u16,
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.aarch64, .aarch64_be => f16,
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.riscv64 => if (builtin.zig_backend == .stage1) u16 else f16,
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.riscv32, .riscv64 => f16,
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.x86, .x86_64 => if (builtin.target.isDarwin()) switch (OtherType) {
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// Starting with LLVM 16, Darwin uses different abi for f16
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// depending on the type of the other return/argument..???
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@ -1688,12 +1688,6 @@ pub const Object = struct {
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else
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try wip.load(.normal, param_llvm_ty, arg_ptr, param_alignment, ""));
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},
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.as_u16 => {
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assert(!it.byval_attr);
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const param = wip.arg(llvm_arg_i);
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llvm_arg_i += 1;
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args.appendAssumeCapacity(try wip.cast(.bitcast, param, .half, ""));
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},
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.float_array => {
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const param_ty = Type.fromInterned(fn_info.param_types.get(ip)[it.zig_index - 1]);
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const param_llvm_ty = try o.lowerType(param_ty);
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@ -3096,7 +3090,6 @@ pub const Object = struct {
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.no_bits,
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.abi_sized_int,
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.multiple_llvm_types,
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.as_u16,
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.float_array,
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.i32_array,
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.i64_array,
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@ -3771,9 +3764,6 @@ pub const Object = struct {
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.multiple_llvm_types => {
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try llvm_params.appendSlice(o.gpa, it.types_buffer[0..it.types_len]);
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},
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.as_u16 => {
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try llvm_params.append(o.gpa, .i16);
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},
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.float_array => |count| {
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const param_ty = Type.fromInterned(fn_info.param_types.get(ip)[it.zig_index - 1]);
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const float_ty = try o.lowerType(aarch64_c_abi.getFloatArrayType(param_ty, zcu).?);
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@ -5588,12 +5578,6 @@ pub const FuncGen = struct {
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llvm_args.appendAssumeCapacity(loaded);
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}
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},
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.as_u16 => {
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const arg = args[it.zig_index - 1];
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const llvm_arg = try self.resolveInst(arg);
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const casted = try self.wip.cast(.bitcast, llvm_arg, .i16, "");
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try llvm_args.append(casted);
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},
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.float_array => |count| {
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const arg = args[it.zig_index - 1];
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const arg_ty = self.typeOf(arg);
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@ -5655,7 +5639,6 @@ pub const FuncGen = struct {
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.no_bits,
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.abi_sized_int,
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.multiple_llvm_types,
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.as_u16,
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.float_array,
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.i32_array,
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.i64_array,
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@ -11969,7 +11952,6 @@ const ParamTypeIterator = struct {
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abi_sized_int,
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multiple_llvm_types,
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slice,
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as_u16,
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float_array: u8,
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i32_array: u8,
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i64_array: u8,
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@ -12091,8 +12073,6 @@ const ParamTypeIterator = struct {
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.riscv32, .riscv64 => {
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it.zig_index += 1;
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it.llvm_index += 1;
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if (ty.toIntern() == .f16_type and
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!std.Target.riscv.featureSetHas(target.cpu.features, .d)) return .as_u16;
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switch (riscv_c_abi.classifyType(ty, zcu)) {
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.memory => return .byref_mut,
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.byval => return .byval,
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@ -12440,7 +12420,8 @@ fn isScalar(zcu: *Zcu, ty: Type) bool {
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}
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/// This function returns true if we expect LLVM to lower x86_fp80 correctly
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/// and false if we expect LLVM to crash if it counters an x86_fp80 type.
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/// and false if we expect LLVM to crash if it encounters an x86_fp80 type,
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/// or if it produces miscompilations.
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fn backendSupportsF80(target: std.Target) bool {
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return switch (target.cpu.arch) {
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.x86_64, .x86 => !std.Target.x86.featureSetHas(target.cpu.features, .soft_float),
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@ -12449,8 +12430,8 @@ fn backendSupportsF80(target: std.Target) bool {
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}
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/// This function returns true if we expect LLVM to lower f16 correctly
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/// and false if we expect LLVM to crash if it counters an f16 type or
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/// if it produces miscompilations.
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/// and false if we expect LLVM to crash if it encounters an f16 type,
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/// or if it produces miscompilations.
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fn backendSupportsF16(target: std.Target) bool {
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return switch (target.cpu.arch) {
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// LoongArch can be removed from this list with LLVM 20.
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@ -12467,7 +12448,6 @@ fn backendSupportsF16(target: std.Target) bool {
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.mipsel,
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.mips64,
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.mips64el,
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.riscv32,
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.s390x,
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=> false,
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.arm,
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@ -12483,7 +12463,7 @@ fn backendSupportsF16(target: std.Target) bool {
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}
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/// This function returns true if we expect LLVM to lower f128 correctly,
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/// and false if we expect LLVm to crash if it encounters and f128 type
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/// and false if we expect LLVM to crash if it encounters an f128 type,
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/// or if it produces miscompilations.
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fn backendSupportsF128(target: std.Target) bool {
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return switch (target.cpu.arch) {
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@ -12510,7 +12490,7 @@ fn backendSupportsF128(target: std.Target) bool {
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}
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/// LLVM does not support all relevant intrinsics for all targets, so we
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/// may need to manually generate a libc call
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/// may need to manually generate a compiler-rt call.
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fn intrinsicsAllowed(scalar_ty: Type, target: std.Target) bool {
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return switch (scalar_ty.toIntern()) {
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.f16_type => backendSupportsF16(target),
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@ -427,17 +427,14 @@ pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {
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// Once our self-hosted linker can handle both ABIs, this hack should go away.
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if (target.cpu.arch == .powerpc64) return "elfv2";
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const have_float = switch (target.abi) {
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.gnueabihf, .musleabihf, .eabihf => true,
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else => false,
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};
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switch (target.cpu.arch) {
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.riscv64 => {
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const featureSetHas = std.Target.riscv.featureSetHas;
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if (featureSetHas(target.cpu.features, .d)) {
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if (featureSetHas(target.cpu.features, .e)) {
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return "lp64e";
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} else if (featureSetHas(target.cpu.features, .d)) {
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return "lp64d";
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} else if (have_float) {
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} else if (featureSetHas(target.cpu.features, .f)) {
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return "lp64f";
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} else {
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return "lp64";
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@ -445,12 +442,12 @@ pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {
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},
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.riscv32 => {
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const featureSetHas = std.Target.riscv.featureSetHas;
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if (featureSetHas(target.cpu.features, .d)) {
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return "ilp32d";
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} else if (have_float) {
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return "ilp32f";
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} else if (featureSetHas(target.cpu.features, .e)) {
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if (featureSetHas(target.cpu.features, .e)) {
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return "ilp32e";
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} else if (featureSetHas(target.cpu.features, .d)) {
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return "ilp32d";
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} else if (featureSetHas(target.cpu.features, .f)) {
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return "ilp32f";
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} else {
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return "ilp32";
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}
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@ -579,6 +579,20 @@ const test_targets = blk: {
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.link_libc = true,
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},
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.{
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.target = std.Target.Query.parse(.{
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.arch_os_abi = "riscv32-linux-none",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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},
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.{
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.target = std.Target.Query.parse(.{
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.arch_os_abi = "riscv32-linux-musl",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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.link_libc = true,
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},
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.{
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.target = .{
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.cpu_arch = .riscv32,
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@ -603,6 +617,20 @@ const test_targets = blk: {
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.link_libc = true,
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},
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.{
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.target = std.Target.Query.parse(.{
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.arch_os_abi = "riscv64-linux-none",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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},
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.{
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.target = std.Target.Query.parse(.{
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.arch_os_abi = "riscv64-linux-musl",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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.link_libc = true,
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},
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.{
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.target = .{
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.cpu_arch = .riscv64,
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@ -631,7 +659,7 @@ const test_targets = blk: {
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.target = std.Target.Query.parse(.{
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.arch_os_abi = "riscv64-linux-musl",
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.cpu_features = "baseline+v+zbb",
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}) catch @panic("OOM"),
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}) catch unreachable,
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.use_llvm = false,
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.use_lld = false,
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},
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