8856 Commits

Author SHA1 Message Date
Jakub Konka
c1fb14c51e x64: handle storing non-pow2 values to stack from register
This actually requires storing and shifting mechanics so that we
don't accidentally clobber anything else on the stack.
2022-02-17 00:26:00 +01:00
Andrew Kelley
2b3df5c81d link: avoid double close on openPath error 2022-02-16 14:12:15 -07:00
Jakub Konka
94474ec7c7 x64: refactor use of inline memcpy 2022-02-16 21:40:08 +01:00
Cody Tapscott
1639fd4c45 Fix 2D array support for C backend
This updates the C backend to use proper array types.

In order to do that, this commit also:
 - fixes up elem_ptr and field_ptr handling
 - adds `renderTypecast` (renders in C typecast format, e.g. "int* [10]")
 - adds a bit special handling for undefined pointers, which is necessary
   to support slice/elem_ptr to undefined decls
2022-02-16 12:57:11 -07:00
Jakub Konka
09d468b237 x64: overhaul stack handling mechanics
Now, the abstracted stack offsets grow in the same direction as
the real stack values in hardware, and allocating stack memory is done
by the taking the last stack offset, adding required abi size
and aligning to the required abi align. Stack handling is now more
natural as it aligns itself with how it works in hardware; hence
stepping through the debugger and printing out different stack
values is intuitive. Finally, the stack pointers are now correctly
aligned to the required (and not necessarily natural) alignment.
2022-02-16 20:35:03 +01:00
Cody Tapscott
c4baa6696e cbe: Add writeCValueDeref and small re-factor 2022-02-16 12:19:54 -07:00
joachimschmidt557
1a84c23d69 stage2 AArch64: Simplify and correct invocations of genInlineMemcpy
Previously, the invocations used movk instead of movz
2022-02-16 15:47:44 +01:00
Jakub Konka
d3edf298d1 x64: fix signed truncate 2022-02-16 15:24:04 +01:00
Jakub Konka
1b7ec44924 x64: separate ptr_add and ptr_sub from normal bin ops 2022-02-16 15:00:32 +01:00
Jakub Konka
3383064b27 x64: implement airSlice 2022-02-16 14:13:06 +01:00
Jakub Konka
78e6f9c44c x64: fix ptr_add
However, still missing is taking into account pointer alignment
when performing arithmetic.
2022-02-16 14:13:06 +01:00
Jakub Konka
c7775a9f62 x64: impl genBinMathOpMir for ptr_stack_off and PIE memory 2022-02-16 14:13:06 +01:00
Jakub Konka
5283a52af5 macho: handle binary updates in dSYM companion file
* move DWARF in file if LINKEDIT spilled in dSYM
* update VM addresses for all segments
* introduce copyFileRangeOverlappedAll instead of File.copyRangeAll
  since we make lots of overlapping writes in MachO linker
2022-02-16 08:38:28 +01:00
Andrew Kelley
22f464a8c3 zig cc: handle -l :FILE syntax
This "feature" of gcc/clang means to treat this as a positional
link object, but using the library search directories as a prefix.

We solve this problem in the CLI layer, using a separate map for
the data since it is an uncommon case.

Closes #10851
2022-02-15 17:36:12 -07:00
Jakub Konka
1c975607e1 aarch64: add lowerUnnamedConst glue to codegen 2022-02-15 21:04:40 +01:00
Jakub Konka
5bba041bae aarch64: introduce MCValue.got_load and MCValue.direct_load
This matches the current design in x86_64 backend and significantly
simplifies handling of PIE targets in aarch64 backend.
2022-02-15 21:04:40 +01:00
Jan Philipp Hafer
c6cd919a18 stage1: fix comptime saturation subtraction
- also simplifies code
- adding a few more tests

closes #10870
2022-02-15 10:40:53 +02:00
Jakub Konka
be98f30a2d
Merge pull request #10893 from joachimschmidt557/stage2-aarch64
stage2 AArch64: get zig test working; enable behavior tests
2022-02-15 07:05:24 +01:00
John Schmidt
807edd2234
LLVM backend: refactor LLVM bitcount ops (#10882)
Use `llvm.getIntrinsic` instead of `llvm.getNamedFunction`
2022-02-14 21:52:12 -05:00
joachimschmidt557
22895f5616
stage2 AArch64: Enable behavior testing 2022-02-14 22:33:01 +01:00
joachimschmidt557
98c71cc88a
stage2 AArch64: Implement calling function pointers 2022-02-14 22:09:44 +01:00
joachimschmidt557
783e216e7d
stage2 AArch64: Fix issue in binOp and add regression test 2022-02-14 22:09:44 +01:00
joachimschmidt557
1c37622659
stage2 AArch64: Implement not for booleans 2022-02-14 22:09:44 +01:00
joachimschmidt557
3a33f31334
stage2 AArch64: implement cond_br for other MCValues 2022-02-14 22:09:44 +01:00
joachimschmidt557
edb2a75982
stage2 AArch64: Implement binOp for add, sub 2022-02-14 22:09:44 +01:00
joachimschmidt557
8bfc4b2f9c
stage2 AArch64: extract store out of airStore for recursive calls 2022-02-14 22:09:44 +01:00
joachimschmidt557
f47245865e
stage2 AArch64: minor refactors in Mir + Emit 2022-02-14 22:09:43 +01:00
joachimschmidt557
f598d2ae05
stage2 AArch64: implement unwrap_errunion_err and struct_field_ptr 2022-02-14 22:09:43 +01:00
joachimschmidt557
8204ad1937
stage2 AArch64: implement slice_len and slice_elem_val 2022-02-14 22:09:43 +01:00
joachimschmidt557
82f91adbb4
stage2 AArch64: Add madd, msub, mul, mneg instructions 2022-02-14 22:09:43 +01:00
joachimschmidt557
77cf000438
stage2 AArch64: implement loading from register 2022-02-14 22:09:43 +01:00
joachimschmidt557
0d16e908fb
stage2 AArch64: implement is_err/is_non_err for simple error unions 2022-02-14 22:09:39 +01:00
Jakub Konka
27cfbf949a macho: re-enable creating dSYM bundle
* update number of type abbrevs to match Elf linker
* update `DebugSymbols` to write symbol and string tables
  at the end to match the `MachO` linker
* TODO: update segment vm addresses when growing segments in
  the binary
* TODO: store DWARF relocations in linker's interned arena
2022-02-14 19:24:23 +01:00
Al Hoang
04f3d93017 haiku add missing cimport include for compilation 2022-02-14 15:24:53 +02:00
John Schmidt
ee69a4b45f stage2: improve compiler error message for bad union init 2022-02-14 13:05:00 +02:00
joachimschmidt557
f5068107cd stage2 regalloc: track Inst instead of ?Inst in register mapping
The information whether a register is allocated to an instruction is
already encoded in the free_registers "bitmap". Duplicating that
information in the registers map is unnecessary and may lead to
performance degradations.
2022-02-13 23:24:26 +01:00
Cody Tapscott
7edf3d9f2d Cast abi_size to usize 2022-02-13 14:16:40 -07:00
Andrew Kelley
f73044dae5
Merge pull request #10879 from Vexu/err
make some errors point to the end of the previous token
2022-02-13 16:15:00 -05:00
Cody Tapscott
7b72fc6bbc Add abi_size parameter to read/writeTwosComplement
Big-int functions were updated to respect the provided abi_size, rather
than inferring a potentially incorrect abi_size implicitly.

In combination with the convention that any required padding bits are
added on the MSB end, this means that exotic integers can potentially
have a well-defined memory layout.
2022-02-13 13:26:59 -07:00
Mateusz Radomski
b5f8fb85e6
Implement f128 @rem 2022-02-13 15:37:38 +02:00
Jacob G-W
3bbe6a28e0 stage2: add decltests 2022-02-13 14:42:20 +02:00
Veikka Tuominen
ddd6de86f7 parser: make missing semicolon error point to the end of the previous token 2022-02-13 13:45:35 +02:00
Andrew Kelley
a005ac9d3c stage2: implement @popCount for SIMD vectors 2022-02-12 20:44:30 -07:00
Jakub Konka
16ec848d2a macho: put linker symlink for cache invalidation in zig-cache
Due to differences in where the output gets emitted in stage1 and stage2,
we were putting the symlink next to the binary rather than in `zig-cache`
directory when building with stage2.
2022-02-12 21:27:23 +01:00
Andrew Kelley
91508e10ab LLVM backend: handle unnamed structs when lowering array values
LLVM doesn't support lowering union values, so we have to use unnamed
structs to do it, which means any type that contains a union as an
element, even if it is nested in another type, has to have a mechanism
to detect when it can't be lowered normally and has to resort itself to
an unnamed struct.

This includes arrays.
2022-02-12 11:18:23 +01:00
Andrew Kelley
38236533f1 LLVM backend: avoid creating invalid LLVM types
Fixes assertions from creating i0 types which are not allowed in LLVM.
2022-02-12 11:18:23 +01:00
Andrew Kelley
ba31a9469f Sema: int casting to u0 returns const value
Also shift left with u0 rhs returns lhs even when lhs is runtime known.
2022-02-12 11:18:23 +01:00
Andrew Kelley
b92e1ab8cc stage1: override f80 alignment for i386-windows
Comment reproduced here:

Note the following u64 alignments:
  x86-linux:   4
  x86-windows: 8
LLVM makes x86_fp80 have the following alignment and sizes regardless
of operating system:
  x86_64: size=16, align=16
  x86:    size=12, align=4
However in Zig we override x86-windows to have size=16, align=16
in order for the property to hold that u80 and f80 have the same ABI size.

Fixes "error: destination type 'f80' has size 12 but source type 'u80'
has size 16" when trying to bitcast between f80 and u80 on i386-windows.
2022-02-12 11:18:23 +01:00
Andrew Kelley
d72f832b1e LLVM backend: call constPtrToInt instead of constBitCast
when appropriate. Avoids tripping an LLVM assertion.
2022-02-12 11:18:23 +01:00
Andrew Kelley
335c680cde LLVM backend: fix union with only 1 tag tripping llvm assertion 2022-02-12 11:18:23 +01:00