3661 Commits

Author SHA1 Message Date
Jakub Konka
a4e6291fbd
stage2: enable zig test on x86_64-macos (#10551)
* stage2: put decls in different MachO sections

Use `getDeclVAddrWithReloc` when targeting MachO backend rather than
`getDeclVAddr` - this fn returns a zero vaddr and instead creates a
relocation on the linker side which will get automatically updated
whenever the target decl is moved in memory. This fn also records
a rebase of the target pointer so that its value is correctly slid
in presence of ASLR.

This commit enables `zig test` on x86_64-macos.

* stage2: fix output section selection for type,val pairs
2022-01-10 16:02:07 +01:00
joachimschmidt557
a1526f069a
stage2 ARM: pass behavior/bool.zig 2022-01-09 19:03:45 +01:00
Luuk de Gram
2a39d8063d wasm: Implement arrays 2022-01-08 19:56:07 -05:00
Andrew Kelley
7651913fd2
Merge pull request #10542 from Hejsil/stage2-bit-offset-of
Stage2 bitOffsetOf and offsetOf builtin functions
2022-01-08 15:48:14 -05:00
Robin Voetter
cc5c25d48b stage2: implement @src 2022-01-08 14:32:40 -05:00
Robin Voetter
4931b8dc93 stage2: @errorName sema+llvm 2022-01-08 14:30:11 -05:00
Jimmi Holst Christensen
5cbb35abd0 Implement bitOffsetOf
This also refactors getting struct field offsets into two
iterators. This will be useful when implementing bitCast at comptime on
structs.
2022-01-08 14:01:28 +01:00
Jimmi Holst Christensen
3871d5e55a bit_shifting.zig now passes stage2 llvm backend 2022-01-07 22:10:36 +01:00
Meghan
c08b190c69
lint: duplicate import (#10519) 2022-01-07 00:06:06 -05:00
Jimmi Holst Christensen
7f4fdcc4fc stage2: Implement validating switch on errors 2022-01-06 22:57:45 -05:00
Andrew Kelley
59315463f2 ci: add test coverage for self-hosted arm and x86_64 backends 2022-01-06 22:57:29 -05:00
Andrew Kelley
77f230ebd8 C backend is passing test/behavior/undefined.zig
closes #10505
2022-01-06 13:07:38 -07:00
Jakub Konka
97e76bf36c stage2: temporarily disable offending stage2 test on macOS
Another caveat, `zig test` doesn't currently work on stage2.
2022-01-06 12:57:34 +01:00
Jakub Konka
a124192fb0 stage2: implement basics of airWrapErrUnionErr
Enable more behavior tests for x86_64.
2022-01-06 10:12:01 +01:00
Jakub Konka
b215241ef2 stage2: fix airSliceElemVal
Refactor codegen and fix a bug in Isel.
2022-01-06 09:54:33 +01:00
Andrew Kelley
8c6175c134 Sema: const inferred alloc infers comptime-ness
const locals now detect if the value ends up being comptime known. In
such case, it replaces the runtime AIR instructions with a decl_ref
const.

In the backends, some more sophisticated logic for marking decls as
alive was needed to prevent Decls incorrectly being garbage collected
that were indirectly referenced in such manner.
2022-01-06 00:52:10 -07:00
Andrew Kelley
713d2a9b38 Sema: better code generated for struct literals
Add a variant of the `validate_struct_init` ZIR instruction:
`validate_struct_init_comptime` which is the same thing except it
indicates a comptime scope.

Sema code for this instruction now handles default struct field
values and detects when the struct initialization resulted in a
comptime value, replacing the already-emitted AIR instructions
to store each individual field with a single `store` instruction
with a comptime struct value as the operand.

In the case of a comptime scope, there is a simpler path that only
evals the implicit store instructions for default field values, avoiding
the mechanism for detecting comptime values.

This regressed one test case for the wasm backend, but it's just hitting
a different prong of `emitConstant` which currently has "TODO" in there,
so I think it's fine.
2022-01-04 23:49:49 -07:00
Andrew Kelley
1c24ef0d0b stage2: introduce std.builtin.CompilerBackend
This allows Zig code to perform conditional compilation based on a tag
by which a Zig compiler implementation identifies itself.

See the doc comment in this commit for more details.
2022-01-04 18:12:45 -07:00
Luuk de Gram
89b1fdc443
wasm: Implement memset, and sret arguments.
We now detect if the return type will be set by passing the first argument
as a pointer to stack memory from the callee's frame. This way, we do not have to
worry about stack memory being overwritten.

Besides this, we implement memset by either using wasm's memory.fill instruction when available,
or lower it manually. In the future we can lower this to a compiler_rt call.
2022-01-04 17:59:05 +01:00
Andrew Kelley
5b0be0d436
Merge pull request #10499 from paulsnar/paulsnar/stage1-packed-structs-cabi
stage1: Fix LLVM C ABI type resolution for small packed structs
2022-01-04 02:14:29 -05:00
Jakub Konka
a8ff51b092 stage2: turn several panics into codegen errors
Add x86_64 backend to behavior.zig test suite.
2022-01-04 02:06:18 +01:00
Jakub Konka
e9f069f536 stage2: implement isErr/isNonErr and unwrap error 2022-01-04 01:21:24 +01:00
Andrew Kelley
81fa31c054
Merge pull request #10451 from ziglang/cache-mode
stage2: introduce CacheMode
2022-01-03 16:50:29 -05:00
paulsnar
0736d30774
stage1: Add tests for packed structs in C ABI 2022-01-03 21:25:48 +02:00
Robin Voetter
67449b659d stage2: move some more tests 2022-01-03 02:09:54 +01:00
Andrew Kelley
b4d6e85a33 Sema: implement peer type resolution of signed and unsigned ints
This allows stage2 to build more of compiler-rt.

I also changed `-%` to `-` for comptime ints in the div and mul
implementations of compiler-rt. This is clearer code and also happens to
work around a bug in stage2.
2022-01-02 14:11:37 -07:00
joachimschmidt557
c710d5eefe stage2 ARM: implement wrap_errunion_err for empty payloads 2022-01-02 15:15:59 -05:00
Andrew Kelley
ae8d6fd7b7 behavior tests: add a "passing for arm backend" section 2022-01-01 14:00:02 -07:00
Andrew Kelley
98e84152bd
Merge pull request #10481 from Luukdegram/wasm-behavior-tests
Stage2: wasm - Implement more behavior tests
2022-01-01 15:41:26 -05:00
Jakub Konka
885d96735d
Merge pull request #10480 from joachimschmidt557/stage2-arm
stage2 ARM: zig test working
2022-01-01 17:02:31 +01:00
Luuk de Gram
3de111d993
wasm: Fix loading from pointers to support defer
Previously, the `load` instruction would just pass the pointer to the next instruction
for types that comply to `isByRef`. However, this meant that a defer would directly write
to the reference, rather than a copy. After this commit, we always copy the value.
2022-01-01 16:23:21 +01:00
Jakub Konka
557268a448 stage2: augment stage2 test to test optional payload lowering 2022-01-01 14:29:31 +01:00
Luuk de Gram
ad1b040996
wasm: Implement pointer arithmetic and refactoring:
- This implements all pointer arithmetic related instructions such as ptr_add, ptr_sub, ptr_elem_val
- We refactored the code, to use `isByRef` to ensure consistancy.
- Pointers will now be loaded correctly, rather then being passed around.
- The behaviour test for pointers is now passing.
2022-01-01 12:59:43 +01:00
Luuk de Gram
28cfc49c3e
wasm: Implement memCpy and get if behavior tests passing 2022-01-01 12:59:43 +01:00
Luuk de Gram
b9a0401e23
wasm: Implement @ptrToInt and fix indirect function call
- Previously the table index and function type index were switched.
This commit swaps them.
- This also emits the correct indirect function calls count when importing the function table
2022-01-01 12:59:43 +01:00
Luuk de Gram
f644c8b047
wasm: Implement array_to_slice and bug fixes:
- Add method to easily create local for virtual stack
- Ensure function pointers are passed correctly
- Correctly handle slices as return types and values
- Fix wrapping error sets/payloads.
- Handle ptr-like optionals correctly, by using address '0' as null.
- Implement `array_to_slice`
- linker: Always emit a table, so call_indirect inside bodies do not fail if there's no table.
TODO: Only do this when we emit a call_indirect but the relocation cannot be resolved.
2022-01-01 12:59:18 +01:00
Luuk de Gram
29164a31cc
wasm: Pass 'bugs' behavior tests 2022-01-01 12:58:59 +01:00
Luuk de Gram
726ce85c10
wasm: Fix storing error. Pass bool.zig behavior tests 2022-01-01 12:58:12 +01:00
joachimschmidt557
845531dde1
stage2 ARM: implement airUnwrapErrErr + airCmp for error sets 2022-01-01 11:16:38 +01:00
joachimschmidt557
f8163f7eaf
stage2 ARM: implement airCall for function pointers 2022-01-01 11:16:34 +01:00
Marian Beermann
55709de185 stage1: fix @errorName null termination 2022-01-01 10:28:47 +02:00
Jakub Konka
c7f774803a stage2: implement loading-storing via pointer (in register)
* load address (pointer) to a stack variable in a register via
  `lea` instruction
* store value on the stack via a pointer stored in a register via
  `mov [reg], imm` instruction
* the lowerings naturally are handled automatically by Mir -> Isel
  layer
* add initial (without safety) implementation of `.optional_payload`
* add matching stage2 test cases
2021-12-31 18:10:28 +01:00
Andrew Kelley
4645ec89f7
Merge pull request #10455 from joachimschmidt557/stage2-arm
stage2 ARM: basic slice + basic struct support
2021-12-30 15:25:36 -05:00
drew
2f53406ad8
CBE; implement airLoad and airStore for arrays (#10452)
Effectively a small continuation of #10152

This allows the for.zig behavior tests to pass. Unfortunately to fully test everything I had to move a lot of behavior tests from array.zig; most of them now pass (sorry @rainbowbismuth!)

I'm also conflicted on how I store constants into arrays because it's kind of stupid; array's can't be re-initialized using the same syntax, so instead of initializing each element, a new array is made which is copied into the destination. This also required that renderValue can't emit string literals for byte arrays given that they need to always have an extra byte for the NULL terminator, meaning that strings are no longer grep-able in the output.
2021-12-30 15:19:12 -05:00
joachimschmidt557
726ee671be stage2 x86_64: add regression test for #7187 2021-12-30 15:12:38 -05:00
joachimschmidt557
69d03d3a29
stage2 ARM: implement struct_field_ptr and struct_field_val 2021-12-30 14:39:06 +01:00
Jakub Konka
b7e2235973 stage2: lower 1-byte and 2-byte values saved to stack
* fix handling of `ah`, `bh`, `ch`, and `dh` registers (which are
  actually used as aliases to `dil`, etc. registers). Currenly, we
  treat them as aliases only meaning when we encounter `ah` we make
  sure to set the REX.W to promote the instruction to 64bits and use
  `dil` register instead - otherwise we might have mismatch between
  registers used in different parts of the codegen. In the future,
  we can and should use `ah`, etc. as upper 8bit halves of 16bit
  registers `ax`, etc.
* fix bug in `airCmp` where `.cmp` MIR instruction shouldn't force
  type `Bool` but let the type of the original type propagate downwards
  - we need this to make an informed choice of the target register
  size and hence choose the right encoding down the line.
* implement lowering of 1-byte and 2-byte values to stack and add
  matching stage2 tests for x86_64 codegen
2021-12-29 22:06:38 +01:00
Andrew Kelley
be5130ec53 compiler_rt: move more functions to the stage2 section
also move more already-passing behavior tests to the passing section.
2021-12-29 00:39:25 -07:00
Andrew Kelley
efb7148a45 Sema: more union fixes
* `Module.Union.getLayout`: fixes to support components of the union
   being 0 bits.
 * Implement `@typeInfo` for unions.
 * Add missing calls to `resolveTypeFields`.
 * Fix explicitly-provided union tag types passing a `Zir.Inst.Ref`
   where an `Air.Inst.Ref` was expected. We don't have any type safety
   for this; these typess are aliases.
 * Fix explicitly-provided `union(enum)` tag Values allocated to the
   wrong arena.
2021-12-28 23:22:09 -07:00
Andrew Kelley
91619cdf57 Sema: implement calling a fn ptr via a union field
Also, ignore `packed` on unions because that will be removed from the
language.
2021-12-28 23:22:09 -07:00