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Merge pull request #10455 from joachimschmidt557/stage2-arm
stage2 ARM: basic slice + basic struct support
This commit is contained in:
Andrew Kelley
GitHub
commit
4645ec89f7
@ -105,7 +105,7 @@ const MCValue = union(enum) {
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undef,
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/// A pointer-sized integer that fits in a register.
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/// If the type is a pointer, this is the pointer address in virtual address space.
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immediate: u64,
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immediate: u32,
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/// The constant was emitted into the code, at this offset.
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/// If the type is a pointer, it means the pointer address is embedded in the code.
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embedded_in_code: usize,
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@ -783,7 +783,7 @@ fn allocRegOrMem(self: *Self, inst: Air.Inst.Index, reg_ok: bool) !MCValue {
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pub fn spillInstruction(self: *Self, reg: Register, inst: Air.Inst.Index) !void {
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const stack_mcv = try self.allocRegOrMem(inst, false);
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log.debug("spilling {d} to stack mcv {any}", .{ inst, stack_mcv });
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log.debug("spilling {} (%{d}) to stack mcv {any}", .{ reg, inst, stack_mcv });
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const reg_mcv = self.getResolvedInstValue(inst);
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assert(reg == reg_mcv.register);
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const branch = &self.branch_stack.items[self.branch_stack.items.len - 1];
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@ -1202,7 +1202,6 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
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const bin_op = self.air.instructions.items(.data)[inst].bin_op;
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const result: MCValue = if (!is_volatile and self.liveness.isUnused(inst)) .dead else result: {
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const slice_mcv = try self.resolveInst(bin_op.lhs);
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const index_mcv = try self.resolveInst(bin_op.rhs);
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const slice_ty = self.air.typeOf(bin_op.lhs);
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const elem_ty = slice_ty.childType();
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@ -1261,14 +1260,14 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
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break :result MCValue{ .register = dst_reg };
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} else {
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// const dst_mcv = try self.allocRegOrMem(inst, false);
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return self.fail("TODO implement slice_elem_val for elem_size >= 4", .{});
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}
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const dst_mcv = try self.allocRegOrMem(inst, false);
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const addr_reg = try self.register_manager.allocReg(null, &.{ base_mcv.register, offset_mcv.register });
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_ = offset_mcv;
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_ = slice_mcv;
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_ = index_mcv;
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_ = offset_mcv;
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try self.genArmBinOpCode(addr_reg, base_mcv, offset_mcv, false, .add, .unsigned);
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try self.load(dst_mcv, .{ .register = addr_reg }, slice_ptr_field_type);
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break :result dst_mcv;
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}
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};
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return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none });
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}
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@ -1402,7 +1401,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
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},
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.stack_offset => |off| {
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if (elem_ty.abiSize(self.target.*) <= 4) {
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const tmp_reg = try self.register_manager.allocReg(null, &.{});
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const tmp_reg = try self.register_manager.allocReg(null, &.{reg});
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try self.load(.{ .register = tmp_reg }, ptr, ptr_ty);
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try self.genSetStack(elem_ty, off, MCValue{ .register = tmp_reg });
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} else if (elem_ty.abiSize(self.target.*) == 8) {
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@ -1413,7 +1412,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
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// larger
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const usize_ty = Type.initTag(.usize);
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const tmp_regs = try self.register_manager.allocRegs(2, .{ null, null }, &.{});
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const tmp_regs = try self.register_manager.allocRegs(2, .{ null, null }, &.{reg});
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_ = try self.addInst(.{
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.tag = .ldr,
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.cond = .al,
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@ -1435,7 +1434,46 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
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try self.genSetStack(usize_ty, off, MCValue{ .register = tmp_regs[0] });
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try self.genSetStack(usize_ty, off + 4, MCValue{ .register = tmp_regs[1] });
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} else {
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return self.fail("TODO implement memcpy", .{});
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// TODO optimize the register allocation
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const regs = try self.register_manager.allocRegs(4, .{ null, null, null, null }, &.{reg});
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const src_reg = reg;
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const dst_reg = regs[0];
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const len_reg = regs[1];
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const count_reg = regs[2];
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const tmp_reg = regs[3];
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// sub dst_reg, fp, #off
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const elem_size = @intCast(u32, elem_ty.abiSize(self.target.*));
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const adj_off = off + elem_size;
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const offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(adj_off)) |x| x else {
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return self.fail("TODO load: set reg to stack offset with all possible offsets", .{});
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};
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_ = try self.addInst(.{
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.tag = .sub,
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.cond = .al,
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.data = .{ .rr_op = .{
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.rd = dst_reg,
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.rn = .fp,
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.op = offset_op,
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} },
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});
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// mov len, #elem_size
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const len_op: Instruction.Operand = if (Instruction.Operand.fromU32(elem_size)) |x| x else {
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return self.fail("TODO load: set reg to elem_size with all possible sizes", .{});
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};
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_ = try self.addInst(.{
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.tag = .mov,
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.cond = .al,
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.data = .{ .rr_op = .{
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.rd = len_reg,
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.rn = .r0,
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.op = len_op,
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} },
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});
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// memcpy(src, dst, len)
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try self.genArmInlineMemcpy(src_reg, dst_reg, len_reg, count_reg, tmp_reg);
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}
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},
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else => return self.fail("TODO load from register into {}", .{dst_mcv}),
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@ -1553,28 +1591,54 @@ fn airStore(self: *Self, inst: Air.Inst.Index) !void {
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fn airStructFieldPtr(self: *Self, inst: Air.Inst.Index) !void {
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const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
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const extra = self.air.extraData(Air.StructField, ty_pl.payload).data;
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return self.structFieldPtr(extra.struct_operand, ty_pl.ty, extra.field_index);
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const result = try self.structFieldPtr(inst, extra.struct_operand, extra.field_index);
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return self.finishAir(inst, result, .{ extra.struct_operand, .none, .none });
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}
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fn airStructFieldPtrIndex(self: *Self, inst: Air.Inst.Index, index: u8) !void {
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const ty_op = self.air.instructions.items(.data)[inst].ty_op;
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return self.structFieldPtr(ty_op.operand, ty_op.ty, index);
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const result = try self.structFieldPtr(inst, ty_op.operand, index);
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return self.finishAir(inst, result, .{ ty_op.operand, .none, .none });
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}
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fn structFieldPtr(self: *Self, operand: Air.Inst.Ref, ty: Air.Inst.Ref, index: u32) !void {
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_ = self;
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_ = operand;
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_ = ty;
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_ = index;
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return self.fail("TODO implement codegen struct_field_ptr", .{});
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//return self.finishAir(inst, result, .{ extra.struct_ptr, .none, .none });
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fn structFieldPtr(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, index: u32) !MCValue {
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return if (self.liveness.isUnused(inst)) .dead else result: {
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const mcv = try self.resolveInst(operand);
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const struct_ty = self.air.typeOf(operand).childType();
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const struct_size = @intCast(u32, struct_ty.abiSize(self.target.*));
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const struct_field_offset = @intCast(u32, struct_ty.structFieldOffset(index, self.target.*));
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const struct_field_ty = struct_ty.structFieldType(index);
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const struct_field_size = @intCast(u32, struct_field_ty.abiSize(self.target.*));
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switch (mcv) {
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.ptr_stack_offset => |off| {
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break :result MCValue{ .ptr_stack_offset = off + struct_size - struct_field_offset - struct_field_size };
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},
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else => return self.fail("TODO implement codegen struct_field_ptr for {}", .{mcv}),
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}
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};
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}
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fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void {
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const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
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const extra = self.air.extraData(Air.StructField, ty_pl.payload).data;
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_ = extra;
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return self.fail("TODO implement codegen struct_field_val", .{});
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//return self.finishAir(inst, result, .{ extra.struct_ptr, .none, .none });
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const operand = extra.struct_operand;
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const index = extra.field_index;
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const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
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const mcv = try self.resolveInst(operand);
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const struct_ty = self.air.typeOf(operand);
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const struct_size = @intCast(u32, struct_ty.abiSize(self.target.*));
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const struct_field_offset = @intCast(u32, struct_ty.structFieldOffset(index, self.target.*));
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const struct_field_ty = struct_ty.structFieldType(index);
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const struct_field_size = @intCast(u32, struct_field_ty.abiSize(self.target.*));
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switch (mcv) {
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.stack_offset => |off| {
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break :result MCValue{ .stack_offset = off + struct_size - struct_field_offset - struct_field_size };
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},
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else => return self.fail("TODO implement codegen struct_field_val for {}", .{mcv}),
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}
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};
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return self.finishAir(inst, result, .{ extra.struct_operand, .none, .none });
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}
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fn armOperandShouldBeRegister(self: *Self, mcv: MCValue) !bool {
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@ -1947,11 +2011,11 @@ fn genArmMulConstant(self: *Self, inst: Air.Inst.Index, op: Air.Inst.Ref, op_ind
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// Allocate 1 or 2 registers
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if (lhs_is_register) {
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// Move RHS to register
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dst_mcv = MCValue{ .register = try self.register_manager.allocReg(inst, &.{mcv.register}) };
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dst_mcv = MCValue{ .register = try self.register_manager.allocReg(null, &.{mcv.register}) };
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rhs_mcv = dst_mcv;
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} else {
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// Move LHS and RHS to register
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const regs = try self.register_manager.allocRegs(2, .{ inst, null }, &.{});
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const regs = try self.register_manager.allocRegs(2, .{ null, null }, &.{});
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lhs_mcv = MCValue{ .register = regs[0] };
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rhs_mcv = MCValue{ .register = regs[1] };
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dst_mcv = lhs_mcv;
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@ -1976,6 +2040,87 @@ fn genArmMulConstant(self: *Self, inst: Air.Inst.Index, op: Air.Inst.Ref, op_ind
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return dst_mcv;
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}
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fn genArmInlineMemcpy(
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self: *Self,
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src: Register,
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dst: Register,
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len: Register,
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count: Register,
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tmp: Register,
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) !void {
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// mov count, #0
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_ = try self.addInst(.{
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.tag = .mov,
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.cond = .al,
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.data = .{ .rr_op = .{
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.rd = count,
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.rn = .r0,
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.op = Instruction.Operand.imm(0, 0),
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} },
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});
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// loop:
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// cmp count, len
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_ = try self.addInst(.{
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.tag = .cmp,
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.cond = .al,
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.data = .{ .rr_op = .{
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.rd = .r0,
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.rn = count,
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.op = Instruction.Operand.reg(len, Instruction.Operand.Shift.none),
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} },
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});
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// bge end
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_ = try self.addInst(.{
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.tag = .b,
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.cond = .ge,
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.data = .{ .inst = @intCast(u32, self.mir_instructions.len + 5) },
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});
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// ldrb tmp, [src, count]
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_ = try self.addInst(.{
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.tag = .ldrb,
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.cond = .al,
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.data = .{ .rr_offset = .{
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.rt = tmp,
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.rn = src,
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.offset = .{ .offset = Instruction.Offset.reg(count, 0) },
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} },
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});
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// strb tmp, [src, count]
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_ = try self.addInst(.{
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.tag = .strb,
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.cond = .al,
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.data = .{ .rr_offset = .{
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.rt = tmp,
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.rn = dst,
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.offset = .{ .offset = Instruction.Offset.reg(count, 0) },
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} },
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});
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// add count, count, #1
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_ = try self.addInst(.{
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.tag = .add,
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.cond = .al,
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.data = .{ .rr_op = .{
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.rd = count,
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.rn = count,
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.op = Instruction.Operand.imm(1, 0),
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} },
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});
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// b loop
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_ = try self.addInst(.{
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.tag = .b,
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.cond = .al,
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.data = .{ .inst = @intCast(u32, self.mir_instructions.len - 5) },
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});
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// end:
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}
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fn genArgDbgInfo(self: *Self, inst: Air.Inst.Index, mcv: MCValue) !void {
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const ty_str = self.air.instructions.items(.data)[inst].ty_str;
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const zir = &self.mod_fn.owner_decl.getFileScope().zir;
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@ -2282,16 +2427,22 @@ fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void {
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if (rhs_should_be_register) {
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if (!lhs_is_register and !rhs_is_register) {
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const regs = try self.register_manager.allocRegs(2, .{
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Air.refToIndex(bin_op.rhs).?, Air.refToIndex(bin_op.lhs).?,
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Air.refToIndex(bin_op.lhs).?, Air.refToIndex(bin_op.rhs).?,
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}, &.{});
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lhs_mcv = MCValue{ .register = regs[0] };
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rhs_mcv = MCValue{ .register = regs[1] };
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} else if (!rhs_is_register) {
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rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(bin_op.rhs).?, &.{}) };
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const track_inst = if (self.liveness.operandDies(inst, 1)) null else Air.refToIndex(bin_op.rhs).?;
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rhs_mcv = MCValue{ .register = try self.register_manager.allocReg(track_inst, &.{}) };
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} else if (!lhs_is_register) {
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const track_inst = if (self.liveness.operandDies(inst, 0)) null else Air.refToIndex(bin_op.lhs).?;
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lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(track_inst, &.{}) };
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}
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} else {
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if (!lhs_is_register) {
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const track_inst = if (self.liveness.operandDies(inst, 0)) null else Air.refToIndex(bin_op.lhs).?;
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lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(track_inst, &.{}) };
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}
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}
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if (!lhs_is_register) {
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lhs_mcv = MCValue{ .register = try self.register_manager.allocReg(Air.refToIndex(bin_op.lhs).?, &.{}) };
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}
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// Move the operands to the newly allocated registers
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@ -2921,7 +3072,6 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
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1 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaa }),
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2 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaa }),
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4 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaaaaaa }),
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8 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaaaaaaaaaaaaaa }),
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else => return self.fail("TODO implement memset", .{}),
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}
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},
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@ -2937,7 +3087,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
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return self.fail("TODO implement set stack variable from embedded_in_code", .{});
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},
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.register => |reg| {
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const abi_size = ty.abiSize(self.target.*);
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const abi_size = @intCast(u32, ty.abiSize(self.target.*));
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const adj_off = stack_offset + abi_size;
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switch (abi_size) {
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@ -3004,7 +3154,60 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
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const reg = try self.copyToTmpRegister(ty, mcv);
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return self.genSetStack(ty, stack_offset, MCValue{ .register = reg });
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} else {
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return self.fail("TODO implement memcpy", .{});
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// TODO optimize the register allocation
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const regs = try self.register_manager.allocRegs(5, .{ null, null, null, null, null }, &.{});
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const src_reg = regs[0];
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const dst_reg = regs[2];
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const len_reg = regs[2];
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const count_reg = regs[3];
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const tmp_reg = regs[4];
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// add src_reg, fp, #off
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const src_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(off)) |x| x else {
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return self.fail("TODO load: set reg to stack offset with all possible offsets", .{});
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};
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_ = try self.addInst(.{
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.tag = .add,
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.cond = .al,
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.data = .{ .rr_op = .{
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.rd = src_reg,
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.rn = .fp,
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.op = src_offset_op,
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} },
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});
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// sub dst_reg, fp, #stack_offset
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const adj_stack_offset = stack_offset + @intCast(u32, ty.abiSize(self.target.*));
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const dst_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(adj_stack_offset)) |x| x else {
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return self.fail("TODO load: set reg to stack offset with all possible offsets", .{});
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};
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_ = try self.addInst(.{
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.tag = .sub,
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.cond = .al,
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.data = .{ .rr_op = .{
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.rd = dst_reg,
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.rn = .fp,
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.op = dst_offset_op,
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} },
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});
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|
||||
// mov len, #elem_size
|
||||
const elem_size = @intCast(u32, ty.abiSize(self.target.*));
|
||||
const len_op: Instruction.Operand = if (Instruction.Operand.fromU32(elem_size)) |x| x else {
|
||||
return self.fail("TODO load: set reg to elem_size with all possible sizes", .{});
|
||||
};
|
||||
_ = try self.addInst(.{
|
||||
.tag = .mov,
|
||||
.cond = .al,
|
||||
.data = .{ .rr_op = .{
|
||||
.rd = len_reg,
|
||||
.rn = .r0,
|
||||
.op = len_op,
|
||||
} },
|
||||
});
|
||||
|
||||
// memcpy(src, dst, len)
|
||||
try self.genArmInlineMemcpy(src_reg, dst_reg, len_reg, count_reg, tmp_reg);
|
||||
}
|
||||
},
|
||||
}
|
||||
@ -3196,7 +3399,7 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
|
||||
.memory => |addr| {
|
||||
// The value is in memory at a hard-coded address.
|
||||
// If the type is a pointer, it means the pointer address is at this memory location.
|
||||
try self.genSetReg(ty, reg, .{ .immediate = addr });
|
||||
try self.genSetReg(ty, reg, .{ .immediate = @intCast(u32, addr) });
|
||||
_ = try self.addInst(.{
|
||||
.tag = .ldr,
|
||||
.cond = .al,
|
||||
@ -3209,7 +3412,7 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
|
||||
},
|
||||
.stack_offset => |unadjusted_off| {
|
||||
// TODO: maybe addressing from sp instead of fp
|
||||
const abi_size = ty.abiSize(self.target.*);
|
||||
const abi_size = @intCast(u32, ty.abiSize(self.target.*));
|
||||
const adj_off = unadjusted_off + abi_size;
|
||||
|
||||
switch (abi_size) {
|
||||
@ -3295,12 +3498,11 @@ fn genSetStackArgument(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) I
|
||||
1 => return self.genSetStackArgument(ty, stack_offset, .{ .immediate = 0xaa }),
|
||||
2 => return self.genSetStackArgument(ty, stack_offset, .{ .immediate = 0xaaaa }),
|
||||
4 => return self.genSetStackArgument(ty, stack_offset, .{ .immediate = 0xaaaaaaaa }),
|
||||
8 => return self.genSetStackArgument(ty, stack_offset, .{ .immediate = 0xaaaaaaaaaaaaaaaa }),
|
||||
else => return self.fail("TODO implement memset", .{}),
|
||||
}
|
||||
},
|
||||
.register => |reg| {
|
||||
const abi_size = ty.abiSize(self.target.*);
|
||||
const abi_size = @intCast(u32, ty.abiSize(self.target.*));
|
||||
const adj_off = stack_offset - abi_size;
|
||||
|
||||
switch (abi_size) {
|
||||
@ -3541,7 +3743,7 @@ fn genTypedValue(self: *Self, typed_value: TypedValue) InnerError!MCValue {
|
||||
}
|
||||
}
|
||||
if (typed_value.val.tag() == .int_u64) {
|
||||
return MCValue{ .immediate = typed_value.val.toUnsignedInt() };
|
||||
return MCValue{ .immediate = @intCast(u32, typed_value.val.toUnsignedInt()) };
|
||||
}
|
||||
return self.fail("TODO codegen more kinds of const pointers", .{});
|
||||
},
|
||||
@ -3551,7 +3753,7 @@ fn genTypedValue(self: *Self, typed_value: TypedValue) InnerError!MCValue {
|
||||
if (info.bits > ptr_bits or info.signedness == .signed) {
|
||||
return self.fail("TODO const int bigger than ptr and signed int", .{});
|
||||
}
|
||||
return MCValue{ .immediate = typed_value.val.toUnsignedInt() };
|
||||
return MCValue{ .immediate = @intCast(u32, typed_value.val.toUnsignedInt()) };
|
||||
},
|
||||
.Bool => {
|
||||
return MCValue{ .immediate = @boolToInt(typed_value.val.toBool()) };
|
||||
|
||||
@ -372,11 +372,32 @@ pub fn generateSymbol(
|
||||
return Result{ .appended = {} };
|
||||
},
|
||||
.Struct => {
|
||||
// TODO debug info
|
||||
// TODO padding of struct members
|
||||
const field_vals = typed_value.val.castTag(.@"struct").?.data;
|
||||
_ = field_vals; // TODO write the fields for real
|
||||
for (field_vals) |field_val, index| {
|
||||
const field_ty = typed_value.ty.structFieldType(index);
|
||||
if (!field_ty.hasCodeGenBits()) continue;
|
||||
switch (try generateSymbol(bin_file, src_loc, .{
|
||||
.ty = field_ty,
|
||||
.val = field_val,
|
||||
}, code, debug_output)) {
|
||||
.appended => {},
|
||||
.externally_managed => |external_slice| {
|
||||
code.appendSliceAssumeCapacity(external_slice);
|
||||
},
|
||||
.fail => |em| return Result{ .fail = em },
|
||||
}
|
||||
}
|
||||
|
||||
return Result{ .appended = {} };
|
||||
},
|
||||
.Union => {
|
||||
// TODO generateSymbol for unions
|
||||
const target = bin_file.options.target;
|
||||
const abi_size = try math.cast(usize, typed_value.ty.abiSize(target));
|
||||
try code.writer().writeByteNTimes(0xaa, abi_size);
|
||||
|
||||
return Result{ .appended = {} };
|
||||
},
|
||||
else => |t| {
|
||||
|
||||
@ -129,7 +129,7 @@ pub fn RegisterManager(
|
||||
comptime assert(count > 0 and count <= callee_preserved_regs.len);
|
||||
assert(count + exceptions.len <= callee_preserved_regs.len);
|
||||
|
||||
return self.tryAllocRegs(count, insts, exceptions) orelse blk: {
|
||||
const result = self.tryAllocRegs(count, insts, exceptions) orelse blk: {
|
||||
// We'll take over the first count registers. Spill
|
||||
// the instructions that were previously there to a
|
||||
// stack allocations.
|
||||
@ -164,6 +164,9 @@ pub fn RegisterManager(
|
||||
|
||||
break :blk regs;
|
||||
};
|
||||
|
||||
log.debug("allocated registers {any} for insts {any}", .{ result, insts });
|
||||
return result;
|
||||
}
|
||||
|
||||
/// Allocates a register and optionally tracks it with a
|
||||
@ -213,6 +216,7 @@ pub fn RegisterManager(
|
||||
/// Marks the specified register as free
|
||||
pub fn freeReg(self: *Self, reg: Register) void {
|
||||
const index = reg.allocIndex() orelse return;
|
||||
log.debug("freeing register {}", .{reg});
|
||||
|
||||
self.registers[index] = null;
|
||||
self.markRegFree(reg);
|
||||
|
||||
@ -658,4 +658,50 @@ pub fn addCases(ctx: *TestContext) !void {
|
||||
"",
|
||||
);
|
||||
}
|
||||
|
||||
{
|
||||
var case = ctx.exe("structs", linux_arm);
|
||||
case.addCompareOutput(
|
||||
\\var array = [_]SomeStruct{
|
||||
\\ .{ .a = 0, .b = 42, .c = 69 },
|
||||
\\ .{ .a = 1, .b = 2, .c = 3 },
|
||||
\\ .{ .a = 123, .b = 456, .c = 789 },
|
||||
\\};
|
||||
\\var s: []const SomeStruct = &array;
|
||||
\\
|
||||
\\var some_struct: SomeStruct = .{
|
||||
\\ .a = 0,
|
||||
\\ .b = 42,
|
||||
\\ .c = 69,
|
||||
\\};
|
||||
\\
|
||||
\\const SomeStruct = struct {
|
||||
\\ a: u32,
|
||||
\\ b: u32,
|
||||
\\ c: u32,
|
||||
\\};
|
||||
\\
|
||||
\\pub fn main() void {
|
||||
\\ assert(some_struct.a == 0);
|
||||
\\ assert(some_struct.b == 42);
|
||||
\\ assert(some_struct.c == 69);
|
||||
\\
|
||||
\\ assert(s[0].a == 0);
|
||||
\\ assert(s[0].b == 42);
|
||||
\\ assert(s[0].c == 69);
|
||||
\\ assert(s[1].a == 1);
|
||||
\\ assert(s[1].b == 2);
|
||||
\\ assert(s[1].c == 3);
|
||||
\\ assert(s[2].a == 123);
|
||||
\\ assert(s[2].b == 456);
|
||||
\\ assert(s[2].c == 789);
|
||||
\\}
|
||||
\\
|
||||
\\fn assert(ok: bool) void {
|
||||
\\ if (!ok) unreachable;
|
||||
\\}
|
||||
,
|
||||
"",
|
||||
);
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user