250 Commits

Author SHA1 Message Date
Andrew Kelley
f47cf93b47 stage2: C backend: fix ret AIR instruction
when operand has 0 runtime bits
2021-07-20 15:56:42 -07:00
Andrew Kelley
9c652cc650 stage2: C backend: implement support for switch_br AIR 2021-07-20 15:52:58 -07:00
Andrew Kelley
ea902ffe8f Sema: reimplement runtime switch
Now supports multiple items pointing to the same body. This is a common
pattern even when using a jump table, with multiple cases pointing to
the same block of code.

In the case of a range specified, the items are moved to branches in the
else body. A future improvement may make it possible to have jump table
items as well as ranges pointing to the same block of code.
2021-07-20 12:19:17 -07:00
Luuk de Gram
caa0de545e Resolve regressions
- Get correct types in wasm backend.
- `arg` is already a `Ref`, therefore simply use `@intToEnum`.
- Fix regression in `zirBoolBr, where the order of insertion was incorrect.
2021-07-20 12:19:17 -07:00
Luuk de Gram
1150fc13dc wasm: Resolve regressions, add intcast support 2021-07-20 12:19:16 -07:00
Andrew Kelley
95756299af stage2: fix compile errors in LLVM backend 2021-07-20 12:19:16 -07:00
Andrew Kelley
44fe9c52e1 stage2: wasm backend: update to latest naming convention 2021-07-20 12:19:16 -07:00
Andrew Kelley
934ebbe900 stage2: fix AIR not instruction (see prev commit) 2021-07-20 12:19:16 -07:00
Jacob G-W
414b144257 cbe: fix not (it is a ty_op, not un_op) 2021-07-20 12:19:16 -07:00
Andrew Kelley
4a0f38bb76 stage2: update LLVM backend to new AIR memory layout
Also fix compile errors when not using -Dskip-non-native
2021-07-20 12:19:16 -07:00
Andrew Kelley
761f36ff93 stage2: rework C backend for new AIR memory layout 2021-07-20 12:19:16 -07:00
Luuk de Gram
2438f61f1c Refactor entire wasm-backend to use new AIR memory layout 2021-07-20 12:19:16 -07:00
Luuk de Gram
424f260f85 Fix wasm-related compile errors:
- Update `fail()` to not require a `srcLoc`.
This brings it in line with other backends, and we were always passing 'node_offset = 0', anyway.
- Fix unused local due to change of architecture wrt function/decl generation.
- Replace all old instructions to indexes within the function signatures.
2021-07-20 12:19:16 -07:00
Andrew Kelley
c09b973ec2 stage2: compile error fixes for AIR memory layout branch
Now the branch is compiling again, provided that one uses
`-Dskip-non-native`, but many code paths are disabled. The code paths
can now be re-enabled one at a time and updated to conform to the new
AIR memory layout.
2021-07-20 12:19:16 -07:00
Andrew Kelley
0f38f68696 stage2: Air and Liveness are passed ephemerally
to the link infrastructure, instead of being stored with Module.Fn. This
moves towards a strategy to make more efficient use of memory by not
storing Air or Liveness data in the Fn struct, but computing it on
demand, immediately sending it to the backend, and then immediately
freeing it.

Backends which want to defer codegen until flush() such as SPIR-V
must move the Air/Liveness data upon `updateFunc` being called and keep
track of that data in the backend implementation itself.
2021-07-20 12:19:16 -07:00
Andrew Kelley
913393fd3b stage2: first pass over Module.zig for AIR memory layout 2021-07-20 12:19:16 -07:00
Andrew Kelley
ef7080aed1 stage2: update Liveness, SPIR-V for new AIR memory layout
also do the inline assembly instruction
2021-07-20 12:19:16 -07:00
Andrew Kelley
5d6f7b44c1 stage2: rework AIR memory layout
This commit changes the AIR file and the documentation of the memory
layout. The actual work of modifying the surrounding code (in Sema and
codegen) is not yet done.
2021-07-20 12:18:14 -07:00
Andrew Kelley
28dd9d478d C backend: TypedefMap is now ArrayHashMap
The C backend depends on insertion order into this map so that type
definitions will be declared before they are used.
2021-07-12 12:40:32 -07:00
jacob gw
34c21affa2 initial plan9 boilerplate
The code now compiles and fails with Plan9ObjectFormatUnimplemented
2021-07-08 14:10:49 -07:00
Andrew Kelley
9dbe684854 C backend: cleanups to wrapping int operations
* less branching by passing parameters in the main op code switch.
 * properly pass the target when asking the type system for int info.
 * handle u8, i16, etc when it is represented using
   int_unsigned/int_signed tag.
 * compile error instead of assertion failure for unimplemented cases
   (greater than 64 bits integer).
 * control flow cleanups
 * zig.h: expand macros into inline functions
 * reduce the complexity of the test case by making it one test case
   that calls multiple functions. Also fix the problem of c_int max
   value mismatch between host and target.
2021-07-08 11:21:06 -07:00
Matt Knight
fb16633ecb C backend: add/sub/mul wrapping for the C backend 2021-07-08 09:56:40 -07:00
Andrew Kelley
c2e66d9bab stage2: basic inferred error set support
* Inferred error sets are stored in the return Type of the function,
   owned by the Module.Fn. So it cleans up that memory in deinit().
 * Sema: update the inferred error set in zirRetErrValue
   - Update relevant code in wrapErrorUnion
 * C backend: improve some some instructions to take advantage of
   liveness analysis to avoid being emitted when unused.
 * C backend: when an error union has a payload type with no runtime
   bits, emit the error union as the same type as the error set.
2021-07-07 20:47:21 -07:00
Andrew Kelley
5c8bd443d9 stage2: fix if expressions on error unions
AstGen had the then-else logic backwards for if expressions
on error unions. This commit fixes it.

Turns out AstGen only really needs `is_non_null` and `is_non_err`,
and does not need the `is_null` or `is_err` variants. So I removed the
`is_null{,_ptr}` and `is_err{,_ptr}` ZIR instructions (-4) and
added `is_non_err`, `is_non_err_ptr` ZIR instructions (+2) for
a total of (-2) ZIR instructions, giving us a tiny bit more headroom
within the 256 tag limit. This required swapping the order of
then/else blocks in a handful of cases, but ultimately means the
ZIR will be in the same as source order, which is convenient
when debugging.

AIR code on the other hand, gains the `is_non_err` and `is_non_err_ptr`
instructions.

Sema: fix logic in zirErrUnionCode and zirErrUnionCodePtr returning the
wrong result type.
2021-07-07 19:50:56 -07:00
Andrew Kelley
13f04e3012 stage2: implement @panic and beginnigs of inferred error sets
* ZIR: add two instructions:
   - ret_err_value_code
   - ret_err_value
 * AstGen: add countDefers and utilize it to emit more efficient ZIR for
   return expressions in the presence of defers.
 * AstGen: implement |err| payloads for `errdefer` syntax.
   - There is not an "unused capture" error for it yet.
 * AstGen: `return error.Foo` syntax gets a hot path in return
   expressions, using the new ZIR instructions. This also is part of
   implementing inferred error sets, since we need to tell Sema to add
   an error value to the inferred error set before it gets coerced.
 * Sema: implement `@setCold`.
   - Implement `@setCold` support for C backend.
 * `@panic` and regular safety panics such as `unreachable` now properly
   invoke `std.builtin.panic`.
 * C backend: improve pointer and function value rendering.
 * C linker: fix redundant typedefs.
 * Add Type.error_set_inferred.
 * Fix Value.format for enum_literal, enum_field_index, bytes.
 * Remove the C backend test that checks for identical text

I measured a 14% reduction in Total ZIR Bytes from master branch
for std/os.zig.
2021-07-07 00:39:23 -07:00
Jakub Konka
0e15205521 Remove mention of lldMachO from the project
including:
* finding lldMachO in CMake config
* punting `ld64.lld` to LLD linker
* providing bindings to LLD linker
2021-06-29 23:38:19 +02:00
Andrew Kelley
150515f44d stage2: slightly improve error reporting for missing imports
There is now a distinction between `@import` with a .zig extension and
without. Without a .zig extension it assumes it is a package name, and
returns error.PackageNotFound if not mapped into the package table.
2021-06-23 10:44:46 -07:00
Andrew Kelley
06412e04f9 cleanups related to unused params 2021-06-21 17:03:04 -07:00
Jacob G-W
9fffffb07b fix code broken from previous commit 2021-06-21 17:03:03 -07:00
Jacob G-W
641ecc260f std, src, doc, test: remove unused variables 2021-06-21 17:03:03 -07:00
Jacob G-W
a95fdb0635 stage2: simplify codegen for errorToInt and intToError
We can just use bitcast instead of error_to_int, int_to_error since
errorToInt and intToError do not actually do anything, just change types.
This allows us to remove 2 air ops that were the exact same as bitcast
2021-06-21 18:45:28 +03:00
Veikka Tuominen
e63ff4f1c1 add ast-check flag to zig fmt, fix found bugs 2021-06-14 00:16:40 +03:00
Andrew Kelley
138afd5cbf zig fmt 2021-06-10 20:13:43 -07:00
Martin Wickham
fc9430f567 Breaking hash map changes for 0.8.0
- hash/eql functions moved into a Context object
- *Context functions pass an explicit context
- *Adapted functions pass specialized keys and contexts
- new getPtr() function returns a pointer to value
- remove functions renamed to fetchRemove
- new remove functions return bool
- removeAssertDiscard deleted, use assert(remove(...)) instead
- Keys and values are stored in separate arrays
- Entry is now {*K, *V}, the new KV is {K, V}
- BufSet/BufMap functions renamed to match other set/map types
- fixed iterating-while-modifying bug in src/link/C.zig
2021-06-03 17:02:16 -05:00
Luuk de Gram
5cbe930e36
wasm: Add stage2 tests for error unions 2021-05-28 12:58:17 +02:00
Luuk de Gram
8a81dfc999
wasm: Reverse the order of error and payload
This will set us up to correctly retrieve the error local index and payload index
depending on that of the multi_value's index. As from now, the error will always use
the multi_value's index, and the payload will use the following locals.
2021-05-28 12:58:17 +02:00
Luuk de Gram
967a299c34
wasm: Add support for error union as return type
- This currently uses the multi-value feature to return both the possible error, and its payload.
- Also genAlloc and the logic to allocate the locals itself have been seperated, so we can create more locals
whenever needed, and not only when `genAlloc` is called.
2021-05-28 12:58:17 +02:00
Luuk de Gram
5481059232
wasm: Implement error unions and unwrapping
- Slightly refactored `Wvalue.multi_value` to also contain the amount of locals it contains,
this allows us to set all fields at once.
2021-05-28 12:58:17 +02:00
Luuk de Gram
a5b5a5532e
wasm: Support error sets 2021-05-28 12:58:17 +02:00
joachimschmidt557
e8236551ab stage2: Move BlockData out of ir.Inst.Block 2021-05-22 21:15:25 -04:00
Andrew Kelley
63aabbbba7
Merge pull request #8852 from Snektron/spirv
SPIR-V: More codegen
2021-05-22 18:20:20 -04:00
Andrew Kelley
79dee75b1c stage2: rename ir.zig to air.zig
We've settled on the nomenclature for the artifacts the compiler
pipeline produces:

1. Tokens
2. AST (Abstract Syntax Tree)
3. ZIR (Zig Intermediate Representation)
4. AIR (Analyzed Intermediate Representation)
5. Machine Code

Renaming `ir` identifiers to `air` will come with the inevitable
air-memory-layout branch that I plan to start after the 0.8.0 release.
2021-05-22 14:29:16 -07:00
Robin Voetter
cba97e4773 SPIR-V: Make functions which always return a null result return void instead 2021-05-22 16:11:56 +02:00
Robin Voetter
228f71fa0c SPIR-V: Generate locals at the start of a function 2021-05-22 16:11:56 +02:00
Robin Voetter
6634abfd26 SPIR-V: Debug line info/source info 2021-05-22 16:11:56 +02:00
Robin Voetter
e3be1a1e88 SPIR-V: DeclGen constructor/destructor 2021-05-22 16:11:56 +02:00
Robin Voetter
46184ab85e SPIR-V: branching 2021-05-22 16:11:56 +02:00
Robin Voetter
5edc5f9730 SPIR-V: Pass source location to genType and genConstant for better error reporting 2021-05-22 16:11:56 +02:00
Robin Voetter
63d0576f1c SPIR-V: Preliminary alloc/store/load generation 2021-05-22 16:11:56 +02:00
Robin Voetter
6a121d9ccd SPIR-V: Split out genCmp from genBinOp 2021-05-22 16:11:56 +02:00