122 Commits

Author SHA1 Message Date
Isaac Freund
175463d75d
AstGen: implement @prefetch() builtin 2021-12-10 23:09:02 +01:00
Lee Cannon
85de022c56
allocgate: std Allocator interface refactor 2021-11-30 23:32:47 +00:00
Andrew Kelley
902df103c6 std lib API deprecations for the upcoming 0.9.0 release
See #3811
2021-11-30 00:13:07 -07:00
Andrew Kelley
e08b6149ab Sema: fix alignment of type-inferred locals 2021-11-22 20:30:20 -07:00
Andrew Kelley
6afcaf4a08 stage2: fix the build for 32-bit architectures
* Introduce a mechanism into Sema for emitting a compile error when an
   integer is too big and we need it to fit into a usize.
 * Add `@intCast` where necessary
 * link/MachO: fix an unnecessary allocation when all that was happening
   was appending zeroes to an ArrayList.
 * Add `error.Overflow` as a possible error to some codepaths, allowing
   usage of `math.intCast`.

closes #9710
2021-11-21 19:43:08 -07:00
Andrew Kelley
09588c795c stage2: LLVM backend: memset to 0xaa for undefined stores
Also support `one` and `int_big_positive` tags for const pointers.
2021-11-16 17:46:39 -07:00
Zen1th
0d7359ca9b
stage2: Implement Sema.floatToInt (#10097) 2021-11-09 18:52:30 -05:00
Andrew Kelley
d6067db062 stage2: implement @popCount for non-vectors 2021-10-29 17:49:02 -07:00
Andrew Kelley
c6b3d06535 Sema: improved C pointers and casting
* C pointer types always have allowzero set to true but they omit the
   word allowzero when printed.
 * Implement coercion from C pointers to other pointers.
 * Implement in-memory coercion for slices and pointer-like optionals.
 * Make slicing a C pointer drop the allowzero bit.
 * Value representation for pointer-like optionals is now allowed to use
   pointer tag values in addition to the `opt_payload` tag.
2021-10-26 13:46:27 -07:00
Andrew Kelley
ce65ca4345 stage2: refactor coercePeerTypes and fix C ptr cmp with null 2021-10-24 12:07:14 -07:00
Andrew Kelley
94879506ea
Merge pull request #10017 from Snektron/big-int-div
Big ints: division fixes
2021-10-23 22:49:33 -04:00
Andrew Kelley
22b4c9e1a9 stage2: implement more C pointer Sema and comptime ptr arith 2021-10-23 19:47:32 -07:00
Robin Voetter
c563521d44 big ints: tighten some more division memory requirements 2021-10-24 02:56:48 +02:00
Robin Voetter
87b7b31557 big ints: improve division 2021-10-24 01:21:33 +02:00
Andrew Kelley
069c83d58c stage2: change @bitCast to always be by-value
After a discussion about language specs, this seems like the best way to
go, because it's simpler to reason about both for humans and compilers.

The `bitcast_result_ptr` ZIR instruction is no longer needed.

This commit also implements writing enums, arrays, and vectors to
virtual memory at compile-time.

This unlocked some more of compiler-rt being able to build, which
in turn unlocks saturating arithmetic behavior tests.

There was also a memory leak in the comptime closure system which is now
fixed.
2021-10-22 15:35:35 -07:00
Andrew Kelley
0a6851cc6d stage2: implement comptime loads through casted pointers 2021-10-21 22:56:11 -07:00
Andrew Kelley
1bce0ed046 stage2: fix Value.copy not copying arrays 2021-10-21 20:28:32 -07:00
Andrew Kelley
7f70c27e9d stage2: more division support
AIR:
 * div is renamed to div_trunc.
 * Add div_float, div_floor, div_exact.
   - Implemented in Sema and LLVM codegen. C backend has a stub.

Improvements to std.math.big.Int:
 * Add `eqZero` function to `Mutable`.
 * Fix incorrect results for `divFloor`.

Compiler-rt:
 * Add muloti4 to the stage2 section.
2021-10-21 19:05:26 -07:00
Robin Voetter
09c7d5aebc stage2: elemPtr for slices
* Restructure elemPtr a bit
* New AIR instruction: slice_elem_ptr, which returns a pointer to an element of a slice
* Value: adapt elemPtr to work on slices
2021-10-21 16:24:18 +02:00
Andrew Kelley
a0e195120d stage2: implement slicing
* New AIR instruction: slice, which constructs a slice out of a pointer
   and a length.
 * AstGen: use `coerced_ty` for start and end expressions, use `none`
   for the sentinel, and don't try to load the result of the slice
   operation because it returns a by-value result.
 * Sema: pointer arithmetic is extracted into analyzePointerArithmetic
   and it is used by the implementation of slice.
   - Also I implemented comptime pointer addition.
 * Sema: extract logic into analyzeSlicePtr, analyzeSliceLen and use them
   inside the slice semantic analysis.
   - The approach in stage2 is much cleaner than stage1 because it uses
     more granular analysis calls for obtaining the slice pointer, doing
     arithmetic on it, and checking if the length is comptime-known.
 * Sema: use the slice Value Tag for slices when doing coercion from
   pointer-to-array.
 * LLVM backend: detect when emitting a GEP instruction into a
   pointer-to-array and add the extra index that is required.
 * Type: ptrAlignment for c_void returns 0.
 * Implement Value.hash and Value.eql for slices.
 * Remove accidentally duplicated behavior test.
2021-10-20 21:45:11 -07:00
Andrew Kelley
c8ded2f9c9 stage2: implement big int to float conversion 2021-10-20 16:41:08 -07:00
Andrew Kelley
dfb3231959 stage2: implement switching on unions
* AstGen: Move `refToIndex` and `indexToRef` to Zir
 * ZIR: the switch_block_*_* instruction tags are collapsed into one
   switch_block tag which uses 4 bits for flags, and reduces the
   scalar_cases_len field from 32 to 28 bits.
   This freed up more ZIR tags, 2 of which are now used for
   `switch_cond` and `switch_cond_ref` for producing the switch
   condition value. For example, for union values it returns the
   corresponding enum value.
 * switching with multiple cases and ranges is not yet supported because
   I want to change the ZIR encoding to store index pointers into the
   extra array rather than storing prong indexes. This will avoid O(N^2)
   iteration over prongs.
 * AstGen now adds a `switch_cond` on the operand and then passes the
   result of that to the `switch_block` instruction.
 * Sema: partially implement `switch_capture_*` instructions.
 * Sema: `unionToTag` notices if the enum type has only one possible value.
2021-10-19 20:22:47 -07:00
Robin Voetter
7b97f6792f stage2: add Value.the_only_possible_value 2021-10-20 03:44:02 +02:00
Andrew Kelley
40cbf525f7 stage2: implement coercion from null to C pointer 2021-10-17 19:10:49 -07:00
Robin Voetter
9336a87452 stage2: bitNot 2021-10-17 20:33:04 +02:00
Robin Voetter
f6bf24b2f3 stage2: comptime saturating shl 2021-10-16 11:32:05 +02:00
Andrew Kelley
682cdeceaa stage2: optional comparison and 0-bit payloads
* Sema: implement peer type resolution for optionals and null.
 * Rename `Module.optionalType` to `Type.optional`.
 * LLVM backend: re-use anonymous values. This is especially useful when
   isByRef()=true because it means re-using the same generated LLVM globals.
 * LLVM backend: rework the implementation of is_null and is_non_null
   AIR instructions. Generate slightly better LLVM code, and also fix
   the behavior for optionals whose payload type is 0-bit.
 * LLVM backend: improve `cmp` AIR instruction lowering to support
   pointer-like optionals.
 * `Value`: implement support for equality-checking optionals.
2021-10-15 18:37:09 -07:00
Andrew Kelley
55eea3b045 stage2: implement @minimum and @maximum, including vectors
* std.os: take advantage of `@minimum`. It's probably time to
   deprecate `std.min` and `std.max`.
 * New AIR instructions: min and max
 * Introduce SIMD vector support to stage2
 * Add `@Type` support for vectors
 * Sema: add `checkSimdBinOp` which can be re-used for other arithmatic
   operators that want to support vectors.
 * Implement coercion from vectors to arrays.
   - In backends this is handled with bitcast for vector to array,
     however maybe we want to reduce the amount of branching by
     introducing an explicit AIR instruction for it in the future.
 * LLVM backend: implement lowering vector types
 * Sema: Implement `slice.ptr` at comptime
 * Value: improve `numberMin` and `numberMax` to support floats in
   addition to integers, and make them behave properly in the presence
   of NaN.
2021-10-14 21:17:30 -07:00
Andrew Kelley
0d4a94f32f stage2: improve handling of 0-bit types and arrays
* Make `alloc` AIR instructions call `resolveTypeLayout`.
 * `Sema.zirResolveInferredAlloc` now calls `requireRuntimeBlock` in the
   case that it operates on a non-comptime instruction.
 * `Type.abiSize` and `Type.abiAlignment` now return 0 for `void`
 * Sema: implement `resolveTypeFields` for unions.
 * LLVM Backend: support `ptr_elem_ptr` when the element type is 0-bit.
 * Type: improve `abiAlignment` implementation for structs to properly
   handle fields with non-default alignment.
 * Value: implement hashing array, vector, and structs.
2021-10-13 21:20:38 -07:00
Andrew Kelley
da7fcfd158 stage2: implement Sema for elemVal for comptime slice 2021-10-13 16:31:07 -07:00
Andrew Kelley
a3104a4a78 stage2: fix comptime stores and sentinel-terminated arrays
* ZIR: the `array_type_sentinel` now has a source node attached to it
   for proper error reporting.
 * Refactor: move `Module.arrayType` to `Type.array`
 * Value: the `bytes` and `array` tags now include the sentinel, if the
   type has one. This simplifies comptime evaluation logic.
 * Sema: fix `zirStructInitEmpty` to properly handle when the type is
   void or a sentinel-terminated array. This handles the syntax `void{}`
   and `[0:X]T{}`.
 * Sema: fix the logic for reporting "cannot store runtime value in
   compile time variable" as well as for emitting a runtime store when a
   pointer value is comptime known but it is a global variable.
 * Sema: implement elemVal for double pointer to array. This can happen
   with this code for example: `var a: *[1]u8 = undefined; _ = a[0];`
 * Sema: Rework the `storePtrVal` function to properly handle nested
   structs and arrays.
   - Also it now handles comptime stores through a bitcasted pointer.
     When the pointer element type and the type according to the Decl
     don't match, the element value is bitcasted before storage.
2021-10-12 21:38:46 -07:00
Andrew Kelley
e16ddad49f stage2: enum fixes
* Sema: fix a missing copy on enum tag values
 * LLVM backend: fix lowering of enum constant values for enums with
   specified tag values.
 * Value: fix enumToInt for `enum_numbered` cases.

The float widening behavior tests which rely on compiler-rt symbols are
now passing.
2021-10-05 23:05:14 -07:00
Andrew Kelley
78902db68b stage2: fix comptime @bitCast
Before, Sema for comptime `@bitCast` would return the same Value but
change the Type. This gave invalid results because, for example, an
integer Value when the Type is a float would be interpreted numerically,
but `@bitCast` needs it to reinterpret how they would be stored in
memory.

This requires a mechanism to serialize a Value to a byte buffer and
deserialize a Value from a byte buffer.

Not done yet, but needs to happen: comptime dereferencing a pointer
to a Decl needs to perform a comptime bitcast on the loaded value.
Currently the value is silently wrong in the same way that `@bitCast`
was silently wrong before this commit.

The logic in Value for handling readFromMemory for large integers is
only correct for small integers. It needs to be fleshed out for proper
big integers.

As part of this change:
 * std.math.big.Int: initial implementations of readTwosComplement and
   writeTwosComplement. They only support bit_count <= 128 so far and
   panic otherwise.
 * compiler-rt: move the compareXf2 exports over to the stage2 section.
   Even with the improvements in this commit, I'm still seeing test
   failures in the widening behavior tests; more investigation is
   needed.
2021-10-04 23:30:04 -07:00
Robin Voetter
3dc47b8161 Apply new big int wrap/saturate to Value.zig 2021-10-04 11:25:29 +02:00
Robin Voetter
8701d8579d Adapt Value.intAddSat and intSubSat to new big int saturating functions 2021-10-04 11:25:29 +02:00
Robin Voetter
69be6ba8ee Comptime wrapping addition/subtraction 2021-10-04 11:25:29 +02:00
Robin Voetter
a733692444 Update Value.intTrunc to use new big int truncate 2021-10-04 11:25:29 +02:00
Martin Wickham
8d42500699 Implement hashing and equals for some pointer values 2021-10-02 15:21:48 -05:00
Andrew Kelley
33e77f127d stage2: implement @clz and @ctz
Also improve the LLVM backend to support lowering bigints to LLVM
values.

Moves over a bunch of math.zig test cases to the "passing for stage2"
section.
2021-09-28 22:38:51 -07:00
Andrew Kelley
51a40f9a66 saturating arithmetic supports integers only 2021-09-28 20:27:28 -07:00
Andrew Kelley
5467582444 saturating arithmetic modifications
* Remove the builtins `@addWithSaturation`, `@subWithSaturation`,
   `@mulWithSaturation`, and `@shlWithSaturation` now that we have
   first-class syntax for saturating arithmetic.
 * langref: Clarify the behavior of `@shlExact`.
 * Ast: rename `bit_shift_left` to `shl` and `bit_shift_right` to `shr`
   for consistency.
 * Air: rename to include underscore separator with consistency with
   the rest of the ops.
 * Air: add shl_exact instruction
 * Use non-extended tags for saturating arithmetic, to keep it
   simple so that all the arithmetic operations can be done the same
   way.
   - Sema: unify analyzeArithmetic with analyzeSatArithmetic
     - implement comptime `+|`, `-|`, and `*|`
     - allow float operands to saturating arithmetic
 * `<<|` allows any integer type for the RHS.
 * C backend: fix rebase conflicts
 * LLVM backend: reduce the amount of branching for arithmetic ops
 * zig.h: fix magic number not matching actual size of C integer types
2021-09-28 19:19:28 -07:00
Andrew Kelley
79bc5891c1 stage2: more arithmetic support
* AIR: add `mod` instruction for modulus division
   - Implement for LLVM backend
 * Sema: implement `@mod`, `@rem`, and `%`.
 * Sema: fix comptime switch evaluation
 * Sema: implement comptime shift left
 * Sema: fix the logic inside analyzeArithmetic to handle all the
   nuances between the different mathematical operations.
   - Implement comptime wrapping operations
2021-09-28 16:12:24 -07:00
Martin Wickham
1cc5d4e758
Stage 2: Support inst.func() syntax (#9827)
* Merge call zir instructions to make space for field_call
* Fix bug with comptime known anytype args
* Delete the param_type zir instruction
* Move some passing tests to stage 2
* Implement a.b() function calls
* Add field_call_bind support for call and field builtins
2021-09-28 12:00:35 -05:00
Andrew Kelley
09e1f37cb6 stage2: implement union coercion to its own tag
* AIR: add `get_union_tag` instruction
   - implement in LLVM backend
 * Sema: implement == and != for union and enum literal
   - Also implement coercion from union to its own tag type
 * Value: implement hashing for union values

The motivating example is this snippet:

    comptime assert(@typeInfo(T) == .Float);

This was the next blocker for stage2 building compiler-rt.
Now it is switch at compile-time on an integer.
2021-09-27 23:11:00 -07:00
Andrew Kelley
aecebf38ac stage2: progress towards ability to compile compiler-rt
* prepare compiler-rt to support being compiled by stage2
   - put in a few minor workarounds that will be removed later, such as
     using `builtin.stage2_arch` rather than `builtin.cpu.arch`.
   - only try to export a few symbols for now - we'll move more symbols
     over to the "working in stage2" section as they become functional
     and gain test coverage.
   - use `inline fn` at function declarations rather than `@call` with an
     always_inline modifier at the callsites, to avoid depending on the
     anonymous array literal syntax language feature (for now).
 * AIR: replace floatcast instruction with fptrunc and fpext for
   shortening and widening floating point values, respectively.
 * Introduce a new ZIR instruction, `export_value`, which implements
   `@export` for the case when the thing to be exported is a local
   comptime value that points to a function.
   - AstGen: fix `@export` not properly reporting ambiguous decl
     references.
 * Sema: handle ExportOptions linkage. The value is now available to all
   backends.
   - Implement setting global linkage as appropriate in the LLVM
     backend. I did not yet inspect the LLVM IR, so this still needs to
     be audited. There is already a pending task to make sure the alias
     stuff is working as intended, and this is related.
   - Sema almost handles section, just a tiny bit more code is needed in
     `resolveExportOptions`.
 * Sema: implement float widening and shortening for both `@floatCast`
   and float coercion.
   - Implement the LLVM backend code for this as well.
2021-09-21 23:21:07 -07:00
Andrew Kelley
be71195bba stage2: enable f16 math
There was panic that said TODO add __trunctfhf2 to compiler-rt, but I
checked and that function has been in compiler-rt since April.
2021-09-21 23:21:07 -07:00
Andrew Kelley
f8b914fcf3 Merge branch 'address-space' of Snektron/zig into Snektron-address-space
There were two things to resolve here:
 * Snektron's branch edited Zir printing, but in master branch
   I moved the printing code from Zir.zig to print_zir.zig. So that
   just had to be moved over.
 * In master branch I fleshed out coerceInMemory a bit more, which
   caused one of Snektron's test cases to fail, so I had to add
   addrspace awareness to that. Once I did that the tests passed again.
2021-09-20 17:32:52 -07:00
Andrew Kelley
4b2d7a9c67 stage2: implement comptime bitwise nand 2021-09-20 15:44:09 -07:00
Andrew Kelley
b9d3527e0e stage2: implement comptime @atomicRmw
* introduce float_to_int and int_to_float AIR instructionts and
   implement for the LLVM backend and C backend.
 * Sema: implement `zirIntToFloat`.
 * Sema: implement `@atomicRmw` comptime evaluation
   - introduce `storePtrVal` for when one needs to store a Value to a
     pointer which is a Value, and assert it happens at comptime.
 * Value: introduce new functionality:
   - intToFloat
   - numberAddWrap
   - numberSubWrap
   - numberMax
   - numberMin
   - bitwiseAnd
   - bitwiseNand (not implemented yet)
   - bitwiseOr
   - bitwiseXor
 * Sema: hook up `zirBitwise` to the new Value bitwise implementations
 * Type: rename `isFloat` to `isRuntimeFloat` because it returns `false`
   for `comptime_float`.
2021-09-20 14:24:43 -07:00
Robin Voetter
7da9fa6fe2 Address spaces: AstGen
Adds AST generation for address spaces on pointers, function prototypes,
function declarations and variable declarations. In the latter two cases,
declaration properties were already stored more efficiently in a declaration
structure. To accomodate these for address spaces, the bit indicating presence
of a linksection attribute has been extended to include either linksection,
address space, or both.
2021-09-20 02:29:03 +02:00