481 Commits

Author SHA1 Message Date
Andrew Kelley
98b932cfab fix merge conflicts 2022-03-22 20:17:43 -07:00
joachimschmidt557
be1cca3416 stage2 ARM: implement comparison of optional pointers 2022-03-22 20:16:05 -07:00
joachimschmidt557
95e166b2e1 stage2 ARM: implement min, max for integers <= 32 bits 2022-03-22 20:16:05 -07:00
joachimschmidt557
62529a291b stage2 ARM: More support for error unions 2022-03-22 20:16:05 -07:00
joachimschmidt557
a4e8294c91 stage2 ARM: change semantics of MCValue.stack_argument_offset
MCValue.stack_argument_offset now has the same semantics as
MCValue.stack_offset
2022-03-22 20:16:05 -07:00
joachimschmidt557
6ac04d8fd7 stage2 ARM: change semantics of MCValue.stack_offset
A stack_offset will now denote the exact offset applied to the start
of the stack frame (=fp when frame pointer is emitted)
2022-03-22 20:16:05 -07:00
Andrew Kelley
593130ce0a stage2: lazy @alignOf
Add a `target` parameter to every function that deals with Type and
Value.
2022-03-22 15:45:58 -07:00
Luuk de Gram
be579d4797 wasm: Implement @popCount 2022-03-21 22:01:34 -04:00
William Sengir
0f48307041 stage2: add AIR instruction cmp_vector
The existing `cmp_*` instructions get their result type from `lhs`, but
vector comparison will always return a vector of bools with only the
length derived from its operands. This necessitates the creation of a
new AIR instruction.
2022-03-21 16:54:19 -07:00
Jakub Konka
d71bd0300b
Merge pull request #11195 from mparadinha/float-to-int
stage2: x86_64: implement `@floatToInt` for `f32` and `f64`
2022-03-21 23:54:36 +01:00
Jakub Konka
a9b6de693c
Merge pull request #11223 from mparadinha/ptr-elem-val
stage2: x86_64: implement `ptr_elem_val`
2022-03-21 23:54:17 +01:00
Jakub Konka
00e2113c8b x64: refactor fix reg aliasing in genSetReg 2022-03-21 23:38:01 +01:00
Andrew Kelley
916a65cb7b
Merge pull request #11224 from koachan/sparc64-codegen
stage2 sparcv9: Add instruction encoder and placeholder codegen impl
2022-03-21 18:21:31 -04:00
mparadinha
35eaaed7c4 stage2: x86_64: use correct register size when loading things from memory 2022-03-21 19:32:46 +00:00
mparadinha
6d7808e647 stage2: x86_64: implement ptr_elem_val
The codegen for this is almost identical to `ptr_elem_ptr` except
there's an extra `mov` at the end to replace the pointer with the
value it points to, "in-place" (which can be done in a single
instruction without any extra registers).
2022-03-21 19:32:46 +00:00
Andrew Kelley
18a43b61f9
Merge pull request #11253 from Vexu/pretty-print-values
stage2: print values with types
2022-03-21 15:15:38 -04:00
Veikka Tuominen
a31fe0ff12 stage2: add way to print values with types 2022-03-21 15:03:42 +02:00
Joachim Schmidt
b48d8cce52
Merge pull request #11235 from joachimschmidt557/stage2-riscv
stage2 RISCV64: remove MCValue.embedded_in_code
2022-03-21 12:36:47 +01:00
Andrew Kelley
0576086395 stage2: remove Value.Tag.abi_align_default
and make Decl alignment & linksection, and struct & union field alignment
be scalar values, not Value values.

YAGNI
2022-03-20 00:36:44 -07:00
Andrew Kelley
1bd595ceea
Merge pull request #11233 from Luukdegram/wasm-tests
stage2: wasm - union_init and passing tests
2022-03-19 19:41:55 -04:00
Luuk de Gram
56590218c5
wasm: All union/tuple/array tests passing
This implements improvements/fixes to get all the union, tuple, and array behavior tests passing.
Previously, we lowered parent pointers for field_ptr and element_ptr incompletely. This has now
been improved to recursively lower such pointer.

Also a fix was done to `generateSymbol` when checking a container's layout.
Previously it was assumed to always be a struct. However, the type can also be a tuple, and therefore
panicking. Updating to ask a type's container layout instead allows us to keep a singular branch for both cases.
2022-03-19 20:56:04 +01:00
Luuk de Gram
2041176c5e
wasm: Implement union_init instruction
Implements the `@unionInit` builtin instruction.
2022-03-19 20:56:03 +01:00
joachimschmidt557
a153732d5a
stage2 RISCV64: implement add, sub for registers 2022-03-19 20:44:57 +01:00
joachimschmidt557
7cdc47a4e0
stage2 RISCV64: implement move register to register 2022-03-19 19:48:27 +01:00
joachimschmidt557
956d9f4ce0
stage2 RISCV64: remove MCValue.embedded_in_code 2022-03-19 10:52:59 +01:00
Veikka Tuominen
a8520fbd0f stage2: add dbg_block_{begin,end} instruction 2022-03-19 11:20:38 +02:00
Koakuma
731dda18dd stage2 sparcv9: zig fmt 2022-03-19 09:06:58 +07:00
Koakuma
59680b40a1 stage2 sparcv9: Fix unused parameter errors in Codegen 2022-03-19 06:58:50 +07:00
Koakuma
93b16de4b4 stage2 sparcv9: Add placeholder files and generate() function
Add placeholder files for Codegen, Emit, and Mir stages, complete with
a placeholder implementation of generate() to make it able to be plugged in
to the frontend. At the moment the implementation just panics, it'll be
worked on incrementally later.

Also, this registers the sparcv9 backend files into CMakeLists.txt.
2022-03-19 06:09:46 +07:00
Jakub Konka
338bf55e84
Merge pull request #11216 from joachimschmidt557/stage2-arm
stage2 ARM: remove MCValue.embedded_in_code
2022-03-18 20:02:33 +01:00
joachimschmidt557
13321c8070 stage2 regalloc: fix tryAllocRegs for specific situations
Previously, tryAllocRegs did not take frozen registers into account
when checking if enough registers are available.
2022-03-18 19:37:01 +01:00
joachimschmidt557
c32e2c4d3c
stage2 ARM: remove MCValue.embedded_in_code 2022-03-18 12:19:22 +01:00
joachimschmidt557
3ecba7d7a2
stage2 ARM: implement slice_elem_ptr, ptr_elem_ptr 2022-03-18 12:12:14 +01:00
Andrew Kelley
76b382072a
Merge pull request #11200 from Luukdegram/wasm-memcpy
stage2: wasm - Implement memcpy instruction
2022-03-17 18:25:15 -07:00
Andrew Kelley
7233a3324a stage2: implement @reduce
Notably, Value.eql and Value.hash are improved to treat NaN as equal to
itself, so that Type/Value can be hash map keys. Likewise float hashing
normalizes the float value before computing the hash.
2022-03-17 17:24:35 -07:00
Luuk de Gram
215a22541c
wasm: Improve memset implementation
When the length is comptime-known, we perform an inline loop instead of emitting
a runtime loop into the binary.

This also allows us to easily write 'undefined' to aggregate types.
We now do this when we set the error tag of an error union where the payload will be set to undefined.
2022-03-17 20:41:26 +01:00
Luuk de Gram
eafdc5562f
wasm: Implement 'memcpy' instruction
This implements the `memcpy` instruction and also updates the inline memcpy calls
to make use of the same implementation. We use the fast-loop when the length is comptime known,
and use a runtime loop when the length is runtime known.
We also perform feature-dection to emit a simply wasm memory.copy instruction when the feature
'bulk-memory' is enabled. (off by default).
2022-03-17 20:41:23 +01:00
mparadinha
355d0d0e7e stage2: x86_64: floatToInt for f32 and f64 2022-03-16 21:27:50 +00:00
mparadinha
66ef630006 stage2: x86_64: add new fld instruction 2022-03-16 21:24:09 +00:00
mparadinha
972d923f09 stage2: x86_64: add new fisttp instruction
this instruction does truncating conversion from floating point
values to signed integers.
2022-03-16 21:24:09 +00:00
Koakuma
7579f14e0f stage2 sparcv9: Add param/return regs list 2022-03-17 02:24:21 +07:00
joachimschmidt557
dcc1de12b0
stage2 ARM: implement addwrap, subwrap, mulwrap 2022-03-16 20:20:07 +01:00
joachimschmidt557
2412ac2c5f
stage2 ARM: fix shl for ints with bits < 32 2022-03-16 20:20:07 +01:00
joachimschmidt557
0eebdfcad3
stage2 ARM: fix bitwise negation of ints with bits < 32 2022-03-16 20:20:07 +01:00
joachimschmidt557
ca1ffb0951
stage2 ARM: genSetStack for stack_argument_offset 2022-03-16 20:19:58 +01:00
Koakuma
ac50ac699f stage2 sparcv9: Add encoder test and packed struct workaround 2022-03-17 01:47:17 +07:00
Koakuma
d9c33a610e stage2 sparcv9: Fix branch format asserts 2022-03-16 22:30:48 +07:00
Koakuma
1cea8b271e stage2 sparcv9: Add list of preserved regs 2022-03-16 21:40:59 +07:00
Koakuma
d6a35500e5 stage2 sparcv9: Reorder Format 4 wrappers too 2022-03-16 21:38:44 +07:00
Koakuma
1d4b9f44ed stage2 sparcv9: cc -> ccr 2022-03-16 21:38:44 +07:00