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x86_64: fix bitcast from f80

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This commit is contained in:
Jacob Young 2023-10-07 21:06:25 -04:00
parent 24c67992e0
commit 24d76500d2
2 changed files with 8 additions and 4 deletions
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10
src/arch/x86_64/CodeGen.zig
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@ -11332,11 +11332,15 @@ fn airBitCast(self: *Self, inst: Air.Inst.Index) !void {
break :dst dst_mcv;
};
if (dst_ty.isRuntimeFloat()) break :result dst_mcv;
const dst_signedness =
if (dst_ty.isAbiInt(mod)) dst_ty.intInfo(mod).signedness else .unsigned;
const src_signedness =
if (src_ty.isAbiInt(mod)) src_ty.intInfo(mod).signedness else .unsigned;
if (dst_signedness == src_signedness) break :result dst_mcv;
if (!src_ty.isRuntimeFloat() or src_ty.floatBits(self.target.*) != 80) {
const src_signedness =
if (src_ty.isAbiInt(mod)) src_ty.intInfo(mod).signedness else .unsigned;
if (dst_signedness == src_signedness) break :result dst_mcv;
}
const abi_size: u16 = @intCast(dst_ty.abiSize(mod));
const bit_size: u16 = @intCast(dst_ty.bitSize(mod));

2
test/behavior/floatop.zig
View File

@ -1294,7 +1294,7 @@ test "neg f80/f128/c_longdouble" {
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf) return error.SkipZigTest;
try testNeg(f80);
try comptime testNeg(f80);