diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig
index 70911ab860..956fe76494 100644
--- a/src/arch/x86_64/CodeGen.zig
+++ b/src/arch/x86_64/CodeGen.zig
@@ -11332,11 +11332,15 @@ fn airBitCast(self: *Self, inst: Air.Inst.Index) !void {
             break :dst dst_mcv;
         };
 
+        if (dst_ty.isRuntimeFloat()) break :result dst_mcv;
+
         const dst_signedness =
             if (dst_ty.isAbiInt(mod)) dst_ty.intInfo(mod).signedness else .unsigned;
-        const src_signedness =
-            if (src_ty.isAbiInt(mod)) src_ty.intInfo(mod).signedness else .unsigned;
-        if (dst_signedness == src_signedness) break :result dst_mcv;
+        if (!src_ty.isRuntimeFloat() or src_ty.floatBits(self.target.*) != 80) {
+            const src_signedness =
+                if (src_ty.isAbiInt(mod)) src_ty.intInfo(mod).signedness else .unsigned;
+            if (dst_signedness == src_signedness) break :result dst_mcv;
+        }
 
         const abi_size: u16 = @intCast(dst_ty.abiSize(mod));
         const bit_size: u16 = @intCast(dst_ty.bitSize(mod));
diff --git a/test/behavior/floatop.zig b/test/behavior/floatop.zig
index 1074cec16c..05ac8a6a89 100644
--- a/test/behavior/floatop.zig
+++ b/test/behavior/floatop.zig
@@ -1294,7 +1294,7 @@ test "neg f80/f128/c_longdouble" {
     if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
-    if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf) return error.SkipZigTest;
 
     try testNeg(f80);
     try comptime testNeg(f80);