mirror/zig
1
0
Fork 0
mirror of https://github.com/ziglang/zig.git synced 2026-01-30 03:03:46 +00:00
Code Issues Packages Projects Releases Wiki Activity
zig/lib
History
LemonBoy 89df41e5d8 stage2: Default AVR generic cpu to avr2 
The avr1 target is a very minimal subset of the AVR ISA, quoting the GCC
manual:

> This ISA is implemented by the minimal AVR core and supported for
> assembler only.

Default to avr2 as GCC and Clang do.
2021-04-06 10:18:11 -07:00
..
include
update to latest clang C headers
2020-12-04 15:39:16 -07:00
libc
glibc: update ABI files to 2.33
2021-04-04 12:04:02 -07:00
libcxx
update install files for LLVM 11rc1
2020-08-04 17:52:26 -07:00
libcxxabi
update install files for LLVM 11rc1
2020-08-04 17:52:26 -07:00
libunwind
libunwind: fix compile errors and warnings for 32-bit arm
2020-12-24 13:31:41 -07:00
std
stage2: Default AVR generic cpu to avr2
2021-04-06 10:18:11 -07:00
tsan
stage2: fix Cache deadlock and build more of TSAN
2020-12-24 01:18:48 -07:00