125 Commits

Author SHA1 Message Date
Ali Cheraghi
f43f89a705 spirv: snake-case the spec 2025-07-14 15:16:17 +02:00
Andrew Kelley
5378fdb153 std.fmt: fully remove format string from format methods
Introduces `std.fmt.alt` which is a helper for calling alternate format
methods besides one named "format".
2025-07-07 22:43:53 -07:00
Andrew Kelley
30c2921eb8 compiler: update a bunch of format strings 2025-07-07 22:43:52 -07:00
Ali Cheraghi
1df79ab895 remove spirv cpu arch 2025-06-23 06:03:03 +02:00
Jacob Young
917640810e Target: pass and use locals by pointer instead of by value
This struct is larger than 256 bytes and code that copies it
consistently shows up in profiles of the compiler.
2025-06-19 11:45:06 -04:00
mlugg
3743c3e39c
compiler: slightly untangle LLVM from the linkers
The main goal of this commit is to make it easier to decouple codegen
from the linkers by being able to do LLVM codegen without going through
the `link.File`; however, this ended up being a nice refactor anyway.

Previously, every linker stored an optional `llvm.Object`, which was
populated when using LLVM for the ZCU *and* linking an output binary;
and `Zcu` also stored an optional `llvm.Object`, which was used only
when we needed LLVM for the ZCU (e.g. for `-femit-llvm-bc`) but were not
emitting a binary.

This situation was incredibly silly. It meant there were N+1 places the
LLVM object might be instead of just 1, and it meant that every linker
had to start a bunch of methods by checking for an LLVM object, and just
dispatching to the corresponding method on *it* instead if it was not
`null`.

Instead, we now always store the LLVM object on the `Zcu` -- which makes
sense, because it corresponds to the object emitted by, well, the Zig
Compilation Unit! The linkers now mostly don't make reference to LLVM.
`Compilation` makes sure to emit the LLVM object if necessary before
calling `flush`, so it is ready for the linker. Also, all of the
`link.File` methods which act on the ZCU -- like `updateNav` -- now
check for the LLVM object in `link.zig` instead of in every single
individual linker implementation. Notably, the change to LLVM emit
improves this rather ludicrous call chain in the `-fllvm -flld` case:

* Compilation.flush
* link.File.flush
* link.Elf.flush
* link.Elf.linkWithLLD
* link.Elf.flushModule
* link.emitLlvmObject
* Compilation.emitLlvmObject
* llvm.Object.emit

Replacing it with this one:

* Compilation.flush
* llvm.Object.emit

...although we do currently still end up in `link.Elf.linkWithLLD` to do
the actual linking. The logic for invoking LLD should probably also be
unified at least somewhat; I haven't done that in this commit.
2025-06-12 13:55:39 +01:00
Alex Rønne Petersen
9d534790eb std.Target: Introduce Cpu convenience functions for feature tests.
Before:

* std.Target.arm.featureSetHas(target.cpu.features, .has_v7)
* std.Target.x86.featureSetHasAny(target.cpu.features, .{ .sse, .avx, .cmov })
* std.Target.wasm.featureSetHasAll(target.cpu.features, .{ .atomics, .bulk_memory })

After:

* target.cpu.has(.arm, .has_v7)
* target.cpu.hasAny(.x86, &.{ .sse, .avx, .cmov })
* target.cpu.hasAll(.wasm, &.{ .atomics, .bulk_memory })
2025-06-05 06:12:00 +02:00
Ali Cheraghi
8fa54eb798 spirv: error when execution mode is set more than once 2025-05-21 13:01:21 +03:30
Ali Cheraghi
dacd70fbe4 spirv: super basic composite int support 2025-05-21 13:01:20 +03:30
Ali Cheraghi
0901328f12 spirv: write error value in an storage buffer 2025-05-21 12:57:40 +03:30
Ali Cheraghi
fca5f3602d spirv: unroll all vector operations 2025-05-21 12:57:40 +03:30
dan
07c04bcd83 spirv: Assemble OpTypeRuntimeArray. 2025-03-19 11:45:35 +08:00
Ali Cheraghi
ee06b2ce76 spirv: require int8/int16 capabilities 2025-03-18 07:05:50 +03:30
Ali Cheraghi
54c097f50d spirv: packed struct init + field val access 2025-03-18 07:05:48 +03:30
Ali Cheraghi
50539a2447 spirv/target: arbitrary_precision_integers feature support 2025-03-17 21:56:17 +03:30
Ali Cheraghi
e2e7577474 spirv: lower more types in assembler 2025-03-17 21:56:17 +03:30
Ali Cheraghi
78ad866dd1 target: split addresses and physical_storage_buffer features 2025-03-17 21:56:17 +03:30
Linus Groh
79460d4a3e Remove uses of deprecated callconv aliases 2025-03-05 03:01:43 +00:00
Robin Voetter
fe5a78691f
spirv: get rid of function_types cache
This deep hash map doesn't work
2025-02-24 20:58:13 +01:00
Ali Cheraghi
a0eec9ce9e
spirv: replace some unreachables with compile errors 2025-02-24 19:12:33 +01:00
Ali Cheraghi
7872082939
spirv: extend supported c constraint values 2025-02-18 18:08:51 +03:30
Ali Cheraghi
d5e1cb3ea2
spirv: ziggify and remove unknown spirv features
`OpCapability` and `OpExtension` now can also be emitted from inline assembly
2025-02-18 18:08:47 +03:30
Ali Cheraghi
85169bbba2
spirv: respect cpu features 2025-02-18 18:07:48 +03:30
Ali Cheraghi
29e46633ce
spirv: cache more types & merge constructX functions 2025-02-18 18:07:48 +03:30
mlugg
d00e05f186
all: update to std.builtin.Type.Pointer.Size field renames
This was done by regex substitution with `sed`. I then manually went
over the entire diff and fixed any incorrect changes.

This diff also changes a lot of `callconv(.C)` to `callconv(.c)`, since
my regex happened to also trigger here. I opted to leave these changes
in, since they *are* a correct migration, even if they're not the one I
was trying to do!
2025-01-16 12:46:29 +00:00
Robin Voetter
688d7055e3
spirv: assembler hacky constant placeholders 2024-11-08 20:43:55 +01:00
Robin Voetter
7682ced08e
spirv: track global OpVariables properly in assembler
Also cleans up the assembler a bit in general.
2024-11-08 20:38:22 +01:00
Ali Cheraghi
a1cb9563f6
spirv: Uniform/PushConstant variables
- Rename GPU address spaces to match with SPIR-V spec.
- Emit `Block` Decoration for Uniform/PushConstant variables.
- Don't emit `OpTypeForwardPointer` for non-opencl targets.
  (there's still a false-positive about recursive structs)

Signed-off-by: Ali Cheraghi <alichraghi@proton.me>
2024-11-01 02:03:33 +03:30
Linus Groh
8588964972 Replace deprecated default initializations with decl literals 2024-09-12 16:01:23 +01:00
mlugg
0fe3fd01dd
std: update std.builtin.Type fields to follow naming conventions
The compiler actually doesn't need any functional changes for this: Sema
does reification based on the tag indices of `std.builtin.Type` already!
So, no zig1.wasm update is necessary.

This change is necessary to disallow name clashes between fields and
decls on a type, which is a prerequisite of #9938.
2024-08-28 08:39:59 +01:00
Robin Voetter
50a771a11e
spirv: add support for workItemId, workGroupId, workGroupSize 2024-06-16 01:00:13 +02:00
Robin Voetter
a3b1ba82f5
spirv: new vectorization helper
The old vectorization helper (WipElementWise) was clunky and a bit
annoying to use, and it wasn't really flexible enough.

This introduces a new vectorization helper, which uses Temporary and
Operation types to deduce a Vectorization to perform the operation
in a reasonably efficient manner. It removes the outer loop
required by WipElementWise so that implementations of AIR instructions
are cleaner. This helps with sanity when we start to introduce support
for composite integers.

airShift, convertToDirect, convertToIndirect, and normalize are initially
implemented using this new method.
2024-06-10 20:32:49 +02:00
Robin Voetter
3e388faecd
spirv: yeet cache 2024-04-06 13:37:40 +02:00
Robin Voetter
ef638502d4
spirv: remove cache usage from assembler 2024-04-06 13:37:40 +02:00
Robin Voetter
97a67762ba
spirv: remove cache usage for types 2024-04-06 13:37:39 +02:00
Robin Voetter
188922a544
spirv: remove cache usage for constants 2024-04-06 13:37:39 +02:00
Robin Voetter
42c7e752e1
spirv: id range helper
This allows us to more sanely allocate a continuous
range of result-ids, and avoids a bunch of nasty
casting code in a few places. Its currently not used
very often, but will be useful in the future.
2024-04-06 13:37:37 +02:00
Ali Chraghi
436f53f55d spirv: implement @mulWithOverflow 2024-04-06 09:01:46 +03:30
Ali Chraghi
9785014938 spirv: OpExtInstImport in assembler 2024-04-06 08:52:38 +03:30
Ali Chraghi
0f75143c62 spirv: implement @divFloor, @floor and @mod 2024-04-06 08:50:02 +03:30
Robin Voetter
9b18125562
spirv: make generic globals invocation-local 2024-03-18 19:13:50 +01:00
Robin Voetter
20d7bb68ac
spirv: add zig-specific ext inst
This may be removed again in the future...
2024-03-18 19:13:49 +01:00
Robin Voetter
e566158acf
spirv: make IdResult an enum 2024-03-18 19:13:49 +01:00
Robin Voetter
9b058117f0
spirv: update assembler with new spec 2024-03-18 19:13:48 +01:00
Robin Voetter
028f532dc0
spirv: update spec to SPIRV-Headers/8b246ff
We need this "unstable" version to get the Zig identifiers.
2024-03-18 19:13:47 +01:00
Tristan Ross
099f3c4039
std.builtin: make container layout fields lowercase 2024-03-11 07:09:07 -07:00
Ali Chraghi
23b7075656 spirv: add capability to compile with x86_64 backend 2024-02-15 17:28:15 +03:30
Ali Chraghi
44c31194e3 spirv: use extended instructions whenever possible 2024-02-15 17:25:44 +03:30
Ali Chraghi
37b0aa600a spirv: make rusticl the primary testing implementation 2024-02-09 09:27:08 +03:30
Ali Chraghi
739108c9f0 spirv: support enum integer values in Assembler 2024-02-05 11:55:14 +03:30