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spirv: ziggify and remove unknown spirv features
`OpCapability` and `OpExtension` now can also be emitted from inline assembly
This commit is contained in:
Ali Cheraghi
parent
85169bbba2
commit
d5e1cb3ea2
@ -1184,7 +1184,7 @@ pub const Cpu = struct {
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pub const Set = struct {
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ints: [usize_count]usize,
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pub const needed_bit_count = 398;
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pub const needed_bit_count = 288;
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pub const byte_count = (needed_bit_count + 7) / 8;
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pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);
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pub const Index = std.math.Log2Int(std.meta.Int(.unsigned, usize_count * @bitSizeOf(usize)));
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File diff suppressed because it is too large
Load Diff
@ -552,7 +552,7 @@ const NavGen = struct {
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}
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fn castToGeneric(self: *NavGen, type_id: IdRef, ptr_id: IdRef) !IdRef {
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if (self.spv.hasFeature(.Kernel)) {
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if (self.spv.hasFeature(.kernel)) {
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const result_id = self.spv.allocId();
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try self.func.body.emit(self.spv.gpa, .OpPtrCastToGeneric, .{
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.id_result_type = type_id,
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@ -591,10 +591,10 @@ const NavGen = struct {
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// 8, 16 and 64-bit integers require the Int8, Int16 and Inr64 capabilities respectively.
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// 32-bit integers are always supported (see spec, 2.16.1, Data rules).
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const ints = [_]struct { bits: u16, feature: ?Target.spirv.Feature }{
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.{ .bits = 8, .feature = .Int8 },
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.{ .bits = 16, .feature = .Int16 },
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.{ .bits = 8, .feature = .int8 },
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.{ .bits = 16, .feature = .int16 },
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.{ .bits = 32, .feature = null },
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.{ .bits = 64, .feature = .Int64 },
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.{ .bits = 64, .feature = .int64 },
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};
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for (ints) |int| {
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@ -612,7 +612,7 @@ const NavGen = struct {
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/// is no way of knowing whether those are actually supported.
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/// TODO: Maybe this should be cached?
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fn largestSupportedIntBits(self: *NavGen) u16 {
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return if (self.spv.hasFeature(.Int64)) 64 else 32;
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return if (self.spv.hasFeature(.int64)) 64 else 32;
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}
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/// Checks whether the type is "composite int", an integer consisting of multiple native integers. These are represented by
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@ -644,7 +644,7 @@ const NavGen = struct {
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if (elem_ty.isNumeric(zcu) or elem_ty.toIntern() == .bool_type) {
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if (len > 1 and len <= 4) return true;
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if (self.spv.hasFeature(.Vector16)) return (len == 8 or len == 16);
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if (self.spv.hasFeature(.vector16)) return (len == 8 or len == 16);
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}
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return false;
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@ -1241,7 +1241,7 @@ const NavGen = struct {
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};
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// Kernel only supports unsigned ints.
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if (self.spv.hasFeature(.Kernel)) {
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if (self.spv.hasFeature(.kernel)) {
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return self.spv.intType(.unsigned, backing_bits);
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}
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@ -1465,10 +1465,10 @@ const NavGen = struct {
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// so if the float is not supported, just return an error.
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const bits = ty.floatBits(target);
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const supported = switch (bits) {
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16 => Target.spirv.featureSetHas(target.cpu.features, .Float16),
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16 => self.spv.hasFeature(.float16),
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// 32-bit floats are always supported (see spec, 2.16.1, Data rules).
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32 => true,
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64 => Target.spirv.featureSetHas(target.cpu.features, .Float64),
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64 => self.spv.hasFeature(.float64),
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else => false,
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};
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@ -1511,7 +1511,7 @@ const NavGen = struct {
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return try self.arrayType(1, elem_ty_id);
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} else {
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const result_id = try self.arrayType(total_len, elem_ty_id);
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if (self.spv.hasFeature(.Shader)) {
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if (self.spv.hasFeature(.shader)) {
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try self.spv.decorate(result_id, .{ .ArrayStride = .{
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.array_stride = @intCast(elem_ty.abiSize(zcu)),
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} });
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@ -1645,7 +1645,7 @@ const NavGen = struct {
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continue;
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}
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if (self.spv.hasFeature(.Shader)) {
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if (self.spv.hasFeature(.shader)) {
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try self.spv.decorateMember(result_id, index, .{ .Offset = .{
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.byte_offset = @intCast(ty.structFieldOffset(field_index, zcu)),
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} });
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@ -1748,10 +1748,10 @@ const NavGen = struct {
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fn spvStorageClass(self: *NavGen, as: std.builtin.AddressSpace) StorageClass {
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return switch (as) {
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.generic => if (self.spv.hasFeature(.GenericPointer)) .Generic else .Function,
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.generic => if (self.spv.hasFeature(.generic_pointer)) .Generic else .Function,
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.shared => .Workgroup,
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.local => .Function,
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.global => if (self.spv.hasFeature(.Shader)) .PhysicalStorageBuffer else .CrossWorkgroup,
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.global => if (self.spv.hasFeature(.shader)) .PhysicalStorageBuffer else .CrossWorkgroup,
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.constant => .UniformConstant,
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.push_constant => .PushConstant,
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.input => .Input,
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@ -2461,7 +2461,7 @@ const NavGen = struct {
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// TODO: These instructions don't seem to be working
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// properly for LLVM-based backends on OpenCL for 8- and
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// 16-component vectors.
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.i_abs => if (self.spv.hasFeature(.Vector16) and v.components() >= 8) v.unroll() else v,
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.i_abs => if (self.spv.hasFeature(.vector16) and v.components() >= 8) v.unroll() else v,
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else => v,
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};
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};
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@ -3650,7 +3650,7 @@ const NavGen = struct {
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// depending on the result type. Do that when
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// bitCast is implemented for vectors.
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// This is only relevant for Vulkan
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assert(self.spv.hasFeature(.Kernel)); // TODO
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assert(self.spv.hasFeature(.kernel)); // TODO
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return try self.normalize(abs_value, self.arithmeticTypeInfo(result_ty));
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},
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@ -3968,7 +3968,7 @@ const NavGen = struct {
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.float, .bool => unreachable,
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}
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assert(self.spv.hasFeature(.Kernel)); // TODO
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assert(self.spv.hasFeature(.kernel)); // TODO
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const count = try self.buildUnary(op, operand);
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@ -4204,7 +4204,7 @@ const NavGen = struct {
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defer self.gpa.free(ids);
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const result_id = self.spv.allocId();
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if (self.spv.hasFeature(.Kernel)) {
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if (self.spv.hasFeature(.kernel)) {
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try self.func.body.emit(self.spv.gpa, .OpInBoundsPtrAccessChain, .{
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.id_result_type = result_ty_id,
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.id_result = result_id,
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@ -5290,7 +5290,7 @@ const NavGen = struct {
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.initializer = options.initializer,
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});
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if (self.spv.hasFeature(.Shader)) return var_id;
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if (self.spv.hasFeature(.shader)) return var_id;
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switch (options.storage_class) {
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.Generic => {
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@ -274,6 +274,16 @@ fn processInstruction(self: *Assembler) !void {
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.OpEntryPoint => {
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return self.fail(0, "cannot export entry points via OpEntryPoint, export the kernel using callconv(.Kernel)", .{});
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},
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.OpCapability => {
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try self.spv.addCapability(@enumFromInt(self.inst.operands.items[0].value));
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return;
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},
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.OpExtension => {
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const ext_name_offset = self.inst.operands.items[0].string;
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const ext_name = std.mem.sliceTo(self.inst.string_bytes.items[ext_name_offset..], 0);
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try self.spv.addExtension(ext_name);
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return;
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},
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.OpExtInstImport => blk: {
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const set_name_offset = self.inst.operands.items[1].string;
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const set_name = std.mem.sliceTo(self.inst.string_bytes.items[set_name_offset..], 0);
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@ -183,8 +183,11 @@ cache: struct {
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array_types: std.AutoHashMapUnmanaged(struct { IdRef, IdRef }, IdRef) = .empty,
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function_types: DeepHashMap(struct { IdRef, []const IdRef }, IdRef) = .empty,
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builtins: std.AutoHashMapUnmanaged(struct { IdRef, spec.BuiltIn }, Decl.Index) = .empty,
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capabilities: std.AutoHashMapUnmanaged(spec.Capability, void) = .empty,
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extensions: std.StringHashMapUnmanaged(void) = .empty,
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extended_instruction_set: std.AutoHashMapUnmanaged(spec.InstructionSet, IdRef) = .empty,
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decorations: std.AutoHashMapUnmanaged(struct { IdRef, spec.Decoration }, void) = .empty,
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builtins: std.AutoHashMapUnmanaged(struct { IdRef, spec.BuiltIn }, Decl.Index) = .empty,
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bool_const: [2]?IdRef = .{ null, null },
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} = .{},
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@ -199,9 +202,6 @@ decl_deps: std.ArrayListUnmanaged(Decl.Index) = .empty,
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/// The list of entry points that should be exported from this module.
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entry_points: std.ArrayListUnmanaged(EntryPoint) = .empty,
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/// The list of extended instruction sets that should be imported.
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extended_instruction_set: std.AutoHashMapUnmanaged(spec.InstructionSet, IdRef) = .empty,
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pub fn init(gpa: Allocator, target: std.Target) Module {
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const version_minor: u8 = blk: {
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// Prefer higher versions
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@ -242,15 +242,16 @@ pub fn deinit(self: *Module) void {
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self.cache.vector_types.deinit(self.gpa);
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self.cache.array_types.deinit(self.gpa);
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self.cache.function_types.deinit(self.gpa);
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self.cache.builtins.deinit(self.gpa);
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self.cache.capabilities.deinit(self.gpa);
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self.cache.extensions.deinit(self.gpa);
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self.cache.extended_instruction_set.deinit(self.gpa);
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self.cache.decorations.deinit(self.gpa);
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self.cache.builtins.deinit(self.gpa);
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self.decls.deinit(self.gpa);
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self.decl_deps.deinit(self.gpa);
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self.entry_points.deinit(self.gpa);
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self.extended_instruction_set.deinit(self.gpa);
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self.arena.deinit();
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self.* = undefined;
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@ -339,9 +340,61 @@ fn entryPoints(self: *Module) !Section {
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}
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pub fn finalize(self: *Module, a: Allocator) ![]Word {
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// Emit capabilities and extensions
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for (std.Target.spirv.all_features) |feature| {
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if (self.target.cpu.features.isEnabled(feature.index)) {
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const feature_tag: std.Target.spirv.Feature = @enumFromInt(feature.index);
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switch (feature_tag) {
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.v1_0, .v1_1, .v1_2, .v1_3, .v1_4, .v1_5, .v1_6 => {},
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.int8 => try self.addCapability(.Int8),
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.int16 => try self.addCapability(.Int16),
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.int64 => try self.addCapability(.Int64),
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.float16 => try self.addCapability(.Float16),
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.float64 => try self.addCapability(.Float64),
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.addresses => if (self.hasFeature(.shader)) {
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try self.addCapability(.PhysicalStorageBufferAddresses);
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try self.addExtension("SPV_KHR_physical_storage_buffer");
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} else {
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try self.addCapability(.Addresses);
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},
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.matrix => try self.addCapability(.Matrix),
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.kernel => try self.addCapability(.Kernel),
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.generic_pointer => try self.addCapability(.GenericPointer),
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.vector16 => try self.addCapability(.Vector16),
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.shader => try self.addCapability(.Shader),
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}
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}
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}
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// Emit memory model
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const addressing_model: spec.AddressingModel = blk: {
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if (self.hasFeature(.shader)) {
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break :blk switch (self.target.cpu.arch) {
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.spirv32 => .Logical, // TODO: I don't think this will ever be implemented.
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.spirv64 => .PhysicalStorageBuffer64,
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else => unreachable,
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};
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} else if (self.hasFeature(.kernel)) {
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break :blk switch (self.target.cpu.arch) {
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.spirv32 => .Physical32,
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.spirv64 => .Physical64,
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else => unreachable,
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};
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}
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unreachable;
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};
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try self.sections.memory_model.emit(self.gpa, .OpMemoryModel, .{
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.addressing_model = addressing_model,
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.memory_model = switch (self.target.os.tag) {
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.opencl => .OpenCL,
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.vulkan, .opengl => .GLSL450,
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else => unreachable,
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},
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});
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// See SPIR-V Spec section 2.3, "Physical Layout of a SPIR-V Module and Instruction"
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// TODO: Audit calls to allocId() in this function to make it idempotent.
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var entry_points = try self.entryPoints();
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defer entry_points.deinit(self.gpa);
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@ -405,11 +458,23 @@ pub fn addFunction(self: *Module, decl_index: Decl.Index, func: Fn) !void {
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try self.declareDeclDeps(decl_index, func.decl_deps.keys());
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}
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pub fn addCapability(self: *Module, cap: spec.Capability) !void {
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const entry = try self.cache.capabilities.getOrPut(self.gpa, cap);
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if (entry.found_existing) return;
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try self.sections.capabilities.emit(self.gpa, .OpCapability, .{ .capability = cap });
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}
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pub fn addExtension(self: *Module, ext: []const u8) !void {
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const entry = try self.cache.extensions.getOrPut(self.gpa, ext);
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if (entry.found_existing) return;
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try self.sections.extensions.emit(self.gpa, .OpExtension, .{ .name = ext });
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}
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/// Imports or returns the existing id of an extended instruction set
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pub fn importInstructionSet(self: *Module, set: spec.InstructionSet) !IdRef {
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assert(set != .core);
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const gop = try self.extended_instruction_set.getOrPut(self.gpa, set);
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const gop = try self.cache.extended_instruction_set.getOrPut(self.gpa, set);
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if (gop.found_existing) return gop.value_ptr.*;
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const result_id = self.allocId();
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@ -232,13 +232,9 @@ pub fn flushModule(
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const diags = &comp.link_diags;
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const gpa = comp.gpa;
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try writeCapabilities(spv);
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try writeMemoryModel(spv);
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// We need to export the list of error names somewhere so that we can pretty-print them in the
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// executor. This is not really an important thing though, so we can just dump it in any old
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// nonsemantic instruction. For now, just put it in OpSourceExtension with a special name.
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var error_info = std.ArrayList(u8).init(self.object.gpa);
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defer error_info.deinit();
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@ -297,65 +293,3 @@ fn linkModule(self: *SpirV, a: Allocator, module: []Word, progress: std.Progress
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return binary.finalize(a);
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}
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fn writeCapabilities(spv: *SpvModule) !void {
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var caps: std.ArrayList(spec.Capability) = .init(spv.gpa);
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var extensions: std.ArrayList([]const u8) = .init(spv.gpa);
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defer {
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caps.deinit();
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extensions.deinit();
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}
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// Currently all spirv target features name are mapped to a Capability or an Extension.
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// Except for versions which we ignore.
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for (std.Target.spirv.all_features, 0..) |_, i| {
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if (spv.target.cpu.features.isEnabled(@intCast(i))) {
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const feature: std.Target.spirv.Feature = @enumFromInt(i);
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const name = @tagName(feature);
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if (std.meta.stringToEnum(spec.Capability, name)) |cap| {
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try caps.append(cap);
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} else if (std.mem.startsWith(u8, name, "SPV_")) {
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try extensions.append(name);
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}
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}
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}
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for (caps.items) |cap| {
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try spv.sections.capabilities.emit(spv.gpa, .OpCapability, .{
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.capability = cap,
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});
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}
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for (extensions.items) |ext| {
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try spv.sections.extensions.emit(spv.gpa, .OpExtension, .{ .name = ext });
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}
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}
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fn writeMemoryModel(spv: *SpvModule) !void {
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const addressing_model: spec.AddressingModel = blk: {
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if (spv.hasFeature(.Shader)) {
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break :blk switch (spv.target.cpu.arch) {
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.spirv32 => .Logical, // TODO: I don't think this will ever be implemented.
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.spirv64 => .PhysicalStorageBuffer64,
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else => unreachable,
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};
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} else if (spv.hasFeature(.Kernel)) {
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break :blk switch (spv.target.cpu.arch) {
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.spirv32 => .Physical32,
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.spirv64 => .Physical64,
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else => unreachable,
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};
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}
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unreachable;
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};
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const memory_model: spec.MemoryModel = switch (spv.target.os.tag) {
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.opencl => .OpenCL,
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.vulkan, .opengl => .GLSL450,
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else => unreachable,
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};
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try spv.sections.memory_model.emit(spv.gpa, .OpMemoryModel, .{
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.addressing_model = addressing_model,
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.memory_model = memory_model,
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});
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}
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@ -43,7 +43,6 @@ pub fn build(b: *std.Build) void {
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"../../tools/update_clang_options.zig",
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"../../tools/update_cpu_features.zig",
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"../../tools/update_glibc.zig",
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"../../tools/update_spirv_features.zig",
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}) |tool_src_path| {
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const tool = b.addTest(.{
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.name = std.fs.path.stem(tool_src_path),
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@ -1072,13 +1072,6 @@ const targets = [_]ArchTarget{
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.td_name = "Sparc",
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},
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},
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// TODO: merge tools/update_spirv_features.zig into this script
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//.{
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// .zig_name = "spirv",
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// .llvm = .{
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// .name = "SPIRV",
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// },
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//},
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.{
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.zig_name = "s390x",
|
||||
.llvm = .{
|
||||
|
||||
@ -1,361 +0,0 @@
|
||||
//! This tool generates SPIR-V features from the grammar files in the SPIRV-Headers
|
||||
//! (https://github.com/KhronosGroup/SPIRV-Headers/) and SPIRV-Registry (https://github.com/KhronosGroup/SPIRV-Registry/)
|
||||
//! repositories. Currently it only generates a basic feature set definition consisting of versions, extensions and capabilities.
|
||||
//! There is a lot left to be desired, as currently dependencies of extensions and dependencies on extensions aren't generated.
|
||||
//! This is because there are some peculiarities in the SPIR-V registries:
|
||||
//! - Capabilities may depend on multiple extensions, which cannot be modelled yet by std.Target.
|
||||
//! - Extension dependencies are not documented in a machine-readable manner.
|
||||
//! - Note that the grammar spec also contains definitions from extensions which aren't actually official. Most of these seem to be
|
||||
//! from an intel project (https://github.com/intel/llvm/, https://github.com/intel/llvm/tree/sycl/sycl/doc/extensions/SPIRV),
|
||||
//! and so ONLY extensions in the SPIRV-Registry should be included.
|
||||
|
||||
const std = @import("std");
|
||||
const fs = std.fs;
|
||||
const Allocator = std.mem.Allocator;
|
||||
const g = @import("spirv/grammar.zig");
|
||||
|
||||
const Version = struct {
|
||||
major: u32,
|
||||
minor: u32,
|
||||
|
||||
fn parse(str: []const u8) !Version {
|
||||
var it = std.mem.splitScalar(u8, str, '.');
|
||||
|
||||
const major = it.first();
|
||||
const minor = it.next() orelse return error.InvalidVersion;
|
||||
|
||||
if (it.next() != null) return error.InvalidVersion;
|
||||
|
||||
return Version{
|
||||
.major = std.fmt.parseInt(u32, major, 10) catch return error.InvalidVersion,
|
||||
.minor = std.fmt.parseInt(u32, minor, 10) catch return error.InvalidVersion,
|
||||
};
|
||||
}
|
||||
|
||||
fn eql(a: Version, b: Version) bool {
|
||||
return a.major == b.major and a.minor == b.minor;
|
||||
}
|
||||
|
||||
fn lessThan(ctx: void, a: Version, b: Version) bool {
|
||||
_ = ctx;
|
||||
return if (a.major == b.major)
|
||||
a.minor < b.minor
|
||||
else
|
||||
a.major < b.major;
|
||||
}
|
||||
};
|
||||
|
||||
pub fn main() !void {
|
||||
var arena = std.heap.ArenaAllocator.init(std.heap.page_allocator);
|
||||
defer arena.deinit();
|
||||
const allocator = arena.allocator();
|
||||
|
||||
const args = try std.process.argsAlloc(allocator);
|
||||
|
||||
if (args.len <= 1) {
|
||||
usageAndExit(std.io.getStdErr(), args[0], 1);
|
||||
}
|
||||
if (std.mem.eql(u8, args[1], "--help")) {
|
||||
usageAndExit(std.io.getStdErr(), args[0], 0);
|
||||
}
|
||||
if (args.len != 3) {
|
||||
usageAndExit(std.io.getStdErr(), args[0], 1);
|
||||
}
|
||||
|
||||
const spirv_headers_root = args[1];
|
||||
const spirv_registry_root = args[2];
|
||||
|
||||
if (std.mem.startsWith(u8, spirv_headers_root, "-") or std.mem.startsWith(u8, spirv_registry_root, "-")) {
|
||||
usageAndExit(std.io.getStdErr(), args[0], 1);
|
||||
}
|
||||
|
||||
// Required for json parsing.
|
||||
@setEvalBranchQuota(10000);
|
||||
|
||||
const registry_path = try fs.path.join(allocator, &.{ spirv_headers_root, "include", "spirv", "unified1", "spirv.core.grammar.json" });
|
||||
const registry_json = try std.fs.cwd().readFileAlloc(allocator, registry_path, std.math.maxInt(usize));
|
||||
var scanner = std.json.Scanner.initCompleteInput(allocator, registry_json);
|
||||
var diagnostics = std.json.Diagnostics{};
|
||||
scanner.enableDiagnostics(&diagnostics);
|
||||
const registry = std.json.parseFromTokenSourceLeaky(g.CoreRegistry, allocator, &scanner, .{ .ignore_unknown_fields = true }) catch |err| {
|
||||
std.debug.print("line,col: {},{}\n", .{ diagnostics.getLine(), diagnostics.getColumn() });
|
||||
return err;
|
||||
};
|
||||
|
||||
const capabilities = for (registry.operand_kinds) |opkind| {
|
||||
if (std.mem.eql(u8, opkind.kind, "Capability"))
|
||||
break opkind.enumerants orelse return error.InvalidRegistry;
|
||||
} else return error.InvalidRegistry;
|
||||
|
||||
const extensions = try gather_extensions(allocator, spirv_registry_root);
|
||||
const versions = try gatherVersions(allocator, registry);
|
||||
|
||||
var bw = std.io.bufferedWriter(std.io.getStdOut().writer());
|
||||
const w = bw.writer();
|
||||
|
||||
try w.writeAll(
|
||||
\\//! This file is auto-generated by tools/update_spirv_features.zig.
|
||||
\\//! TODO: Dependencies of capabilities on extensions.
|
||||
\\//! TODO: Dependencies of extensions on extensions.
|
||||
\\//! TODO: Dependencies of extensions on versions.
|
||||
\\
|
||||
\\const std = @import("../std.zig");
|
||||
\\const CpuFeature = std.Target.Cpu.Feature;
|
||||
\\const CpuModel = std.Target.Cpu.Model;
|
||||
\\
|
||||
\\pub const Feature = enum {
|
||||
\\
|
||||
);
|
||||
|
||||
for (versions) |ver| {
|
||||
try w.print(" v{}_{},\n", .{ ver.major, ver.minor });
|
||||
}
|
||||
|
||||
for (extensions) |ext| {
|
||||
try w.print(" {p},\n", .{std.zig.fmtId(ext)});
|
||||
}
|
||||
|
||||
for (capabilities) |cap| {
|
||||
try w.print(" {p},\n", .{std.zig.fmtId(cap.enumerant)});
|
||||
}
|
||||
|
||||
try w.writeAll(
|
||||
\\};
|
||||
\\
|
||||
\\pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
|
||||
\\pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;
|
||||
\\pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
|
||||
\\pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;
|
||||
\\
|
||||
\\pub const all_features = blk: {
|
||||
\\ @setEvalBranchQuota(2000);
|
||||
\\ const len = @typeInfo(Feature).@"enum".fields.len;
|
||||
\\ std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
|
||||
\\ var result: [len]CpuFeature = undefined;
|
||||
\\
|
||||
);
|
||||
|
||||
for (versions, 0..) |ver, i| {
|
||||
try w.print(
|
||||
\\ result[@intFromEnum(Feature.v{0}_{1})] = .{{
|
||||
\\ .llvm_name = null,
|
||||
\\ .description = "SPIR-V version {0}.{1}",
|
||||
\\
|
||||
, .{ ver.major, ver.minor });
|
||||
|
||||
if (i == 0) {
|
||||
try w.writeAll(
|
||||
\\ .dependencies = featureSet(&[_]Feature{}),
|
||||
\\ };
|
||||
\\
|
||||
);
|
||||
} else {
|
||||
try w.print(
|
||||
\\ .dependencies = featureSet(&[_]Feature{{
|
||||
\\ .v{}_{},
|
||||
\\ }}),
|
||||
\\ }};
|
||||
\\
|
||||
, .{ versions[i - 1].major, versions[i - 1].minor });
|
||||
}
|
||||
}
|
||||
|
||||
// TODO: Extension dependencies.
|
||||
for (extensions) |ext| {
|
||||
try w.print(
|
||||
\\ result[@intFromEnum(Feature.{p_})] = .{{
|
||||
\\ .llvm_name = null,
|
||||
\\ .description = "SPIR-V extension {s}",
|
||||
\\ .dependencies = featureSet(&[_]Feature{{}}),
|
||||
\\ }};
|
||||
\\
|
||||
, .{
|
||||
std.zig.fmtId(ext),
|
||||
ext,
|
||||
});
|
||||
}
|
||||
|
||||
// TODO: Capability extension dependencies.
|
||||
for (capabilities) |cap| {
|
||||
try w.print(
|
||||
\\ result[@intFromEnum(Feature.{p_})] = .{{
|
||||
\\ .llvm_name = null,
|
||||
\\ .description = "Enable SPIR-V capability {s}",
|
||||
\\ .dependencies = featureSet(&[_]Feature{{
|
||||
\\
|
||||
, .{
|
||||
std.zig.fmtId(cap.enumerant),
|
||||
cap.enumerant,
|
||||
});
|
||||
|
||||
if (cap.version) |ver_str| blk: {
|
||||
if (std.mem.eql(u8, ver_str, "None")) break :blk;
|
||||
|
||||
const ver = try Version.parse(ver_str);
|
||||
try w.print(" .v{}_{},\n", .{ ver.major, ver.minor });
|
||||
}
|
||||
|
||||
for (cap.capabilities) |cap_dep| {
|
||||
try w.print(" .{p_},\n", .{std.zig.fmtId(cap_dep)});
|
||||
}
|
||||
|
||||
try w.writeAll(
|
||||
\\ }),
|
||||
\\ };
|
||||
\\
|
||||
);
|
||||
}
|
||||
|
||||
try w.writeAll(
|
||||
\\ const ti = @typeInfo(Feature);
|
||||
\\ for (&result, 0..) |*elem, i| {
|
||||
\\ elem.index = i;
|
||||
\\ elem.name = ti.@"enum".fields[i].name;
|
||||
\\ }
|
||||
\\ break :blk result;
|
||||
\\};
|
||||
\\
|
||||
\\pub const cpu = struct {
|
||||
\\ pub const generic: CpuModel = .{
|
||||
\\ .name = "generic",
|
||||
\\ .llvm_name = "generic",
|
||||
\\ .features = featureSet(&[_]Feature{ .v1_0 }),
|
||||
\\ };
|
||||
\\
|
||||
\\ pub const vulkan_v1_2: CpuModel = .{
|
||||
\\ .name = "vulkan_v1_2",
|
||||
\\ .llvm_name = null,
|
||||
\\ .features = featureSet(&[_]Feature{
|
||||
\\ .v1_5,
|
||||
\\ .Shader,
|
||||
\\ .PhysicalStorageBufferAddresses,
|
||||
\\ .VariablePointers,
|
||||
\\ .VariablePointersStorageBuffer,
|
||||
\\ .SPV_KHR_physical_storage_buffer,
|
||||
\\ }),
|
||||
\\ };
|
||||
\\
|
||||
\\ pub const opencl_v2: CpuModel = .{
|
||||
\\ .name = "opencl_v2",
|
||||
\\ .llvm_name = null,
|
||||
\\ .features = featureSet(&[_]Feature{
|
||||
\\ .v1_2,
|
||||
\\ .Kernel,
|
||||
\\ .Addresses,
|
||||
\\ .GenericPointer,
|
||||
\\ }),
|
||||
\\ };
|
||||
\\};
|
||||
);
|
||||
|
||||
try bw.flush();
|
||||
}
|
||||
|
||||
/// SPIRV-Registry should hold all extensions currently registered for SPIR-V.
|
||||
/// The *.grammar.json in SPIRV-Headers should have most of these as well, but with this we're sure to get only the actually
|
||||
/// registered ones.
|
||||
/// TODO: Unfortunately, neither repository contains a machine-readable list of extension dependencies.
|
||||
fn gather_extensions(allocator: Allocator, spirv_registry_root: []const u8) ![]const []const u8 {
|
||||
const extensions_path = try fs.path.join(allocator, &.{ spirv_registry_root, "extensions" });
|
||||
var extensions_dir = try fs.cwd().openDir(extensions_path, .{ .iterate = true });
|
||||
defer extensions_dir.close();
|
||||
|
||||
var extensions = std.ArrayList([]const u8).init(allocator);
|
||||
|
||||
var vendor_it = extensions_dir.iterate();
|
||||
while (try vendor_it.next()) |vendor_entry| {
|
||||
std.debug.assert(vendor_entry.kind == .directory); // If this fails, the structure of SPIRV-Registry has changed.
|
||||
|
||||
const vendor_dir = try extensions_dir.openDir(vendor_entry.name, .{ .iterate = true });
|
||||
var ext_it = vendor_dir.iterate();
|
||||
while (try ext_it.next()) |ext_entry| {
|
||||
// There is both a HTML and asciidoc version of every spec (as well as some other directories),
|
||||
// we need just the name, but to avoid duplicates here we will just skip anything thats not asciidoc.
|
||||
if (!std.mem.endsWith(u8, ext_entry.name, ".asciidoc"))
|
||||
continue;
|
||||
|
||||
// Unfortunately, some extension filenames are incorrect, so we need to look for the string in the 'Name Strings' section.
|
||||
// This has the following format:
|
||||
// ```
|
||||
// Name Strings
|
||||
// ------------
|
||||
//
|
||||
// SPV_EXT_name
|
||||
// ```
|
||||
// OR
|
||||
// ```
|
||||
// == Name Strings
|
||||
//
|
||||
// SPV_EXT_name
|
||||
// ```
|
||||
|
||||
const ext_spec = try vendor_dir.readFileAlloc(allocator, ext_entry.name, std.math.maxInt(usize));
|
||||
const name_strings = "Name Strings";
|
||||
|
||||
const name_strings_offset = std.mem.indexOf(u8, ext_spec, name_strings) orelse return error.InvalidRegistry;
|
||||
|
||||
// As the specs are inconsistent on this next part, just skip any newlines/minuses
|
||||
var ext_start = name_strings_offset + name_strings.len + 1;
|
||||
while (std.ascii.isWhitespace(ext_spec[ext_start]) or ext_spec[ext_start] == '-') {
|
||||
ext_start += 1;
|
||||
}
|
||||
|
||||
const ext_end = std.mem.indexOfScalarPos(u8, ext_spec, ext_start, '\n') orelse return error.InvalidRegistry;
|
||||
const ext = std.mem.trim(u8, ext_spec[ext_start..ext_end], &std.ascii.whitespace);
|
||||
|
||||
// Ignore invalid/incomplete extensions
|
||||
if (std.mem.eql(u8, ext, "{extension_name}")) continue;
|
||||
|
||||
std.debug.assert(std.mem.startsWith(u8, ext, "SPV_")); // Sanity check, all extensions should have a name like SPV_VENDOR_extension.
|
||||
|
||||
try extensions.append(try allocator.dupe(u8, ext));
|
||||
}
|
||||
}
|
||||
|
||||
return extensions.items;
|
||||
}
|
||||
|
||||
fn insertVersion(versions: *std.ArrayList(Version), version: ?[]const u8) !void {
|
||||
const ver_str = version orelse return;
|
||||
if (std.mem.eql(u8, ver_str, "None")) return;
|
||||
|
||||
const ver = try Version.parse(ver_str);
|
||||
for (versions.items) |existing_ver| {
|
||||
if (ver.eql(existing_ver)) return;
|
||||
}
|
||||
|
||||
try versions.append(ver);
|
||||
}
|
||||
|
||||
fn gatherVersions(allocator: Allocator, registry: g.CoreRegistry) ![]const Version {
|
||||
// Expected number of versions is small
|
||||
var versions = std.ArrayList(Version).init(allocator);
|
||||
|
||||
for (registry.instructions) |inst| {
|
||||
try insertVersion(&versions, inst.version);
|
||||
}
|
||||
|
||||
for (registry.operand_kinds) |opkind| {
|
||||
const enumerants = opkind.enumerants orelse continue;
|
||||
for (enumerants) |enumerant| {
|
||||
try insertVersion(&versions, enumerant.version);
|
||||
}
|
||||
}
|
||||
|
||||
std.mem.sort(Version, versions.items, {}, Version.lessThan);
|
||||
|
||||
return versions.items;
|
||||
}
|
||||
|
||||
fn usageAndExit(file: fs.File, arg0: []const u8, code: u8) noreturn {
|
||||
file.writer().print(
|
||||
\\Usage: {s} /path/git/SPIRV-Headers /path/git/SPIRV-Registry
|
||||
\\
|
||||
\\Prints to stdout Zig code which can be used to replace the file lib/std/target/spirv.zig.
|
||||
\\
|
||||
\\SPIRV-Headers can be cloned from https://github.com/KhronosGroup/SPIRV-Headers,
|
||||
\\SPIRV-Registry can be cloned from https://github.com/KhronosGroup/SPIRV-Registry.
|
||||
\\
|
||||
, .{arg0}) catch std.process.exit(1);
|
||||
std.process.exit(code);
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user