502 Commits

Author SHA1 Message Date
Jakub Konka
decc90e0e7 x64: clean up loadMemPtrIntoRegister abstraction 2022-02-28 23:20:05 +01:00
Jakub Konka
12cdb36c5b codegen: fix padding calculation for error unions when lowering
* do not track `rdi` register before `call` inst, but instead freeze
  it from further use, until `call` has been realised
* pass more error union tests
2022-02-28 23:20:05 +01:00
Jakub Konka
05431d7c4a x64: impl unwrap_errunion_payload and unwrap_errunion_err for register 2022-02-28 23:20:05 +01:00
Mitchell Hashimoto
a7ca40b281 stage2: sentinel comp during peer type resolution should use elem type
We were using the array type, not the element type. Also, we should do
the sentinel comparison after we verify that the element types of both
are compatible.
2022-02-28 16:27:16 -05:00
Veikka Tuominen
dfeffcfbf8 stage2: tuple mul/cat 2022-02-28 13:09:14 -07:00
Jakub Konka
331cc810de
Merge pull request #11012 from ziglang/x64-union-tag
stage2,x64: basic (un)tagged unions
2022-02-28 17:42:59 +01:00
Jakub Konka
16f9774d2d x64: fix switch condition mir; pass more union tests 2022-02-28 15:25:40 +01:00
Jakub Konka
a61ac9ecbf x64: fix store with ABI size > 8 on stack; pass union tests 2022-02-28 12:14:41 +01:00
Jakub Konka
90059a12e0
Merge pull request #11008 from joachimschmidt557/stage2-arm
stage2 ARM: pass more behavior tests
2022-02-28 09:59:44 +01:00
Veikka Tuominen
87dc60e8de stage2: implement builtin_call 2022-02-27 18:59:44 -05:00
Cody Tapscott
71aa5084ed stage2: Resolve alignment for union field in @TypeInfo
This also includes two other small fixes:
 - Instantiate void TypeInfo fields as void
 - Return error in `type.comptimeOnly` on unresolved comptime requirements
2022-02-27 14:24:47 -07:00
joachimschmidt557
1bf8da19e1
stage2 ARM: implement slice and array_to_slice 2022-02-27 21:38:56 +01:00
joachimschmidt557
91fbcf7093
stage2 ARM: enable more behavior tests 2022-02-27 21:38:56 +01:00
Andrew Kelley
104a8840db
Merge pull request #11002 from topolarity/comptime-int-comparison
stage2: Add comptime result for certain unsigned/comptime comparisons
2022-02-27 15:32:46 -05:00
Cody Tapscott
0bdc3d8f4e stage2: Implement @Type for Array, Optional, Float, and ErrorUnion 2022-02-27 15:29:38 -05:00
Veikka Tuominen
7a92b89a9d stage2: forward discard result loc to more expressions 2022-02-27 13:32:55 +02:00
Cody Tapscott
a7a508fcd9 stage2 sema: Implement comptime result for comparison of uint to comptime value
This adds a comptime result when comparing a comptime value to an
unsigned integer. For example:
   ( 0 <= (unsigned runtime value)) => true
   (-1 <  (unsigned runtime value)) => true
   ((unsigned runtime value) < -15) => false
2022-02-27 02:24:28 -07:00
Andrew Kelley
2687b8f7f4 stage2: implement @unionInit
The ZIR instruction `union_init_ptr` is renamed to `union_init`.
I made it always use by-value semantics for now, not taking the time to
invest in result location semantics, in case we decide to change the
rules for unions. This way is much simpler.

There is a new AIR instruction: union_init. This is for a comptime known
tag, runtime-known field value.
vector_init is renamed to aggregate_init, which solves a TODO comment.
2022-02-26 20:59:36 -07:00
Andrew Kelley
32e89a98d8 Sema: implement union value equality at comptime
Still TODO is extern unions.
2022-02-26 20:59:23 -07:00
Mitchell Hashimoto
e999a925fa
stage2: @TypeInfo for error sets (#10998) 2022-02-26 22:59:06 -05:00
Andrew Kelley
aefe4046de Sema: implement @enumToInt for unions 2022-02-26 16:53:23 -07:00
Andrew Kelley
d62229e3ad Sema: Module.Union.abiAlignment can return 0
When the union is a 0-bit type.
2022-02-26 16:53:23 -07:00
Andrew Kelley
822d29286b Sema: make align(a) T same as align(a:0:N) T
where `@sizeOf(T) == N`.
2022-02-26 16:50:35 -07:00
Andrew Kelley
e81b21a0ea
Merge pull request #10992 from mitchellh/peer-slices
stage2: peer resolve *[N]T to []T and E![]T and [*]T, handle in-memory coercion
2022-02-26 18:49:44 -05:00
Mitchell Hashimoto
156316bc7c
stage2: skip more tests for native backends 2022-02-26 13:56:50 -08:00
Joachim Schmidt
058e482247
Merge pull request #10996 from joachimschmidt557/stage2-arm
stage2 ARM: implement truncate to integers with <= 32 bits
2022-02-26 22:50:31 +01:00
Veikka Tuominen
bff7714a7c stage2: fix toAllocatedBytes on slices 2022-02-26 12:52:06 -07:00
Veikka Tuominen
ee149aaa03 stage2: actually coerce in coerce_result_ptr at comptime 2022-02-26 12:51:23 -07:00
Veikka Tuominen
315d4e8442 stage2: do not require function when evaluating typeOf
We only care about the instructions type; it will never actually be codegen'd.
2022-02-26 18:08:31 +02:00
Veikka Tuominen
ff72b8a819 stage2: evaluate TypeOf arguments in a separate scope 2022-02-26 18:08:11 +02:00
joachimschmidt557
f48f4baf67
stage2 ARM: generate correct variants of ldr instruction
When loading an i16 for example, generate ldrsh instead of ldrh
2022-02-26 13:00:01 +01:00
joachimschmidt557
8ef80cfaab
stage2 ARM: implement truncate to ints with bits <= 32 2022-02-26 12:59:57 +01:00
Mitchell Hashimoto
f0232fc07d
stage2: split up the big sentinel peer cast test to multiple
This way we can fix them one at a time.
2022-02-25 18:56:27 -08:00
Mitchell Hashimoto
943ee59bb1
stage2: *[N]T to [*]T (and vice versa) 2022-02-25 17:29:50 -08:00
Mitchell Hashimoto
e442f88b76
stage2: add other backend skips until they determine they pass 2022-02-25 17:03:49 -08:00
Mitchell Hashimoto
bcf3eb5663
stage2: another passing test 2022-02-25 13:35:36 -08:00
Mitchell Hashimoto
1019181982
stage2: *[N]T and E![]T 2022-02-25 13:33:11 -08:00
Jakub Konka
e0f5627d4a x64+aarch64: check for pointer to zero-bit type when lowering decl
Unless the pointer is a pointer to a function, if the pointee type
has zero-bits, we need to return `MCValue.none` as the `Decl` has
not been lowered to memory, and therefore, any GOT reference will be
wrong.
2022-02-25 21:59:19 +01:00
Jakub Konka
1b8ed7842c macho: redo selection of segment/section for decls and consts
* fix alignment issues for consts with natural ABI alignment not
  matching that of the `ldr` instruction in `aarch64` - solved by
  preceeding the `ldr` with an additional `add` instruction to form
  the full address before dereferencing the pointer.
* redo selection of segment/section for decls and consts based on
  combined type and value
2022-02-25 21:59:19 +01:00
Andrew Kelley
27eb42c15e Sema: implement tupleFieldVal, fix comptime elem_ptr 2022-02-24 22:28:37 -07:00
Andrew Kelley
adb746a701 stage2: improved handling of store_to_block_ptr
* AstGen: remove the setBlockBodyEliding function. This is no longer
   needed after 63788b2a511eb87974065a052e2436b0c6202544.
 * Sema: store_to_block_ptr instruction is handled as
   store_to_inferred_ptr or store, as necessary.
2022-02-24 22:28:37 -07:00
Veikka Tuominen
63788b2a51 stage2: change how stale store_to_block_ptrs are detected
Instead of explicitly setting lhs to .none,
check if the lhs instruction was analyzed.
This simpler approach also handles stores from nested blocks correctly.
2022-02-24 18:32:08 -05:00
Andrew Kelley
6249a24e81 stage2: integer-backed packed structs
This implements #10113 for the self-hosted compiler only. It removes the
ability to override alignment of packed struct fields, and removes the
ability to put pointers and arrays inside packed structs.

After this commit, nearly all the behavior tests pass for the stage2 llvm
backend that involve packed structs.

I didn't implement the compile errors or compile error tests yet. I'm
waiting until we have stage2 building itself and then I want to rework
the compile error test harness with inspiration from Vexu's arocc test
harness. At that point it should be a much nicer dev experience to work
on compile errors.
2022-02-23 23:59:25 -07:00
Mitchell Hashimoto
65c0475970 stage2: peer type resolution *[N]T and *[M]T to []const T 2022-02-24 08:50:26 +02:00
Jakub Konka
9d098318e2
Merge pull request #10977 from joachimschmidt557/stage2-aarch64
stage2 AArch64: more support for PIE targets (Mach-O)
2022-02-24 00:00:15 +01:00
Andrew Kelley
ecf56d85ef
Merge pull request #10969 from Vexu/stage2
stage2: fn typeinfo params
2022-02-23 16:10:17 -05:00
joachimschmidt557
f91fe9afb9
stage2 AArch64: more support for MCValue.got_load and direct_load 2022-02-23 21:58:13 +01:00
Evan Haas
9716a1c3ab translate-c: Add support for cast-to-union
Fixes #10955
2022-02-23 14:11:46 +02:00
Veikka Tuominen
ab4d693cfc re-enable @src behavior test 2022-02-23 10:40:46 +02:00
Veikka Tuominen
92beb2b490 stage2: misc fixes in Sema 2022-02-23 10:40:40 +02:00