Andrew Kelley
b5066fdae2
Merge pull request #11001 from Vexu/stage2
...
stage2: make formatted printing work
2022-02-27 15:29:03 -05:00
Motiejus Jakštys
c03b733f09
std.HashMap: return explicit errors ( #11000 )
...
All errors from std.HashMap are allocation errors. Mark them as
such. This is helpful when one wants to return explicit errors where
HashMap is used.
2022-02-27 15:24:00 -05:00
Veikka Tuominen
9f59189c95
stage2: do not memoize calls that can mutate comptime state
2022-02-27 16:43:53 +02:00
Veikka Tuominen
7a92b89a9d
stage2: forward discard result loc to more expressions
2022-02-27 13:32:55 +02:00
Veikka Tuominen
813f368a3c
test runner: remove unnecessary stage2 workaround
2022-02-27 12:25:50 +02:00
Veikka Tuominen
1bbca4f935
stage2: fix bitcast to optional ptr in llvm backend; omit safety check for intToPtr on optional ptr
2022-02-27 12:15:49 +02:00
Veikka Tuominen
950d840be6
stage2: use stage1 test runner for stage2
2022-02-27 11:57:12 +02:00
Veikka Tuominen
593d23c0d7
stage2: get formatted printing (somewhat) working
2022-02-27 10:05:29 +02:00
Andrew Kelley
4d658f83ed
Sema: handle error.GenericPoison in fieldVal
...
Brings us 1 crash closer to formatted printing test cases.
2022-02-26 21:47:22 -07:00
Andrew Kelley
2687b8f7f4
stage2: implement @unionInit
...
The ZIR instruction `union_init_ptr` is renamed to `union_init`.
I made it always use by-value semantics for now, not taking the time to
invest in result location semantics, in case we decide to change the
rules for unions. This way is much simpler.
There is a new AIR instruction: union_init. This is for a comptime known
tag, runtime-known field value.
vector_init is renamed to aggregate_init, which solves a TODO comment.
2022-02-26 20:59:36 -07:00
Andrew Kelley
32e89a98d8
Sema: implement union value equality at comptime
...
Still TODO is extern unions.
2022-02-26 20:59:23 -07:00
Mitchell Hashimoto
e999a925fa
stage2: @TypeInfo for error sets ( #10998 )
2022-02-26 22:59:06 -05:00
Andrew Kelley
aefe4046de
Sema: implement @enumToInt for unions
2022-02-26 16:53:23 -07:00
Andrew Kelley
d62229e3ad
Sema: Module.Union.abiAlignment can return 0
...
When the union is a 0-bit type.
2022-02-26 16:53:23 -07:00
Andrew Kelley
822d29286b
Sema: make align(a) T same as align(a:0:N) T
...
where `@sizeOf(T) == N`.
2022-02-26 16:50:35 -07:00
Andrew Kelley
e81b21a0ea
Merge pull request #10992 from mitchellh/peer-slices
...
stage2: peer resolve *[N]T to []T and E![]T and [*]T, handle in-memory coercion
2022-02-26 18:49:44 -05:00
Veikka Tuominen
bf3c88b68d
stage2: various fixes to get one test passing
...
* resolve error sets before merging them
* implement tupleFieldPtr
* make ret_ptr behave like alloc with zero sized types in llvm backend
2022-02-26 18:44:23 -05:00
Mitchell Hashimoto
156316bc7c
stage2: skip more tests for native backends
2022-02-26 13:56:50 -08:00
Joachim Schmidt
058e482247
Merge pull request #10996 from joachimschmidt557/stage2-arm
...
stage2 ARM: implement truncate to integers with <= 32 bits
2022-02-26 22:50:31 +01:00
Andrew Kelley
8349a644d0
Merge pull request #10986 from Vexu/stage2
...
stage2: actually coerce in coerce_result_ptr at comptime
2022-02-26 14:52:45 -05:00
Veikka Tuominen
bf5c055562
stage2: unify runtime and comptime coerce_result_ptr
2022-02-26 12:52:07 -07:00
Veikka Tuominen
bff7714a7c
stage2: fix toAllocatedBytes on slices
2022-02-26 12:52:06 -07:00
Veikka Tuominen
ee149aaa03
stage2: actually coerce in coerce_result_ptr at comptime
2022-02-26 12:51:23 -07:00
Andrew Kelley
b3aa1ab693
Merge pull request #10994 from Vexu/typeof-scope
...
stage2: `@TypeOf` improvements
2022-02-26 14:47:43 -05:00
Mitchell Hashimoto
a5c9e8a494
typo in comment
2022-02-26 09:33:03 -08:00
Veikka Tuominen
315d4e8442
stage2: do not require function when evaluating typeOf
...
We only care about the instructions type; it will never actually be codegen'd.
2022-02-26 18:08:31 +02:00
Veikka Tuominen
ff72b8a819
stage2: evaluate TypeOf arguments in a separate scope
2022-02-26 18:08:11 +02:00
joachimschmidt557
f48f4baf67
stage2 ARM: generate correct variants of ldr instruction
...
When loading an i16 for example, generate ldrsh instead of ldrh
2022-02-26 13:00:01 +01:00
joachimschmidt557
8ef80cfaab
stage2 ARM: implement truncate to ints with bits <= 32
2022-02-26 12:59:57 +01:00
Al Hoang
db82c1b982
add constant for haiku
...
* re-enable zig build on haiku
2022-02-26 10:53:13 +02:00
Endel Dreyer
cd9a6fed4f
fix typo on Thread's getHandle docs
2022-02-26 10:48:37 +02:00
Jakub Konka
0474943ddf
Merge pull request #10991 from ziglang/macho-pointer-rebase
2022-02-26 08:19:01 +01:00
Mitchell Hashimoto
f0232fc07d
stage2: split up the big sentinel peer cast test to multiple
...
This way we can fix them one at a time.
2022-02-25 18:56:27 -08:00
Mitchell Hashimoto
91af552f87
stage2: resolve peer types that trivially coerce
2022-02-25 18:47:10 -08:00
Mitchell Hashimoto
943ee59bb1
stage2: *[N]T to [*]T (and vice versa)
2022-02-25 17:29:50 -08:00
Mitchell Hashimoto
e442f88b76
stage2: add other backend skips until they determine they pass
2022-02-25 17:03:49 -08:00
Mitchell Hashimoto
4a6f918029
stage2: remove extranneous debug
2022-02-25 13:37:07 -08:00
Mitchell Hashimoto
bcf3eb5663
stage2: another passing test
2022-02-25 13:35:36 -08:00
Mitchell Hashimoto
1019181982
stage2: *[N]T and E![]T
2022-02-25 13:33:11 -08:00
Mitchell Hashimoto
117ef22d3c
stage2: peer resolve *[N]T to []T (and vice versa)
2022-02-25 13:21:07 -08:00
Jakub Konka
e0f5627d4a
x64+aarch64: check for pointer to zero-bit type when lowering decl
...
Unless the pointer is a pointer to a function, if the pointee type
has zero-bits, we need to return `MCValue.none` as the `Decl` has
not been lowered to memory, and therefore, any GOT reference will be
wrong.
2022-02-25 21:59:19 +01:00
Jakub Konka
4b14384989
aarch64: check if type has runtime bits before allocating mem ptr
2022-02-25 21:59:19 +01:00
Jakub Konka
1b8ed7842c
macho: redo selection of segment/section for decls and consts
...
* fix alignment issues for consts with natural ABI alignment not
matching that of the `ldr` instruction in `aarch64` - solved by
preceeding the `ldr` with an additional `add` instruction to form
the full address before dereferencing the pointer.
* redo selection of segment/section for decls and consts based on
combined type and value
2022-02-25 21:59:19 +01:00
Veikka Tuominen
bf6540ce50
Revert "stage2: make array len field type usize to match stage1"
...
This reverts commit 73bf418eb16a3e385218400cdc184f5d5e5aeaad.
2022-02-25 11:33:53 +02:00
Veikka Tuominen
73bf418eb1
stage2: make array len field type usize to match stage1
...
match stage1 behavior to avoid issues in standard library.
2022-02-25 11:25:56 +02:00
Luuk de Gram
0147eb9b58
wasm: Fix error union's size/alignment
...
Previously error unions were packed in memory. Now each 'field' is correctly
aligned to the error union's alignment.
2022-02-25 09:33:15 +01:00
Luuk de Gram
f4adb53bcf
wasm: Refactor lowerUnnamedConst
...
Rather than ping ponging between codegen and the linker to generate the symbols/atoms
for a local constant and its relocations. We now create all neccesary objects within the linker.
This simplifies the code as we can now simply call `lowerUnnamedConst` from anywhere in codegen,
allowing us to further improve lowering constants into .rodata so we do not have to sacrifice
lowering certain types such as decl_ref's where its type is a slice.
2022-02-25 09:33:15 +01:00
Andrew Kelley
27eb42c15e
Sema: implement tupleFieldVal, fix comptime elem_ptr
2022-02-24 22:28:37 -07:00
Andrew Kelley
adb746a701
stage2: improved handling of store_to_block_ptr
...
* AstGen: remove the setBlockBodyEliding function. This is no longer
needed after 63788b2a511eb87974065a052e2436b0c6202544.
* Sema: store_to_block_ptr instruction is handled as
store_to_inferred_ptr or store, as necessary.
2022-02-24 22:28:37 -07:00
protty
5d30e8016d
time: introduce Instant ( #10972 )
2022-02-24 18:51:44 -05:00
