25 Commits

Author SHA1 Message Date
Andrew Kelley
de5908548c disable failing atomicrmw test on llvm + aarch64 2022-01-18 21:25:22 -07:00
Andrew Kelley
4d05f2ae5f remove zig_is_stage2 from @import("builtin")
Instead use the standarized option for communicating the
zig compiler backend at comptime, which is `zig_backend`. This was
introduced in commit 1c24ef0d0b09a12a1fe98056f2fc04de78a82df3.
2022-01-17 21:55:49 -07:00
Andrew Kelley
b0f80ef0d5 stage2: remove use of builtin.stage2_arch workaround
The LLVM backend no longer needs this hack! However, the other backends
still do. So there are still some traces of this workaround in use for now.
2021-10-13 18:43:43 -07:00
Andrew Kelley
6115cf2240 migrate from std.Target.current to @import("builtin").target
closes #9388
closes #9321
2021-10-04 23:48:55 -07:00
Andrew Kelley
abc30f7948 stage2: improve handling of 0 bit types
* Sema: zirAtomicLoad handles 0-bit types correctly
 * LLVM backend: when lowering function types, elide parameters
   with 0-bit types.
 * Type: abiSize handles u0/i0 correctly
2021-09-20 16:48:42 -07:00
Andrew Kelley
4b2d7a9c67 stage2: implement comptime bitwise nand 2021-09-20 15:44:09 -07:00
Andrew Kelley
b9d3527e0e stage2: implement comptime @atomicRmw
* introduce float_to_int and int_to_float AIR instructionts and
   implement for the LLVM backend and C backend.
 * Sema: implement `zirIntToFloat`.
 * Sema: implement `@atomicRmw` comptime evaluation
   - introduce `storePtrVal` for when one needs to store a Value to a
     pointer which is a Value, and assert it happens at comptime.
 * Value: introduce new functionality:
   - intToFloat
   - numberAddWrap
   - numberSubWrap
   - numberMax
   - numberMin
   - bitwiseAnd
   - bitwiseNand (not implemented yet)
   - bitwiseOr
   - bitwiseXor
 * Sema: hook up `zirBitwise` to the new Value bitwise implementations
 * Type: rename `isFloat` to `isRuntimeFloat` because it returns `false`
   for `comptime_float`.
2021-09-20 14:24:43 -07:00
Andrew Kelley
9fa723ee50 stage2: implement @atomicStore 2021-09-19 15:08:38 -07:00
Andrew Kelley
b58d8aa05f stage2: improve LLVM backend for enums
* support lowering enum types and constants to LLVM IR
 * fix cmp instruction to support enum operands
2021-09-16 21:57:46 -07:00
Andrew Kelley
091a98f524 stage2: fix global variables with inferred type
Also, when a global variable does have a type, perform coercion on it.
2021-09-16 21:43:01 -07:00
Andrew Kelley
dbe9a5114e stage2: implement @setAlignStack and 128-bit cmpxchg
* test runner is improved to respect `error.SkipZigTest`
 * start code is improved to `@setAlignStack(16)` before calling main()
 * the newly passing behavior test has a workaround for the fact that
   stage2 cannot yet call `std.Target.x86.featureSetHas()` at comptime.
   This is blocking on comptime closures. The workaround is that there
   is a new decl `@import("builtin").stage2_x86_cx16` which is a `bool`.
 * Implement `@setAlignStack`. This language feature should be re-evaluated
   at some point - I'll file an issue for it.
 * LLVM backend: apply/remove the cold attribute and noinline attribute
   where appropriate.
 * LLVM backend: loads and stores are properly annotated with alignment
   and volatile attributes.
 * LLVM backend: allocas are properly annotated with alignment.
 * Type: fix integers reporting wrong alignment for 256-bit integers and
   beyond. Once you get to 16 byte aligned, there is no further
   alignment for larger integers.
2021-09-16 21:03:55 -07:00
Andrew Kelley
ab84ba39d0 move behavior test to "passing for stage2" section 2021-09-16 11:21:56 -07:00
Andrew Kelley
d5c1d24964 stage2: fix "cmpxchg with ptr" test case
* Sema: fix atomic operand checking to allow pointers.
 * LLVM backend: implement pointer-like optional constants.
 * LLVM backend: fix `is_non_null` and `optional_payload` instructions
   to support pointer-like optionals.
 * Type: introduce `isPtrAtRuntime` method.
 * Type: fix `isPtrLikeOptional` to get the correct answer for allowzero
   pointers and slices.
2021-09-15 19:55:57 -07:00
Andrew Kelley
b67d1810be stage2: implement @atomicRmw and @atomicLoad
* langref: add some more "see also" links for atomics
 * Add the following AIR instructions
   - atomic_load
   - atomic_store_unordered
   - atomic_store_monotonic
   - atomic_store_release
   - atomic_store_seq_cst
   - atomic_rmw
 * Implement those AIR instructions in LLVM and C backends.
 * AstGen: make the `ty` result locations for `@atomicRmw`, `@atomicLoad`,
   and `@atomicStore` be `coerced_ty` to avoid unnecessary ZIR
   instructions when Sema will be doing the coercions redundantly.
 * Sema for `@atomicLoad` and `@atomicRmw` is done, however Sema for
   `@atomicStore` is not yet implemented.
   - comptime eval for `@atomicRmw` is not yet implemented.
 * Sema: flesh out `coerceInMemoryAllowed` a little bit more. It can now
   handle pointers.
2021-09-15 19:00:35 -07:00
Andrew Kelley
19691c0b17 stage2: implement @fence 2021-09-15 12:37:32 -07:00
Andrew Kelley
0395b35cee stage2: implement cmpxchg and improve comptime eval
* Implement Sema for `@cmpxchgWeak` and `@cmpxchgStrong`. Both runtime
   and comptime codepaths are implement.
 * Implement Codegen for LLVM backend and C backend.
 * Add LazySrcLoc.node_offset_builtin_call_argX 3...5
 * Sema: rework comptime control flow.
   - `error.ComptimeReturn` is used to signal that a comptime function
     call has returned a result (stored in the Inlining struct).
     `analyzeCall` notices this and handles the result.
   - The ZIR instructions `break_inline`, `block_inline`,
     `condbr_inline` are now redundant and can be deleted. `break`,
     `block`, and `condbr` function equivalently inside a comptime scope.
   - The ZIR instructions `loop` and `repeat` also are modified to
     directly perform comptime control flow inside a comptime scope,
     skipping an unnecessary mechanism for analysis of runtime code.
     This makes Zig perform closer to an interpreter when evaluating
     comptime code.
 * Sema: zirRetErrValue looks at Sema.ret_fn_ty rather than sema.func
   for adding to the inferred error set. This fixes a bug for
    inlined/comptime function calls.
 * Implement ZIR printing for cmpxchg.
 * stage1: make cmpxchg respect --single-threaded
   - Our LLVM C++ API wrapper failed to expose this boolean flag before.
 * Fix AIR printing for struct fields showing incorrect liveness data.
2021-09-14 21:58:22 -07:00
Andrew Kelley
264acfdf3c stage2: fix incorrect spelling of AtomicOrder 2021-09-13 22:01:40 -07:00
FnControlOption
f91782c6d1 Skip 128-bit cmpxchg test if CMPXCHG16B is not supported 2021-08-08 09:21:30 -07:00
FnControlOption
d19e1709b3 Re-enable 128-bit cmpxchg test 2021-08-07 12:22:10 -07:00
Jacob G-W
641ecc260f std, src, doc, test: remove unused variables 2021-06-21 17:03:03 -07:00
LemonBoy
d3fb9f9532 stage1: Fix for atomicrmw xchg on fp types
Bitcast the pointer and operands to integer types having the same size,
working around LLVM inability to lower a LL/SC operation when the
operands have floating-point types (and are reasonably sized).

Closes #4457
2021-05-28 19:18:42 -04:00
Andrew Kelley
597082adf4 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * build.zig
 * src/Compilation.zig
 * src/codegen/spirv/spec.zig
 * src/link/SpirV.zig
 * test/stage2/darwin.zig
   - this one might be problematic; start.zig looks for `main` in the
     root source file, not `_main`. Not sure why there is an underscore
     there in master branch.
2021-05-15 21:44:38 -07:00
Andrew Kelley
5619ce2406 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * doc/langref.html.in
 * lib/std/enums.zig
 * lib/std/fmt.zig
 * lib/std/hash/auto_hash.zig
 * lib/std/math.zig
 * lib/std/mem.zig
 * lib/std/meta.zig
 * test/behavior/alignof.zig
 * test/behavior/bitcast.zig
 * test/behavior/bugs/1421.zig
 * test/behavior/cast.zig
 * test/behavior/ptrcast.zig
 * test/behavior/type_info.zig
 * test/behavior/vector.zig

Master branch added `try` to a bunch of testing function calls, and some
lines also had changed how to refer to the native architecture and other
`@import("builtin")` stuff.
2021-05-08 14:45:21 -07:00
Andrew Kelley
b6bb0ee1ac Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * lib/std/os/linux/tls.zig
 * test/behavior/align.zig
 * test/behavior/atomics.zig
 * test/behavior/vector.zig
2021-05-08 10:53:22 -07:00
Andrew Kelley
4307436b99 move behavior tests from test/stage1/ to test/
And fix test cases to make them pass. This is in preparation for
starting to pass behavior tests with self-hosted.
2021-04-29 15:54:04 -07:00