295 Commits

Author SHA1 Message Date
mlugg
457c94d353
compiler: implement @branchHint, replacing @setCold
Implements the accepted proposal to introduce `@branchHint`. This
builtin is permitted as the first statement of a block if that block is
the direct body of any of the following:

* a function (*not* a `test`)
* either branch of an `if`
* the RHS of a `catch` or `orelse`
* a `switch` prong
* an `or` or `and` expression

It lowers to the ZIR instruction `extended(branch_hint(...))`. When Sema
encounters this instruction, it sets `sema.branch_hint` appropriately,
and `zirCondBr` etc are expected to reset this value as necessary. The
state is on `Sema` rather than `Block` to make it automatically
propagate up non-conditional blocks without special handling. If
`@panic` is reached, the branch hint is set to `.cold` if none was
already set; similarly, error branches get a hint of `.unlikely` if no
hint is explicitly provided. If a condition is comptime-known, `cold`
hints from the taken branch are allowed to propagate up, but other hints
are discarded. This is because a `likely`/`unlikely` hint just indicates
the direction this branch is likely to go, which is redundant
information when the branch is known at comptime; but `cold` hints
indicate that control flow is unlikely to ever reach this branch,
meaning if the branch is always taken from its parent, then the parent
is also unlikely to ever be reached.

This branch information is stored in AIR `cond_br` and `switch_br`. In
addition, `try` and `try_ptr` instructions have variants `try_cold` and
`try_ptr_cold` which indicate that the error case is cold (rather than
just unlikely); this is reachable through e.g. `errdefer unreachable` or
`errdefer @panic("")`.

A new API `unwrapSwitch` is introduced to `Air` to make it more
convenient to access `switch_br` instructions. In time, I plan to update
all AIR instructions to be accessed via an `unwrap` method which returns
a convenient tagged union a la `InternPool.indexToKey`.

The LLVM backend lowers branch hints for conditional branches and
switches as follows:

* If any branch is marked `unpredictable`, the instruction is marked
  `!unpredictable`.
* Any branch which is marked as `cold` gets a
  `llvm.assume(i1 true) [ "cold"() ]` call to mark the code path cold.
* If any branch is marked `likely` or `unlikely`, branch weight metadata
  is attached with `!prof`. Likely branches get a weight of 2000, and
  unlikely branches a weight of 1. In `switch` statements, un-annotated
  branches get a weight of 1000 as a "middle ground" hint, since there
  could be likely *and* unlikely *and* un-annotated branches.

For functions, a `cold` hint corresponds to the `cold` function
attribute, and other hints are currently ignored -- as far as I can tell
LLVM doesn't really have a way to lower them. (Ideally, we would want
the branch hint given in the function to propagate to call sites.)

The compiler and standard library do not yet use this new builtin.

Resolves: #21148
2024-08-27 00:41:49 +01:00
John Benediktsson
4adb10df47 std.builtin: removing unused arena allocator in StackTrace.format 2024-08-22 21:23:53 -07:00
John Benediktsson
c690537154 std.debug: remove allocator from std.debug.writeStackTrace() 2024-08-22 21:23:53 -07:00
Andrew Kelley
cf87a1a7cf language: add module name field to @src
closes #20963
2024-08-08 07:47:14 -07:00
Alex Rønne Petersen
c8ca05e93a
std.Target: Remove sparcel architecture tag.
What is `sparcel`, you might ask? Good question!

If you take a peek in the SPARC v8 manual, §2.2, it is quite explicit that SPARC
v8 is a big-endian architecture. No little-endian or mixed-endian support to be
found here.

On the other hand, the SPARC v9 manual, in §3.2.1.2, states that it has support
for mixed-endian operation, with big-endian mode being the default.

Ok, so `sparcel` must just be referring to SPARC v9 running in little-endian
mode, surely?

Nope:

* 40b4fd7a3e/llvm/lib/Target/Sparc/SparcTargetMachine.cpp (L226)
* 40b4fd7a3e/llvm/lib/Target/Sparc/SparcTargetMachine.cpp (L104)

So, `sparcel` in LLVM is referring to some sort of fantastical little-endian
SPARC v8 architecture. I've scoured the internet and I can find absolutely no
evidence that such a thing exists or has ever existed. In fact, I can find no
evidence that a little-endian implementation of SPARC v9 ever existed, either.
Or any SPARC version, actually!

The support was added here: https://reviews.llvm.org/D8741

Notably, there is no mention whatsoever of what CPU this might be referring to,
and no justification given for the "but some are little" comment added in the
patch.

My best guess is that this might have been some private exercise in creating a
little-endian version of SPARC that never saw the light of day. Given that SPARC
v8 explicitly doesn't support little-endian operation (let alone little-endian
instruction encoding!), and no CPU is known to be implemented as such, I think
it's very reasonable for us to just remove this support.
2024-07-30 06:30:25 +02:00
David Rubin
c78ebeb44c
riscv: implement ptr_slice_ptr_ptr
just one step closer to allocation
2024-07-26 04:05:40 -07:00
David Rubin
8d30fc45c4
riscv: implement more operators
we can run `std.debug.print` now, with both run-time strings and integers!
2024-07-26 04:05:39 -07:00
Yusuf Bham
22d964fe22 std.builtin.panic(uefi): stack allocate panic message
In the case that the allocator is unavailable (OOM, etc.), we can
possibly still output the panic message - so now we stack allocate the
message and copy it to the exit data for passing to boot services.
2024-07-22 16:23:10 +03:00
Yusuf Bham
c16aeda8a6 std.builtin.panic(uefi): also output to con_out 2024-07-22 16:23:10 +03:00
David Rubin
d19b77d63f riscv: back to hello world panics 2024-05-11 02:17:11 -07:00
David Rubin
6740c1f084 riscv: big rewrite to use latest liveness
this one is even harder to document then the last large overhaul.

TLDR;
- split apart Emit.zig into an Emit.zig and a Lower.zig
- created seperate files for the encoding, and now adding a new instruction
is as simple as just adding it to a couple of switch statements and providing the encoding.
- relocs are handled in a more sane maner, and we have a clear defining boundary between
lea_symbol and load_symbol now.
- a lot of different abstractions for things like the stack, memory, registers, and others.
- we're using x86_64's FrameIndex now, which simplifies a lot of the tougher design process.
- a lot more that I don't have the energy to document. at this point, just read the commit itself :p
2024-05-11 02:17:11 -07:00
David Rubin
3bf008a3d0 riscv: implement slices 2024-05-11 02:17:11 -07:00
David Rubin
350ad90cee riscv: totally rewrite how we do loads and stores
this commit is a little too large to document fully, however the main gist of it this

- finish the `genInlineMemcpy` implement
- rename `setValue` to `genCopy` as I agree with jacob that it's a better name
- add in `genVarDbgInfo` for a better gdb experience
- follow the x86_64's method for genCall, as the procedure is very similar for us
- add `airSliceLen` as it's trivial
- change up the `airAddWithOverflow implementation a bit
- make sure to not spill of the elem_ty is 0 size
- correctly follow the RISC-V calling convention and spill the used calle saved registers in the prologue
and restore them in the epilogue
- add `address`, `deref`, and `offset` helper functions for MCValue. I must say I love these,
they make the code very readable and super verbose :)
- fix a `register_manager.zig` issue where when using the last register in the set, the value would overflow at comptime.
was happening because we were adding to `max_id` before subtracting from it.
2024-05-11 02:17:11 -07:00
David Rubin
cbf62bd6dc riscv: switch default_panic to use the message 2024-05-11 02:17:11 -07:00
David Rubin
685f828218 riscv: add a custom panic function
this provides a much better indication of when we are having a controlled panic with an error message
or when we are actually segfaulting, as before the `trap` as causing a segfault.
2024-05-11 02:17:11 -07:00
David Rubin
2be3033acd riscv: implement basic branching
we use a code offset map in Emit.zig to pre-compute what byte offset each MIR instruction is at. this is important because they can be
of different size
2024-05-11 02:17:11 -07:00
David Rubin
28df64cba4 riscv: implement @abs
- add the `abs` MIR instruction
- implement `@abs` by shifting to the right by `bits - 1`, and xoring.
2024-05-11 02:17:11 -07:00
David Rubin
dceff2592f riscv: initial cleanup and work 2024-05-11 02:17:11 -07:00
Jakub Konka
2e1fc0dd14 handle visionos target OS tag in the compiler
* rename .xros to .visionos as agreed in the tracking issue
* add support for VisionOS platform in the MachO linker
2024-05-09 15:04:15 +02:00
Andrew Kelley
cd62005f19 extract std.posix from std.os
closes #5019
2024-03-19 11:45:09 -07:00
Jacob Young
d10c52c194 AstGen: disallow alignment on function types
A pointer type already has an alignment, so this information does not
need to be duplicated on the function type.  This already has precedence
with addrspace which is already disallowed on function types for this
reason.  Also fixes `@TypeOf(&func)` to have the correct addrspace and
alignment.
2024-03-17 03:06:17 +01:00
Tristan Ross
6067d39522
std.builtin: make atomic order fields lowercase 2024-03-11 07:09:10 -07:00
Tristan Ross
c260b4c753
std.builtin: make global linkage fields lowercase 2024-03-11 07:09:10 -07:00
Tristan Ross
aab84a3dec
std.builtin: make float mode fields lowercase 2024-03-11 07:09:10 -07:00
Tristan Ross
9d70d614ae
std.builtin: make link mode fields lowercase 2024-03-11 07:09:10 -07:00
Tristan Ross
099f3c4039
std.builtin: make container layout fields lowercase 2024-03-11 07:09:07 -07:00
Andrew Kelley
aa852f737b improve documentation in std
A lot of these "shorthand" doc comments were redundant, low quality
filler content. Better to let the actual modules speak for themselves
with top level doc comments rather than trying to document their
aliases.
2024-03-10 18:13:30 -07:00
Jakub Konka
d12c8db642
Merge pull request #18875 from ziglang/macho-zo-dwarf
macho: emit DWARF for ZigObject relocatable
2024-02-09 23:12:04 +01:00
Andrew Kelley
54bbc73f85
Merge pull request #18712 from Vexu/std.options
std: make options a struct instance instead of a namespace
2024-02-09 13:38:42 -08:00
Jakub Konka
32386a06ca builtin: enable panic handler on self-hosted macho
comp: toggle compiler-rt and zig-libc caps for macho
2024-02-08 23:51:21 +01:00
Ali Chraghi
afa7793351 spirv: basic shader support 2024-02-05 11:55:14 +03:30
Veikka Tuominen
a4f27e8987 remove std.io.Mode 2024-02-01 15:22:36 +02:00
Andrew Kelley
ce7c66e2d0 langref: make more consistent
* moves some langref into std.builtin doc comments
* use the same way of referencing stuff from std.builtin

closes #16483
2024-01-21 20:39:50 -07:00
Carl Åstholm
a02bd81760 Make @typeInfo return null-terminated strings
Changes the types of `std.builtin.Type` `name` fields from `[]const u8`
to `[:0]const u8`, which should make them easier to pass to C APIs
expecting null-terminated strings.

This will break code that reifies types using `[]const u8` strings, such
as code that uses `std.mem.tokenize()` to construct types from strings
at comptime. Luckily, the fix is simple: simply concatenate the
`[]const u8` string with an empty string literal (`name ++ ""`) to
explicitly coerce it to `[:0]const u8`.

Co-authored-by: Krzysztof Wolicki <der.teufel.mail@gmail.com>
2024-01-07 15:35:18 +01:00
mlugg
51595d6b75
lib: correct unnecessary uses of 'var' 2023-11-19 09:55:07 +00:00
Andrew Kelley
3fc6fc6812 std.builtin.Endian: make the tags lower case
Let's take this breaking change opportunity to fix the style of this
enum.
2023-10-31 21:37:35 -04:00
Jacob Young
868d592580 builtin: implement default_panic for plan9
Also disable default panic handler when not using elf.
2023-10-25 08:20:11 -04:00
Jacob Young
b55377a5ab x86_64: pass more tests
* 128-bit integer multiplication with overflow
 * more instruction encodings used by std inline asm
 * implement the `try_ptr` air instruction
 * follow correct stack frame abi
 * enable full panic handler
 * enable stack traces
2023-10-25 04:28:30 -04:00
Andrew Kelley
a31748b29e std.os.uefi: reorganize namespaces
This is a breaking change.

This commit applies the following rules to std.os.uefi:
* avoid redundant names in the namespace such as "protocol.FooProtocol"
* don't initialize struct field to undefined. do that at the
  initialization site if you want that, or create a named constant that
  sets all the fields to undefined.
* avoid the word "data", "info", "context", "state", "details", or
  "config" in the type name, especially if a word from that category is
  already in the type name.
* embrace tree structure

After following these rules, `usingnamespace` disappeared naturally.
This commit eliminates 26/53 (49%) instances of `usingnamespace` in the
standard library. All these uses were due to not understanding how
to properly use namespaces.

I did not test this commit. The standard library UEFI code is
experimental and pull requests have been accepted with minimal vetting.
Users of std.os.uefi will need to submit follow-up pull requests to fix
up whatever regressions this commit introduces, this time without
abusing namespaces (pun intended).
2023-08-24 22:38:47 -07:00
Jacob Young
228c956377 std: finish cleanup up asm
This also required implementing the necessary syntax in the x86_64 backend.
2023-07-31 03:49:21 -04:00
Jacob G-W
3c08fe931a make @typeInfo not return private decls
fixes #10731
Thanks @nektro for previous work in #14878

This change creates a small breaking change:
It removes the `is_pub` field of a decl in `@typeInfo`
2023-07-25 16:19:08 -07:00
Andrew Kelley
660955c0d6
Merge pull request #15775 from r00ster91/newlines
remove some newlines and other minor cleanups
2023-07-11 23:06:12 -07:00
Andrew Kelley
afc5edabe0
Merge pull request #16287 from Snektron/amdgpu-panic-fix
Some amdgcn fixes
2023-07-01 22:04:06 -07:00
Robin Voetter
a1b583dc24
std: make panic and abort for amdhsa call trap 2023-07-01 21:23:45 +02:00
Robin Voetter
74f40ddd11
spirv: enable simplified default panic handler
SPIR-V cannot print, so we cannot yet use the fancy default
panic handler. Instead we will just use the infinite loop
one for now.
2023-07-01 14:27:57 +02:00
r00ster91
2463f4df77 addrspace: small cleanups 2023-06-27 19:50:17 -04:00
r00ster91
40e002ae2b std.builtin.StackTrace: don't print extra newline after stack trace 2023-06-27 19:49:54 -04:00
mlugg
f26dda2117 all: migrate code to new cast builtin syntax
Most of this migration was performed automatically with `zig fmt`. There
were a few exceptions which I had to manually fix:

* `@alignCast` and `@addrSpaceCast` cannot be automatically rewritten
* `@truncate`'s fixup is incorrect for vectors
* Test cases are not formatted, and their error locations change
2023-06-24 16:56:39 -07:00
r00ster91
6e84f46990 std: replace builtin.Version with SemanticVersion 2023-06-17 13:17:34 -07:00
Eric Joldasov
4936453d56
std.builtin: remove TypeInfo and Type.FnArg (deprecated in 0.10)
Followup to d3d24874c91054a70c706fed47278c81c9ce890a.
Signed-off-by: Eric Joldasov <bratishkaerik@getgoogleoff.me>
2023-06-13 23:46:58 +06:00