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riscv: add a custom panic function
this provides a much better indication of when we are having a controlled panic with an error message or when we are actually segfaulting, as before the `trap` as causing a segfault.
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@ -767,13 +767,31 @@ pub fn default_panic(msg: []const u8, error_return_trace: ?*StackTrace, ret_addr
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builtin.zig_backend == .stage2_x86 or
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(builtin.zig_backend == .stage2_x86_64 and (builtin.target.ofmt != .elf and builtin.target.ofmt != .macho)) or
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builtin.zig_backend == .stage2_sparc64 or
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builtin.zig_backend == .stage2_spirv64 or
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builtin.zig_backend == .stage2_riscv64)
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builtin.zig_backend == .stage2_spirv64)
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{
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while (true) {
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@breakpoint();
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}
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}
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if (builtin.zig_backend == .stage2_riscv64) {
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asm volatile ("ecall"
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:
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: [number] "{a7}" (64),
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[arg1] "{a0}" (1),
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[arg2] "{a1}" (@intFromPtr("panicking!\n")),
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[arg3] "{a2}" ("panicking!\n".len),
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: "rcx", "r11", "memory"
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);
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asm volatile ("ecall"
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:
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: [number] "{a7}" (94),
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[arg1] "{a0}" (127),
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: "rcx", "r11", "memory"
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);
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unreachable;
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}
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switch (builtin.os.tag) {
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.freestanding => {
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while (true) {
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@ -526,7 +526,7 @@ pub fn backendSupportsFeature(
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feature: Feature,
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) bool {
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return switch (feature) {
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.panic_fn => ofmt == .c or use_llvm or cpu_arch == .x86_64,
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.panic_fn => ofmt == .c or use_llvm or cpu_arch == .x86_64 or cpu_arch == .riscv64,
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.panic_unwrap_error => ofmt == .c or use_llvm,
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.safety_check_formatted => ofmt == .c or use_llvm,
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.error_return_trace => use_llvm,
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