26 Commits

Author	SHA1	Message	Date
Veikka Tuominen	42a95197f3	update usage of std.testing in stage2	2021-05-08 15:15:30 +03:00
joachimschmidt557	d7a89f9876	stage2 AArch64: Add conditional branch instructions	2021-04-08 13:39:11 -07:00
joachimschmidt557	43d364afef	stage2 AArch64: Add ldrh and ldrb instructions	2021-04-02 14:46:30 -07:00
joachimschmidt557	e088a17f56	stage2 AArch64: implement strb and strh	2021-03-31 23:26:49 +02:00
Jakub Konka	d484b3b3cb	zld: use aarch64 for opcodes	2021-03-17 19:59:13 +01:00
LemonBoy	134f5fd3d6	std: Update test "" to test where it makes sense	2021-01-22 15:46:58 +01:00
joachimschmidt557	ea6f3e3fd1	stage2 AArch64: add add/subtract (immediate) instructions	2021-01-17 22:40:14 +01:00
Jakub Konka	b25cf7db02	stage2 aarch64: add basic function pro/epilogue ... Fix typo in `nop` implementation. Simplify `aarch64` macOS tests.	2021-01-17 14:57:53 +01:00
joachimschmidt557	fbd5fbe729	stage2 AArch64: add very basic return values	2021-01-16 12:05:38 -08:00
joachimschmidt557	c5ec096b2f	stage2 AArch64: add logical (shifted register) instructions	2021-01-01 14:43:12 -08:00
Jakub Konka	2082c27557	stage2+aarch64: clean up offset helper structs	2020-12-09 17:21:21 +01:00
Jakub Konka	e91dbab256	stage2+aarch64: fix stage2 tests	2020-12-09 17:21:17 +01:00
Jakub Konka	21dae538ca	stage2+aarch64: add load and store pair of registers instructions	2020-12-09 17:20:14 +01:00
Jakub Konka	c749b78df5	stage2 macho: add orr and orn instructions	2020-11-26 11:50:09 +01:00
Jakub Konka	39336fd2e9	stage2 aarch64: assert register is 64bits in PCrel ... Thanks @joachimschmidt557 for pointing out this fix!	2020-11-18 10:12:39 +01:00
Jakub Konka	5ff8dd179e	stage2 aarch64: add PC relative address instructions	2020-11-18 08:46:52 +01:00
Jakub Konka	8f47e8feb6	stage2 aarch64: add NOP instruction	2020-11-16 13:37:38 -08:00
Jakub Konka	f512676d0b	stage2 aarch64: add str instruction	2020-11-11 14:34:53 +01:00
Jakub Konka	f1960302d1	stage2 aarch64: add ldr instruction + smoke tests	2020-11-11 14:34:53 +01:00
joachimschmidt557	aa9df72f71	stage2 AArch64: MoveWideImmediate instructions + test coverage	2020-11-11 14:34:53 +01:00
joachimschmidt557	4c8f69241a	stage2 aarch64: add more instructions	2020-11-11 14:34:53 +01:00
joachimschmidt557	3c75d723ac	stage2 aarch64: add codegen/aarch64.zig	2020-11-11 14:34:53 +01:00
Jakub Konka	4ef6864a15	Add move wide with zero (movz) instruction	2020-11-11 14:34:53 +01:00
Jakub Konka	68bb1e91aa	Add testcase for serializing svc #0x80	2020-11-11 14:34:53 +01:00
Jakub Konka	d542e88706	Implement genAsm on aarch64 ... Add remaining PCS info: param and return registers in procedure calls.	2020-11-11 14:34:53 +01:00
joachimschmidt557	5ad501c00b	stage2 aarch64: add codegen/aarch64.zig	2020-11-11 14:34:53 +01:00