6865 Commits

Author SHA1 Message Date
Robin Voetter
84876fec58 stage2: remove ptr_ptr_elem_val and ptr_slice_elem_val 2021-10-21 16:24:18 +02:00
Robin Voetter
1d33822020 stage2: forbid double dereference in Sema.elemVal 2021-10-21 16:24:18 +02:00
Andrew Kelley
a0e195120d stage2: implement slicing
* New AIR instruction: slice, which constructs a slice out of a pointer
   and a length.
 * AstGen: use `coerced_ty` for start and end expressions, use `none`
   for the sentinel, and don't try to load the result of the slice
   operation because it returns a by-value result.
 * Sema: pointer arithmetic is extracted into analyzePointerArithmetic
   and it is used by the implementation of slice.
   - Also I implemented comptime pointer addition.
 * Sema: extract logic into analyzeSlicePtr, analyzeSliceLen and use them
   inside the slice semantic analysis.
   - The approach in stage2 is much cleaner than stage1 because it uses
     more granular analysis calls for obtaining the slice pointer, doing
     arithmetic on it, and checking if the length is comptime-known.
 * Sema: use the slice Value Tag for slices when doing coercion from
   pointer-to-array.
 * LLVM backend: detect when emitting a GEP instruction into a
   pointer-to-array and add the extra index that is required.
 * Type: ptrAlignment for c_void returns 0.
 * Implement Value.hash and Value.eql for slices.
 * Remove accidentally duplicated behavior test.
2021-10-20 21:45:11 -07:00
Andrew Kelley
3b2e25ed87 Sema: fix missing copy in array multiplication
lead to a Use-After-Free in backend codgen
2021-10-20 17:02:15 -07:00
Andrew Kelley
8b734380f9 stage2: LLVM backend: fix decls sometimes not marked alive
Without this they could get incorrectly garbage collected.
2021-10-20 16:42:43 -07:00
Andrew Kelley
c8ded2f9c9 stage2: implement big int to float conversion 2021-10-20 16:41:08 -07:00
Andrew Kelley
4cb5fed10b AstGen: make the index variable of inline for a alloc_comptime
Before it was being emitted as an `alloc` which caused inline for loops
to not work correctly.
2021-10-20 15:34:10 -07:00
Andrew Kelley
361217bda2 stage2: fix inline assembly with expression output
Thanks @g-w1 for the print_air.zig implementation for inline assembly. I
copied it and slightly modified it from your open pull request.
2021-10-20 15:34:10 -07:00
Stéphan Kochen
d949180ab0 translate-c: create inline fn for always_inline 2021-10-20 17:58:30 -04:00
Andrew Kelley
ed2a5081e1 stage2: LLVM backend: implement switch_br 2021-10-20 14:10:37 -07:00
Andrew Kelley
dfb3231959 stage2: implement switching on unions
* AstGen: Move `refToIndex` and `indexToRef` to Zir
 * ZIR: the switch_block_*_* instruction tags are collapsed into one
   switch_block tag which uses 4 bits for flags, and reduces the
   scalar_cases_len field from 32 to 28 bits.
   This freed up more ZIR tags, 2 of which are now used for
   `switch_cond` and `switch_cond_ref` for producing the switch
   condition value. For example, for union values it returns the
   corresponding enum value.
 * switching with multiple cases and ranges is not yet supported because
   I want to change the ZIR encoding to store index pointers into the
   extra array rather than storing prong indexes. This will avoid O(N^2)
   iteration over prongs.
 * AstGen now adds a `switch_cond` on the operand and then passes the
   result of that to the `switch_block` instruction.
 * Sema: partially implement `switch_capture_*` instructions.
 * Sema: `unionToTag` notices if the enum type has only one possible value.
2021-10-19 20:22:47 -07:00
Andrew Kelley
c1508c98f4 stage2 minor cleanups 2021-10-19 19:38:43 -07:00
Andrew Kelley
2192d404d5 stage2: wasm: implement struct_field_val 2021-10-19 19:20:31 -07:00
Andrew Kelley
e4c437f23b stage2: implement union member access as enum tag 2021-10-19 19:03:20 -07:00
Robin Voetter
6329f4e47a stage2: union field value 2021-10-20 03:44:02 +02:00
Robin Voetter
d6f048c456 stage2: make (typeHas)OnePossibleValue return the right value 2021-10-20 03:44:02 +02:00
Robin Voetter
7b97f6792f stage2: add Value.the_only_possible_value 2021-10-20 03:44:02 +02:00
Robin Voetter
b65582e834 stage2: remove AstGen none_or_ref
The remaining uses of this result location were causing a bunch of errors
problems where the pointers returned from rvalue and lvalue expressions
would be confused, allowing for extra pointers on rvalue expressions.
For example:
```zig
const X = struct {a: i32};
var x: X = .{.a = 1};
var ptr = &x;
_ = x.a;
```
In the last line, the lookup of x with result location .none_or_ref would
return a double pointer (**X). This would be dereferenced one, after which
a relative pointer to `a` would be fetched and derefenced to get the final
result.

However, this also allows us to manually construct a double pointer, and
fetch the field of the inner type of that:
```zig
_ = &(&(x)).a;
```

This problem also manifests itself with element access. There are two obvious
ways to fix the problem, both of which include replacing the usage of
.none_or_ref for field- and element accesses with something which
deterministically produce either a pointer or value: either result location
.ref or .none. In the former case, this would be paired with .elem_ptr, and
in the latter case with .elem_val.

Note that the stage 1 compiler does not have this problem, because there is
no equivalent of .elem_val and .field_val. In this way it is equivalent to
using the result location .ref for field- and element accesses.

In this case i have used .none, as this matches language behaviour more
closely.
2021-10-20 03:44:02 +02:00
Robin Voetter
bfedf40c92 stage2: zirIndexablePtrLen for non-pointer types 2021-10-20 03:44:02 +02:00
Robin Voetter
c507e0b763 stage2: Sema.fieldPtr for slice ptr and len 2021-10-20 03:44:02 +02:00
Robin Voetter
05c5c99a95 stage2: air ptr_slice_len_ptr and ptr_slice_ptr_ptr 2021-10-20 03:44:02 +02:00
Robin Voetter
e5d6fe18b9 stage2: restructure Sema.fieldVal and sema.fieldPtr
Dereferencing single pointers is now handled outside of the main switch,
which allows deduplication of some cases. This also implements the
relevant operations for pointers to types and pointers to slices.
2021-10-20 03:44:02 +02:00
Jakub Konka
372e9709ad macho: fix LLVM codepaths in self-hosted linker
* do not add linkage scope to aliased exported symbols - this is
  not respected on macOS
* special-case `MachO.openPath` in `link.File.openPath` as on macOS
  we always link with zld
* redirect to `MachO.flushObject` when linking relocatable objects
  in MachO linker whereas move the entire linking logic into
  `MachO.flushModule`
2021-10-19 20:39:42 +02:00
Matthew Borkowski
2d7b55aa0a translate_c: prevent a while under an if from stealing the else 2021-10-19 13:48:09 -04:00
Matthew Borkowski
135cb529de astgen.zig: fix emitting wrong error unwrapping instructions in tryExpr 2021-10-19 13:44:48 -04:00
Sizhe Zhao
ec3ed92f48 src/link/C/zig.h: Fix indent 2021-10-19 13:43:32 -04:00
Andrew Kelley
bea447a637 stage2: fix coercion of error set to error union
When returning an error set or an error union from a function which has
an inferred error set, it populates the error names in addition to the
set of functions. This can have false negatives, meaning that after
checking the map of an unresolved error set, one must do full error set
resolution before emitting a compile error.
2021-10-18 15:45:11 -07:00
Andrew Kelley
75c8c4442d coff linking: honor the link_libunwind flag 2021-10-18 10:49:39 -07:00
Matthew Borkowski
79a3dfcfd8 astgen.zig: fix false positive in breakExpr's checking for store_to_block_ptr 2021-10-18 13:18:47 -04:00
Andrew Kelley
7b00bef6bf Sema: resolveTypeFields before accessing type fields 2021-10-17 21:53:59 -07:00
Meghan Denny
0ef2e2520a stage2: implement @hasField
struct and union are kept in stage1 because struct/unionFieldCount are returning zero
2021-10-17 21:42:22 -07:00
Andrew Kelley
40cbf525f7 stage2: implement coercion from null to C pointer 2021-10-17 19:10:49 -07:00
Andrew Kelley
e5dac0a0b3 stage2: implement @embedFile 2021-10-17 18:59:11 -07:00
Andrew Kelley
ad17108bdd
Merge pull request #9960 from Snektron/bit-not
Some not and vector stuff
2021-10-17 21:59:10 -04:00
Andrew Kelley
e9d1e5e533 stage2: LLVM backend: lower constant field/elem ptrs 2021-10-17 17:02:20 -07:00
Andrew Kelley
07691db3ae stage2: fix handling of error unions as return type
* LLVM backend: fix phi instruction not respecting `isByRef`
   - Also fix `is_non_null` not respecting `isByRef`
 * Type: implement abiSize for error unions
2021-10-17 15:36:12 -07:00
Andrew Kelley
6534f2ef4f stage2: implement error wrapping
* Sema: fix returned operands not coercing to the function return type
   in some cases.
   - When returning an error or an error union from a function with an
     inferred error set, it will now populate the inferred error set.
   - Implement error set coercion for the common case of inferred error
     set to inferred error set, without forcing a full resolution.
 * LLVM backend: update instruction lowering that handles error unions
   to respect `isByRef`.
   - Also implement `wrap_err_union_err`.
2021-10-17 14:55:32 -07:00
Robin Voetter
d004ef2e5d stage2: make zirBoolNot return undefined when argument is undefined 2021-10-17 20:33:04 +02:00
Robin Voetter
fd838584bf stage2: vector constants 2021-10-17 20:33:04 +02:00
Robin Voetter
d193ba9843 stage2: array->vector coercion 2021-10-17 20:33:04 +02:00
Robin Voetter
9336a87452 stage2: bitNot 2021-10-17 20:33:04 +02:00
Andrew Kelley
127cd06ba1 stage2: add haveFieldTypes() assertions
This will help with contributions such as #9966.
2021-10-17 10:59:40 -07:00
Andrew Kelley
fdd11f6cee Sema: coercion from error sets to anyerror 2021-10-16 12:41:03 -07:00
Andrew Kelley
4d6d6977b0 stage2: fixes to extern variables
* Relax compile error for "unable to export type foo" to allow
   integers, structs, arrays, and floats. This will need to be further
   improved to do the same checks as we do for C ABI struct field types.
 * LLVM backend: fix extern variables
 * LLVM backend: implement AIR instruction `wrap_err_union_payload`
2021-10-16 12:26:06 -07:00
Robin Voetter
f6bf24b2f3 stage2: comptime saturating shl 2021-10-16 11:32:05 +02:00
Andrew Kelley
682cdeceaa stage2: optional comparison and 0-bit payloads
* Sema: implement peer type resolution for optionals and null.
 * Rename `Module.optionalType` to `Type.optional`.
 * LLVM backend: re-use anonymous values. This is especially useful when
   isByRef()=true because it means re-using the same generated LLVM globals.
 * LLVM backend: rework the implementation of is_null and is_non_null
   AIR instructions. Generate slightly better LLVM code, and also fix
   the behavior for optionals whose payload type is 0-bit.
 * LLVM backend: improve `cmp` AIR instruction lowering to support
   pointer-like optionals.
 * `Value`: implement support for equality-checking optionals.
2021-10-15 18:37:09 -07:00
Andrew Kelley
186126c2a4 stage2: make hasCodeGenBits() always true for pointers
* LLVM backend: The `alloc` AIR instruction as well as pointer
   constants which point to a 0-bit element type now call a common
   codepath to produce a `*const llvm.Value` which is a non-zero pointer
   with a bogus-but-properly-aligned address.
 * LLVM backend: improve the lowering of optional types.
 * Type: `hasCodeGenBits()` now returns `true` for pointers even when
   it returns `false` for their element types.

Effectively, #6706 is now implemented in stage2 but not stage1.
2021-10-15 17:17:59 -07:00
joachimschmidt557
01b3905688 stage2 AArch64: move codegen to separate file 2021-10-15 13:58:14 -04:00
travisstaloch
16ac034a32
Sat shl neg rhs (#9949)
* saturating shl - check for negative rhs at comptime

- adds expected compile_errors case for negative rhs

* add expected compile error for sat shl assign
2021-10-15 13:56:27 -04:00
Andrew Kelley
cacd5366a6 stage2: LLVM backend: implement wrap_optional AIR
and move over some passing tests
2021-10-14 22:16:26 -07:00