261 Commits

Author SHA1 Message Date
Alex Rønne Petersen
163e9ce7d9
Merge pull request #24629 from alexrp/android-requires-libc
`std.Target`: require libc for Android API levels prior to 29
2025-08-04 17:59:47 +02:00
Alex Rønne Petersen
259b7c3f3f
std.Target: pull Os.requiresLibC() up to Target 2025-07-30 18:58:47 +02:00
Alex Rønne Petersen
a9773944dc compiler: disable self-hosted x86_64 backend on OpenBSD
Same as 97ecb6c551eb628e5a37d18d5a9720d3714a04ef for NetBSD.
2025-07-30 17:17:22 +02:00
Jacob Young
69abc945e4 aarch64: implement some safety checks
Closes #24553
2025-07-26 17:31:04 -04:00
Jacob Young
1274254c48 aarch64: implement stack probing 2025-07-26 16:08:40 -04:00
Linus Groh
bf4fda4db6 target: Add libc link flags for serenity 2025-07-24 00:54:40 +01:00
Jacob Young
5060ab99c9 aarch64: add new from scratch self-hosted backend 2025-07-22 19:43:47 -07:00
Andrew Kelley
2f3cd175d3 compiler: raise the bar for backend contributions 2025-07-14 09:26:24 +02:00
Andrew Kelley
aa52bb8327 zig fmt 2025-07-07 13:39:16 -07:00
Alex Rønne Petersen
b5cc658ab4 llvm: Use emulated TLS when appropriate for the target
Closes #24236.
2025-07-07 07:23:24 +02:00
Alex Rønne Petersen
97ecb6c551 compiler: Disable self-hosted x86_64 backend on NetBSD
https://github.com/ziglang/zig/issues/24341
2025-07-06 19:50:29 +02:00
Ali Cheraghi
1df79ab895 remove spirv cpu arch 2025-06-23 06:03:03 +02:00
Jacob Young
917640810e Target: pass and use locals by pointer instead of by value
This struct is larger than 256 bytes and code that copies it
consistently shows up in profiles of the compiler.
2025-06-19 11:45:06 -04:00
Ali Cheraghi
872f68c9cb
rename spirv backend name
`stage2_spirv64` -> `stage2_spirv`
2025-06-16 13:22:19 +03:30
Jacob Young
ba53b14028
x86_64: remove linker references from codegen 2025-06-12 13:55:41 +01:00
mlugg
89ba885970
spirv: make the backend compile again
Unfortunately, the self-hosted SPIR-V backend is quite tightly coupled
with the self-hosted SPIR-V linker through its `Object` concept (which
is much like `llvm.Object`). Reworking this would be too much work for
this branch. So, for now, I have introduced a special case (similar to
the LLVM backend's special case) to the codegen logic when using this
backend. We will want to delete this special case at some point, but it
need not block this work.
2025-06-12 13:55:40 +01:00
mlugg
c0df707066
wasm: get self-hosted compiling, and supporting separate_thread
My original goal here was just to get the self-hosted Wasm backend
compiling again after the pipeline change, but it turned out that from
there it was pretty simple to entirely eliminate the shared state
between `codegen.wasm` and `link.Wasm`. As such, this commit not only
fixes the backend, but makes it the second backend (after CBE) to
support the new 1:N:1 threading model.
2025-06-12 13:55:40 +01:00
mlugg
9eb400ef19
compiler: rework backend pipeline to separate codegen and link
The idea here is that instead of the linker calling into codegen,
instead codegen should run before we touch the linker, and after MIR is
produced, it is sent to the linker. Aside from simplifying the call
graph (by preventing N linkers from each calling into M codegen
backends!), this has the huge benefit that it is possible to
parallellize codegen separately from linking. The threading model can
look like this:

* 1 semantic analysis thread, which generates AIR
* N codegen threads, which process AIR into MIR
* 1 linker thread, which emits MIR to the binary

The codegen threads are also responsible for `Air.Legalize` and
`Air.Liveness`; it's more efficient to do this work here instead of
blocking the main thread for this trivially parallel task.

I have repurposed the `Zcu.Feature.separate_thread` backend feature to
indicate support for this 1:N:1 threading pattern. This commit makes the
C backend support this feature, since it was relatively easy to divorce
from `link.C`: it just required eliminating some shared buffers. Other
backends don't currently support this feature. In fact, they don't even
compile -- the next few commits will fix them back up.
2025-06-12 13:55:40 +01:00
mlugg
3743c3e39c
compiler: slightly untangle LLVM from the linkers
The main goal of this commit is to make it easier to decouple codegen
from the linkers by being able to do LLVM codegen without going through
the `link.File`; however, this ended up being a nice refactor anyway.

Previously, every linker stored an optional `llvm.Object`, which was
populated when using LLVM for the ZCU *and* linking an output binary;
and `Zcu` also stored an optional `llvm.Object`, which was used only
when we needed LLVM for the ZCU (e.g. for `-femit-llvm-bc`) but were not
emitting a binary.

This situation was incredibly silly. It meant there were N+1 places the
LLVM object might be instead of just 1, and it meant that every linker
had to start a bunch of methods by checking for an LLVM object, and just
dispatching to the corresponding method on *it* instead if it was not
`null`.

Instead, we now always store the LLVM object on the `Zcu` -- which makes
sense, because it corresponds to the object emitted by, well, the Zig
Compilation Unit! The linkers now mostly don't make reference to LLVM.
`Compilation` makes sure to emit the LLVM object if necessary before
calling `flush`, so it is ready for the linker. Also, all of the
`link.File` methods which act on the ZCU -- like `updateNav` -- now
check for the LLVM object in `link.zig` instead of in every single
individual linker implementation. Notably, the change to LLVM emit
improves this rather ludicrous call chain in the `-fllvm -flld` case:

* Compilation.flush
* link.File.flush
* link.Elf.flush
* link.Elf.linkWithLLD
* link.Elf.flushModule
* link.emitLlvmObject
* Compilation.emitLlvmObject
* llvm.Object.emit

Replacing it with this one:

* Compilation.flush
* llvm.Object.emit

...although we do currently still end up in `link.Elf.linkWithLLD` to do
the actual linking. The logic for invoking LLD should probably also be
unified at least somewhat; I haven't done that in this commit.
2025-06-12 13:55:39 +01:00
Jacob Young
5986bdf868 Compilation: enable the x86_64 backend by default for debug builds
Closes #22257
2025-06-06 23:42:14 -07:00
Alex Rønne Petersen
9d534790eb std.Target: Introduce Cpu convenience functions for feature tests.
Before:

* std.Target.arm.featureSetHas(target.cpu.features, .has_v7)
* std.Target.x86.featureSetHasAny(target.cpu.features, .{ .sse, .avx, .cmov })
* std.Target.wasm.featureSetHasAll(target.cpu.features, .{ .atomics, .bulk_memory })

After:

* target.cpu.has(.arm, .has_v7)
* target.cpu.hasAny(.x86, &.{ .sse, .avx, .cmov })
* target.cpu.hasAll(.wasm, &.{ .atomics, .bulk_memory })
2025-06-05 06:12:00 +02:00
Alex Rønne Petersen
14873f9a34
Merge pull request #24068 from alexrp/android-pic-pie
compiler: Rework PIE option logic.
2025-06-05 01:14:03 +02:00
Alex Rønne Petersen
2add31bfde valgrind: Add riscv64-linux support.
This appeared in Valgrind 3.25.0.
2025-06-04 19:24:08 +02:00
Alex Rønne Petersen
c8b92f3a8e
zig cc: Pass -f(no-)(PIC,PIE) to Clang for *-(windows,uefi)-(gnu,cygnus).
The previous supports_fpic() check was too broad.
2025-06-04 10:35:04 +02:00
Alex Rønne Petersen
a81fb5fb76
compiler: Rework PIE option logic.
To my knowledge, the only platforms that actually *require* PIE are Fuchsia and
Android, and the latter *only* when building a dynamically-linked executable.
OpenBSD and macOS both strongly encourage using PIE by default, but it isn't
technically required. So for the latter platforms, we enable it by default but
don't enforce it.

Also, importantly, if we're building an object file or a static library, and the
user hasn't explicitly told us whether to build PIE or non-PIE code (and the
target doesn't require PIE), we should *not* default to PIE. Doing so produces
code that cannot be linked into non-PIE output. In other words, building an
object file or a static library as PIE is an optimization only to be done when
the user knows that it'll end up in a PIE executable in the end.

Closes #21837.
2025-06-04 06:48:19 +02:00
mlugg
4c4dacf81a
Legalize: replace safety_checked_instructions
This adds 4 `Legalize.Feature`s:
* `expand_intcast_safe`
* `expand_add_safe`
* `expand_sub_safe`
* `expand_mul_safe`

These do pretty much what they say on the tin. This logic was previously
in Sema, used when `Zcu.Feature.safety_checked_instructions` was not
supported by the backend. That `Zcu.Feature` has been removed in favour
of this legalization.
2025-06-01 08:24:00 +01:00
Jacob Young
6198f7afb7 Sema: remove all_vector_instructions logic
Backends can instead ask legalization on a per-instruction basis.
2025-05-31 18:54:28 -04:00
Ali Cheraghi
dacd70fbe4 spirv: super basic composite int support 2025-05-21 13:01:20 +03:30
Ali Cheraghi
0901328f12 spirv: write error value in an storage buffer 2025-05-21 12:57:40 +03:30
Alex Rønne Petersen
999777e73a compiler: Scaffold stage2_powerpc backend.
Nothing interesting here; literally just the bare minimum so I can work on this
on and off in a branch without worrying about merge conflicts in the non-backend
code.
2025-05-20 10:23:16 +02:00
Alex Rønne Petersen
837e0f9c37 std.Target: Remove ObjectFormat.nvptx (and associated linker code).
Textual PTX is just assembly language like any other. And if we do ever add
support for emitting PTX object files after reverse engineering the bytecode
format, we'd be emitting ELF files like the CUDA toolchain. So there's really no
need for a special ObjectFormat tag here, nor linker code that treats it as a
distinct format.
2025-05-10 12:21:57 +02:00
Alex Rønne Petersen
dffd18f133
Merge pull request #23752 from alexrp/static-native-glibc
compiler: Allow linking native glibc statically
2025-05-04 01:53:51 +02:00
Alex Rønne Petersen
bf9b15ee67 std.Target: Add Cpu.Arch.or1k and basic target info. 2025-05-03 11:22:27 +02:00
Alex Rønne Petersen
d2f92e1797
compiler: Link libunwind when linking glibc statically.
glibc's libc.a depends on the functions provided by libunwind.
2025-05-03 10:54:36 +02:00
Alex Rønne Petersen
ae38575b42
compiler: Rename misleading libcNeedsLibUnwind() function.
It's about libc++, not libc.
2025-05-03 10:31:31 +02:00
Ali Cheraghi
710f9325ff Compilation: don't build compiler_rt for amdgcn and ubsan_rt for ptx 2025-04-28 10:49:17 +03:30
Alex Rønne Petersen
26bb429093
compiler: Reject using LLVM for csky and xtensa.
These backends are completely unusable at the moment; they can produce neither
assembly files nor object files. So give a nicer error when users try to use
them.
2025-04-27 14:09:05 +02:00
Ali Cheraghi
13541bc1c0 Module: ignore xnack and sramecc features on some gpu models 2025-04-21 09:49:19 +02:00
Alex Rønne Petersen
ddcf6fcdf3 compiler: Allow using LLVM's SPIR-V backend. 2025-04-09 19:32:57 +02:00
Alex Rønne Petersen
15a05fc324
Revert "compiler: Don't consider powerpc to have red zone support yet."
This reverts commit 4fad60fd3a70d0b059ce92ce825faabc1d2ac2e8.

Closes #23056.
2025-04-04 06:08:10 +02:00
Alex Rønne Petersen
8954e9748a
std.Target: Add Abi.muslf32 and Abi.muslsf. 2025-04-04 06:08:09 +02:00
Alex Rønne Petersen
4de368a1b6
std.Target: Update CPU models/features for LLVM 20.
Closes #21818.
2025-04-04 06:08:09 +02:00
Carl Åstholm
f45f9649e3 Lower @returnAddress to a constant 0 in Emscripten release builds
Emscripten currently implements `emscripten_return_address()` by calling
out into JavaScript and parsing a stack trace, which introduces
significant overhead that we would prefer to avoid in release builds.

This is especially problematic for allocators because the generic parts
of `std.mem.Allocator` make frequent use of `@returnAddress`, even
though very few allocator implementations even observe the return
address, which makes allocators nigh unusable for performance-critical
applications like games if the compiler is unable to devirtualize the
allocator calls.
2025-03-23 17:13:19 -04:00
Alex Rønne Petersen
4fad60fd3a compiler: Don't consider powerpc to have red zone support yet.
The command line flag is only supported in Clang 20: https://github.com/ziglang/zig/issues/23056

This gets rid of some warnings when using zig cc.
2025-03-03 19:36:46 +01:00
Alex Rønne Petersen
fc7a0c4878 Sema: Fix fnptr alignment safety checks to account for potential ISA tag.
As seen on e.g. Arm/Thumb and MIPS (MIPS16/microMIPS).

Fixes #22888.
2025-02-22 04:12:46 +01:00
Alex Rønne Petersen
481b7bf3f0
std.Target: Remove functions that just wrap component functions.
Functions like isMinGW() and isGnuLibC() have a good reason to exist: They look
at multiple components of the target. But functions like isWasm(), isDarwin(),
isGnu(), etc only exist to save 4-8 characters. I don't think this is a good
enough reason to keep them, especially given that:

* It's not immediately obvious to a reader whether target.isDarwin() means the
  same thing as target.os.tag.isDarwin() precisely because isMinGW() and similar
  functions *do* look at multiple components.
* It's not clear where we would draw the line. The logical conclusion before
  this commit would be to also wrap Arch.isX86(), Os.Tag.isSolarish(),
  Abi.isOpenHarmony(), etc... this obviously quickly gets out of hand.
* It's nice to just have a single correct way of doing something.
2025-02-17 19:18:19 +01:00
Alex Rønne Petersen
ce8c61b0fc
std.Target: Move Cpu.Arch.supportsAddressSpace() up to Cpu.
This allows it to inspect CPU features which is needed for Propeller, and AVR in
the future.
2025-02-17 19:17:56 +01:00
Alex Rønne Petersen
0048166867
std.Target: Make Cpu.Arch.supportsAddressSpace() take an optional context.
Allows deduplicating the code in Sema.
2025-02-17 19:17:56 +01:00
Alex Rønne Petersen
2fe32ef847
std.Target: Remove Cpu.Arch.propeller2 and use a CPU feature instead. 2025-02-17 19:17:55 +01:00
Alex Rønne Petersen
b541a7af11
std.Target: Remove Cpu.Arch.spu_2.
This was for a hobby project that appears to be dormant for now. This can be
added back if the project is resumed in the future.
2025-02-17 19:17:55 +01:00