Andrew Kelley
3227aec848
fix not respecting sub-arch feature
2020-01-22 17:35:57 -05:00
Andrew Kelley
48c7e6c48b
std.Target.CpuFeatures is now a struct with both CPU and feature set
...
Previously it was a tagged union which was one of:
* baseline
* a specific CPU
* a set of features
Now, it's possible to have a CPU but also modify the CPU's feature set
on top of that. This is closer to what LLVM does.
This is more correct because Zig's notion of CPUs (and LLVM's) is not
exact CPU models. For example "skylake" is not one very specific model;
there are several different pieces of hardware that match "skylake" that
have different feature sets enabled.
2020-01-22 17:13:31 -05:00
Andrew Kelley
cbe9a51518
don't trust llvm's GetHostCPUName
...
comment from this commit reproduced here:
I have observed the CPU name reported by LLVM being incorrect. On
the SourceHut build services, LLVM 9.0 reports the CPU as "athlon-xp",
which is a 32-bit CPU, even though the system is 64-bit and the reported
CPU features include, among other things, +64bit.
So the strategy taken here is that we observe both reported CPU, and the
reported CPU features. The features are trusted more; but if the features
match exactly the features of the reported CPU, then we trust the reported CPU.
2020-01-21 22:02:13 -05:00
Andrew Kelley
830e0ba2d2
enable native CPU feature for windows; disable failing tests
...
See #508 . These can be re-enabled when we upgrade to LLVM 10.
2020-01-21 21:46:06 -05:00
Andrew Kelley
68b6867e76
lazily compute the full cpu features dependencies
2020-01-21 20:11:36 -05:00
Andrew Kelley
92559cd02c
hit a comptime limitation with computing dense sets
2020-01-21 19:40:44 -05:00
Andrew Kelley
6793af8d8b
these are not real cpu features
2020-01-21 12:14:36 -05:00
Andrew Kelley
39759b90fc
make zig targets show native cpu name and features
2020-01-21 01:22:37 -05:00
Andrew Kelley
e640d01535
fixups to arch data, support any number of cpu features
2020-01-21 00:34:54 -05:00
Andrew Kelley
6118b11afa
Revert "aarch64: remove CPU features that are actually just CPUs"
...
This reverts commit 6dd514ac8aa3ee2e5c6fd0374469d361ccfce5b9.
This strategy won't work for arm 32-bit; instead need to try to figure
out how to get more bits into the bit set.
2020-01-20 23:15:07 -05:00
Andrew Kelley
89e107ee4e
uncomment all the archs in target.zig
2020-01-20 23:14:35 -05:00
Andrew Kelley
6dd514ac8a
aarch64: remove CPU features that are actually just CPUs
2020-01-20 22:49:26 -05:00
Andrew Kelley
6e88883edf
import data from llvm 9
2020-01-20 22:21:45 -05:00
Andrew Kelley
f3dd9bbdac
improve zig targets
2020-01-20 13:40:25 -05:00
Andrew Kelley
bf82929557
fix std.Target.Arch.parseCpuFeatureSet
2020-01-20 12:41:18 -05:00
Andrew Kelley
8f29d14073
stage1 is building. zig targets now self-hosted
2020-01-20 01:42:31 -05:00
Andrew Kelley
20af858601
some fixes
2020-01-19 21:06:41 -05:00
Andrew Kelley
e3b5e91878
do the x86 arch
2020-01-19 20:54:05 -05:00
Andrew Kelley
a867b43366
progress towards merging
...
see BRANCH_TODO file
2020-01-19 20:54:04 -05:00
Layne Gustafson
430077df1b
Allow target details with no LLVM support
2020-01-19 20:53:20 -05:00
Layne Gustafson
de8a5cf5f5
Remove features/cpus not in LLVM v9
2020-01-19 20:53:20 -05:00
Layne Gustafson
03dd376b55
Add builtin.zig support
2020-01-19 20:53:19 -05:00
Layne Gustafson
c61856ebcf
Add TargetDetails abstraction
2020-01-19 20:53:19 -05:00
Layne Gustafson
79a2747de4
Add llvm_name to feature defs
2020-01-19 20:53:19 -05:00
Layne Gustafson
e4ecdefa9a
Rename subfeatures -> dependencies
2020-01-19 20:53:19 -05:00
Layne Gustafson
51372200d3
Filter out non-features
2020-01-19 20:53:19 -05:00
Layne Gustafson
c1798cb632
Add build.zig cpu and feature options
2020-01-19 20:53:19 -05:00
Layne Gustafson
c8f1e0d6d8
Remove llvm_name from features
2020-01-19 20:53:19 -05:00
Layne Gustafson
c131e50ea7
Switch CPU/features to simple format
2020-01-19 20:53:18 -05:00
Layne Gustafson
21908e100e
Fix CPU and feature defs
2020-01-19 20:53:18 -05:00
Layne Gustafson
8ac138a318
Add parseArchTag and fix parseArchSub
2020-01-19 20:53:18 -05:00
Layne Gustafson
8f191e0166
Update term feature deps -> subfeatures
2020-01-19 20:53:18 -05:00
Layne Gustafson
0f46c12f78
Create initial target details infrastructure
2020-01-19 20:53:15 -05:00
Andrew Kelley
e491b2f5a7
Merge pull request #4231 from LemonBoy/more-builtin-work1
...
More patches for compiler-rt
2020-01-19 13:27:36 -05:00
LemonBoy
861724bcf0
Fix some tests broken by the renamed files
2020-01-19 09:31:45 +01:00
LemonBoy
5fbc1c2812
Nuke some more code
2020-01-19 00:12:27 +01:00
LemonBoy
3247fd7862
Export MSVC builtins inconditionally
2020-01-19 00:12:27 +01:00
LemonBoy
ae31da9334
Minor cleanup
2020-01-19 00:12:26 +01:00
LemonBoy
6b056d1fb9
Nuke some repeated code
2020-01-19 00:12:25 +01:00
LemonBoy
7d94e712f1
Remove useless wrappers around f32/f64 aeabi builtins
2020-01-19 00:12:18 +01:00
LemonBoy
fa52c9e36e
Small cleanups
2020-01-19 00:11:45 +01:00
Sebastian
405b8e9eee
fixed typo - "path" lead to undeclared identifier
2020-01-18 17:56:53 -05:00
daurnimator
72ec445677
std: turn EAI_ constants into a non-exhaustive enum
2020-01-18 17:46:44 -05:00
daurnimator
9e6e1e58bb
std: use non-exhaustive enums from crc module
...
Un-reverts PR #3118
2020-01-18 17:42:45 -05:00
Andrew Kelley
b5ac079f88
Merge pull request #4191 from Vexu/non-exhaustive-enums
...
Implement non-exhaustive enums
2020-01-17 14:26:12 -05:00
Michaël Larouche
d9be6e5dc6
Port clzsi2 from compiler_rt, required for using std.fmt.format on some ARM architecture.
2020-01-17 14:25:22 -05:00
Vexu
bac27731e3
add struct field default value to typeinfo
2020-01-16 13:22:30 -05:00
LemonBoy
f609ce4f65
Minor changes to the ARM builtin fns
2020-01-16 12:50:53 -05:00
LemonBoy
7e5e767ba0
Fix regression in char printing
...
Closes #4014
2020-01-16 12:17:16 -05:00
Andrew Kelley
8a792db2d8
Merge pull request #4187 from LemonBoy/builtin-rearrange
...
Some needed work on builtins
2020-01-15 18:39:50 -05:00
