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stage1 is building. zig targets now self-hosted

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This commit is contained in:
Andrew Kelley 2020-01-20 01:42:31 -05:00
parent 20af858601
commit 8f29d14073
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GPG Key ID: 7C5F548F728501A9
10 changed files with 307 additions and 466 deletions
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2
BRANCH_TODO
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@ -1,5 +1,7 @@
Finish these thigns before merging teh branch
* it gets the wrong answers with `-target-feature -sse,-avx`
* finish refactoring target/arch/*
* `zig builtin` integration
* move target details to better location

3
lib/std/builtin.zig
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@ -1,5 +1,8 @@
pub usingnamespace @import("builtin");
/// Deprecated: use `std.Target.Os`.
pub const Target = std.Target;
/// Deprecated: use `std.Target.Os`.
pub const Os = std.Target.Os;

62
lib/std/target.zig
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@ -49,6 +49,22 @@ pub const Target = union(enum) {
other,
};
pub const aarch64 = @import("target/aarch64.zig");
pub const amdgpu = @import("target/amdgpu.zig");
pub const arm = @import("target/arm.zig");
pub const avr = @import("target/avr.zig");
pub const bpf = @import("target/bpf.zig");
pub const hexagon = @import("target/hexagon.zig");
pub const mips = @import("target/mips.zig");
pub const msp430 = @import("target/msp430.zig");
pub const nvptx = @import("target/nvptx.zig");
pub const powerpc = @import("target/powerpc.zig");
pub const riscv = @import("target/riscv.zig");
pub const sparc = @import("target/sparc.zig");
pub const systemz = @import("target/systemz.zig");
pub const wasm = @import("target/wasm.zig");
pub const x86 = @import("target/x86.zig");
pub const Arch = union(enum) {
arm: Arm32,
armeb: Arm32,
@ -101,22 +117,6 @@ pub const Target = union(enum) {
renderscript32,
renderscript64,
pub const aarch64 = @import("target/aarch64.zig");
pub const amdgpu = @import("target/amdgpu.zig");
pub const arm = @import("target/arm.zig");
pub const avr = @import("target/avr.zig");
pub const bpf = @import("target/bpf.zig");
pub const hexagon = @import("target/hexagon.zig");
pub const mips = @import("target/mips.zig");
pub const msp430 = @import("target/msp430.zig");
pub const nvptx = @import("target/nvptx.zig");
pub const powerpc = @import("target/powerpc.zig");
pub const riscv = @import("target/riscv.zig");
pub const sparc = @import("target/sparc.zig");
pub const systemz = @import("target/systemz.zig");
pub const wasm = @import("target/wasm.zig");
pub const x86 = @import("target/x86.zig");
pub const Arm32 = enum {
v8_5a,
v8_4a,
@ -251,7 +251,7 @@ pub const Target = union(enum) {
};
for (arch.allFeaturesList()) |feature, index| {
if (mem.eql(u8, feature_name, feature.name)) {
set |= @splat(2, 1 << index);
set |= @splat(2, @as(Cpu.Feature.Set, 1) << @intCast(u7, index));
break;
}
} else {
@ -440,7 +440,7 @@ pub const Target = union(enum) {
// TODO .sparc, .sparcv9, .sparcel => sparc.baseline_features,
// TODO .s390x => systemz.baseline_features,
.i386 => x86.cpu.pentium4.features,
.x86_64 => x86.cpu.x8664.features,
.x86_64 => x86.cpu.x86_64.features,
// TODO .nvptx, .nvptx64 => nvptx.baseline_features,
// TODO .wasm32, .wasm64 => wasm.baseline_features,
@ -451,21 +451,21 @@ pub const Target = union(enum) {
/// All CPUs Zig is aware of, sorted lexicographically by name.
pub fn allCpus(arch: Arch) []const *const Cpu {
return switch (arch) {
.arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
// TODO .arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
.aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus,
.avr => avr.all_cpus,
.bpfel, .bpfeb => bpf.all_cpus,
.hexagon => hexagon.all_cpus,
.mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
.msp430 => msp430.all_cpus,
.powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
.amdgcn => amdgpu.all_cpus,
.riscv32, .riscv64 => riscv.all_cpus,
.sparc, .sparcv9, .sparcel => sparc.all_cpus,
.s390x => systemz.all_cpus,
// TODO .avr => avr.all_cpus,
// TODO .bpfel, .bpfeb => bpf.all_cpus,
// TODO .hexagon => hexagon.all_cpus,
// TODO .mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
// TODO .msp430 => msp430.all_cpus,
// TODO .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
// TODO .amdgcn => amdgpu.all_cpus,
// TODO .riscv32, .riscv64 => riscv.all_cpus,
// TODO .sparc, .sparcv9, .sparcel => sparc.all_cpus,
// TODO .s390x => systemz.all_cpus,
.i386, .x86_64 => x86.all_cpus,
.nvptx, .nvptx64 => nvptx.all_cpus,
.wasm32, .wasm64 => wasm.all_cpus,
// TODO .nvptx, .nvptx64 => nvptx.all_cpus,
// TODO .wasm32, .wasm64 => wasm.all_cpus,
else => &[0]*const Cpu{},
};

392
lib/std/target/x86.zig
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File diff suppressed because it is too large Load Diff

2
src-self-hosted/main.zig
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@ -791,7 +791,7 @@ async fn fmtPath(fmt: *Fmt, file_path_ref: []const u8, check_mode: bool) FmtErro
// cmd:targets /////////////////////////////////////////////////////////////////////////////////////
fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void {
pub fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void {
try stdout.write("Architectures:\n");
{
comptime var i: usize = 0;

164
src-self-hosted/stage1.zig
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@ -84,6 +84,11 @@ const Error = extern enum {
NotLazy,
IsAsync,
ImportOutsidePkgPath,
UnknownCpu,
UnknownSubArchitecture,
UnknownCpuFeature,
InvalidCpuFeatures,
InvalidLlvmCpuFeaturesFormat,
};
const FILE = std.c.FILE;
@ -533,99 +538,20 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
}
// ABI warning
export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void {
printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| {
std.debug.warn("Failed to list features: {}\n", .{@errorName(err)});
export fn stage2_cmd_targets() c_int {
self_hosted_main.cmdTargets(std.heap.c_allocator, &[0][]u8{}) catch |err| {
std.debug.warn("unable to list targets: {}\n", .{@errorName(err)});
return -1;
};
}
fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void {
const stdout_stream = &std.io.getStdOut().outStream().stream;
const arch = Target.parseArchSub(arch_name) catch {
std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name});
return;
};
try stdout_stream.print("Available features for {}:\n", .{@tagName(arch)});
const features = arch.allFeaturesList();
var longest_len: usize = 0;
for (features) |feature| {
if (feature.name.len > longest_len) {
longest_len = feature.name.len;
}
}
for (features) |feature| {
try stdout_stream.print(" {}", .{feature.name});
var i: usize = 0;
while (i < longest_len - feature.name.len) : (i += 1) {
try stdout_stream.write(" ");
}
try stdout_stream.print(" - {}\n", .{feature.description});
if (show_dependencies and feature.dependencies != 0) {
for (feature.dependencies) |dependency| {
try stdout_stream.print(" {}\n", .{dependency.name});
}
}
}
}
// ABI warning
export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void {
printCpusForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| {
std.debug.warn("Failed to list features: {}\n", .{@errorName(err)});
};
}
fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void {
const stdout_stream = &std.io.getStdOut().outStream().stream;
const arch = Target.parseArchTag(arch_name) catch {
std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name});
return;
};
const cpus = std.target.getCpusForArch(arch);
try stdout_stream.print("Available cpus for {}:\n", .{@tagName(arch)});
var longest_len: usize = 0;
for (cpus) |cpu| {
if (cpu.name.len > longest_len) {
longest_len = cpu.name.len;
}
}
for (cpus) |cpu| {
try stdout_stream.print(" {}", .{cpu.name});
var i: usize = 0;
while (i < longest_len - cpu.name.len) : (i += 1) {
try stdout_stream.write(" ");
}
try stdout_stream.write("\n");
if (show_dependencies and cpu.dependencies.len > 0) {
for (cpu.dependencies) |dependency| {
try stdout_stream.print(" {}\n", .{dependency.name});
}
}
}
return 0;
}
const Stage2CpuFeatures = struct {
allocator: *mem.Allocator,
cpu_features: Target.Cross.CpuFeatures,
llvm_cpu_name: ?[:0]const u8,
llvm_features_str: ?[:0]const u8,
llvm_cpu_name: ?[*:0]const u8,
llvm_features_str: ?[*:0]const u8,
builtin_str: [:0]const u8,
cache_hash: [:0]const u8,
@ -636,10 +562,10 @@ const Stage2CpuFeatures = struct {
const self = try allocator.create(Self);
errdefer allocator.destroy(self);
const builtin_str = try std.fmt.allocPrint0(allocator, ".baseline;\n");
const builtin_str = try std.fmt.allocPrint0(allocator, ".baseline;\n", .{});
errdefer allocator.free(builtin_str);
const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n");
const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n", .{});
errdefer allocator.free(cache_hash);
self.* = Self{
@ -655,7 +581,7 @@ const Stage2CpuFeatures = struct {
fn createFromLLVM(
allocator: *mem.Allocator,
arch: [*:0]const u8,
arch_name: [*:0]const u8,
llvm_cpu_name_z: [*:0]const u8,
llvm_cpu_features: [*:0]const u8,
) !*Self {
@ -687,10 +613,11 @@ const Stage2CpuFeatures = struct {
return error.InvalidLlvmCpuFeaturesFormat;
}
for (arch.allFeaturesList()) |feature, index| {
if (mem.eql(u8, feature_name, feature.name)) {
const this_llvm_name = feature.llvm_name orelse continue;
if (mem.eql(u8, llvm_feat, this_llvm_name)) {
switch (op) {
.add => set |= 1 << index,
.sub => set &= ~@as(Target.Cpu.Feature.Set, 1 << index),
.add => set |= @as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index),
.sub => set &= ~@as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index),
}
break;
}
@ -703,21 +630,19 @@ const Stage2CpuFeatures = struct {
const self = try allocator.create(Self);
errdefer allocator.destroy(self);
const builtin_str = try std.fmt.allocPrint0(
allocator,
"CpuFeatures{{ .cpu = &Arch.{}.cpu.{} }};\n",
const builtin_str = try std.fmt.allocPrint0(allocator, "CpuFeatures{{ .cpu = &Target.{}.cpu.{} }};\n", .{
arch.genericName(),
cpu.name,
);
});
errdefer allocator.free(builtin_str);
const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", cpu.name, cpu.features);
const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", .{ cpu.name, cpu.features });
errdefer allocator.free(cache_hash);
self.* = Self{
.allocator = allocator,
.cpu_features = .{ .cpu = cpu },
.llvm_cpu_name = cpu.llvm_name,
.llvm_cpu_name = if (cpu.llvm_name) |n| n.ptr else null,
.llvm_features_str = null,
.builtin_str = builtin_str,
.cache_hash = cache_hash,
@ -728,20 +653,22 @@ const Stage2CpuFeatures = struct {
fn createFromCpuFeatures(
allocator: *mem.Allocator,
arch: Target.Arch,
features: Target.Cpu.Feature.Set,
feature_set: Target.Cpu.Feature.Set,
) !*Self {
const self = try allocator.create(Self);
errdefer allocator.destroy(self);
const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", features);
const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", .{feature_set});
errdefer allocator.free(cache_hash);
const generic_arch_name = arch.genericName();
var builtin_str_buffer = try std.Buffer.allocPrint(
allocator,
"CpuFeatures{{ .features = Arch.{}.featureSet(&[_]Arch.{}.Feature{{\n",
generic_arch_name,
generic_arch_name,
\\CpuFeatures{{
\\ .features = Target.{}.featureSet(&[_]Target.{}.Feature{{
\\
,
.{ generic_arch_name, generic_arch_name },
);
defer builtin_str_buffer.deinit();
@ -750,7 +677,8 @@ const Stage2CpuFeatures = struct {
// First, disable all features.
// This way, we only get the ones the user requests.
for (arch.allFeatures()) |feature| {
const all_features = arch.allFeaturesList();
for (all_features) |feature| {
if (feature.llvm_name) |llvm_name| {
try llvm_features_buffer.append("-");
try llvm_features_buffer.append(llvm_name);
@ -758,14 +686,16 @@ const Stage2CpuFeatures = struct {
}
}
for (features) |feature| {
for (all_features) |feature, index| {
if (!Target.Cpu.Feature.isEnabled(feature_set, @intCast(u7, index))) continue;
if (feature.llvm_name) |llvm_name| {
try llvm_features_buffer.append("+");
try llvm_features_buffer.append(llvm_name);
try llvm_features_buffer.append(",");
}
try builtin_str_buffer.append(" .");
try builtin_str_buffer.append(" .");
try builtin_str_buffer.append(feature.name);
try builtin_str_buffer.append(",\n");
}
@ -774,13 +704,17 @@ const Stage2CpuFeatures = struct {
llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
}
try builtin_str_buffer.append("})};\n");
try builtin_str_buffer.append(
\\ }),
\\};
\\
);
self.* = Self{
.allocator = allocator,
.cpu_features = .{ .features = features },
.cpu_features = .{ .features = feature_set },
.llvm_cpu_name = null,
.llvm_features_str = llvm_features_buffer.toOwnedSlice(),
.llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr,
.builtin_str = builtin_str_buffer.toOwnedSlice(),
.cache_hash = cache_hash,
};
@ -790,7 +724,7 @@ const Stage2CpuFeatures = struct {
fn destroy(self: *Self) void {
self.allocator.free(self.cache_hash);
self.allocator.free(self.builtin_str);
if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str);
// TODO if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str);
self.allocator.destroy(self);
}
};
@ -803,6 +737,9 @@ export fn stage2_cpu_features_parse_cpu(
) Error {
result.* = parseCpu(arch_name, cpu_name) catch |err| switch (err) {
error.OutOfMemory => return .OutOfMemory,
error.UnknownCpu => return .UnknownCpu,
error.UnknownArchitecture => return .UnknownArchitecture,
error.UnknownSubArchitecture => return .UnknownSubArchitecture,
};
return .None;
}
@ -821,6 +758,10 @@ export fn stage2_cpu_features_parse_features(
) Error {
result.* = parseFeatures(arch_name, features_text) catch |err| switch (err) {
error.OutOfMemory => return .OutOfMemory,
error.UnknownCpuFeature => return .UnknownCpuFeature,
error.InvalidCpuFeatures => return .InvalidCpuFeatures,
error.UnknownArchitecture => return .UnknownArchitecture,
error.UnknownSubArchitecture => return .UnknownSubArchitecture,
};
return .None;
}
@ -853,6 +794,9 @@ export fn stage2_cpu_features_llvm(
llvm_cpu_features,
) catch |err| switch (err) {
error.OutOfMemory => return .OutOfMemory,
error.UnknownArchitecture => return .UnknownArchitecture,
error.UnknownSubArchitecture => return .UnknownSubArchitecture,
error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat,
};
return .None;
}

5
src/error.cpp
View File

@ -58,6 +58,11 @@ const char *err_str(Error err) {
case ErrorNotLazy: return "not lazy";
case ErrorIsAsync: return "is async";
case ErrorImportOutsidePkgPath: return "import of file outside package path";
case ErrorUnknownCpu: return "unknown CPU";
case ErrorUnknownSubArchitecture: return "unknown sub-architecture";
case ErrorUnknownCpuFeature: return "unknown CPU feature";
case ErrorInvalidCpuFeatures: return "invalid CPU features";
case ErrorInvalidLlvmCpuFeaturesFormat: return "invalid LLVM CPU features format";
}
return "(invalid error)";
}

113
src/main.cpp
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@ -131,11 +131,6 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
" --test-name-prefix [text] add prefix to all tests\n"
" --test-cmd [arg] specify test execution command one arg at a time\n"
" --test-cmd-bin appends test binary path to test cmd args\n"
"\n"
"Targets Options:\n"
" --list-features [arch] list available features for the given architecture\n"
" --list-cpus [arch] list available cpus for the given architecture\n"
" --show-dependencies list feature dependencies for each entry from --list-{features,cpus}\n"
, arg0);
return return_code;
}
@ -160,88 +155,6 @@ static int print_libc_usage(const char *arg0, FILE *file, int return_code) {
return return_code;
}
static bool arch_available_in_llvm(ZigLLVM_ArchType arch) {
LLVMTargetRef target_ref;
char *err_msg = nullptr;
char triple_string[128];
sprintf(triple_string, "%s-unknown-unknown-unknown", ZigLLVMGetArchTypeName(arch));
return !LLVMGetTargetFromTriple(triple_string, &target_ref, &err_msg);
}
static int print_target_list(FILE *f) {
ZigTarget native;
get_native_target(&native);
fprintf(f, "Architectures:\n");
size_t arch_count = target_arch_count();
for (size_t arch_i = 0; arch_i < arch_count; arch_i += 1) {
ZigLLVM_ArchType arch = target_arch_enum(arch_i);
if (!arch_available_in_llvm(arch))
continue;
const char *arch_name = target_arch_name(arch);
SubArchList sub_arch_list = target_subarch_list(arch);
size_t sub_count = target_subarch_count(sub_arch_list);
const char *arch_native_str = (native.arch == arch) ? " (native)" : "";
fprintf(f, " %s%s\n", arch_name, arch_native_str);
for (size_t sub_i = 0; sub_i < sub_count; sub_i += 1) {
ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i);
const char *sub_name = target_subarch_name(sub);
const char *sub_native_str = (native.arch == arch && native.sub_arch == sub) ? " (native)" : "";
fprintf(f, " %s%s\n", sub_name, sub_native_str);
}
}
fprintf(f, "\nOperating Systems:\n");
size_t os_count = target_os_count();
for (size_t i = 0; i < os_count; i += 1) {
Os os_type = target_os_enum(i);
const char *native_str = (native.os == os_type) ? " (native)" : "";
fprintf(f, " %s%s\n", target_os_name(os_type), native_str);
}
fprintf(f, "\nC ABIs:\n");
size_t abi_count = target_abi_count();
for (size_t i = 0; i < abi_count; i += 1) {
ZigLLVM_EnvironmentType abi = target_abi_enum(i);
const char *native_str = (native.abi == abi) ? " (native)" : "";
fprintf(f, " %s%s\n", target_abi_name(abi), native_str);
}
fprintf(f, "\nAvailable libcs:\n");
size_t libc_count = target_libc_count();
for (size_t i = 0; i < libc_count; i += 1) {
ZigTarget libc_target;
target_libc_enum(i, &libc_target);
bool is_native = native.arch == libc_target.arch &&
native.os == libc_target.os &&
native.abi == libc_target.abi;
const char *native_str = is_native ? " (native)" : "";
fprintf(f, " %s-%s-%s%s\n", target_arch_name(libc_target.arch),
target_os_name(libc_target.os), target_abi_name(libc_target.abi), native_str);
}
fprintf(f, "\nAvailable glibc versions:\n");
ZigGLibCAbi *glibc_abi;
Error err;
if ((err = glibc_load_metadata(&glibc_abi, get_zig_lib_dir(), true))) {
return EXIT_FAILURE;
}
for (size_t i = 0; i < glibc_abi->all_versions.length; i += 1) {
ZigGLibCVersion *this_ver = &glibc_abi->all_versions.at(i);
bool is_native = native.glibc_version != nullptr &&
native.glibc_version->major == this_ver->major &&
native.glibc_version->minor == this_ver->minor &&
native.glibc_version->patch == this_ver->patch;
const char *native_str = is_native ? " (native)" : "";
if (this_ver->patch == 0) {
fprintf(f, " %d.%d%s\n", this_ver->major, this_ver->minor, native_str);
} else {
fprintf(f, " %d.%d.%d%s\n", this_ver->major, this_ver->minor, this_ver->patch, native_str);
}
}
return EXIT_SUCCESS;
}
enum Cmd {
CmdNone,
CmdBuild,
@ -538,10 +451,6 @@ int main(int argc, char **argv) {
const char *cpu = nullptr;
const char *features = nullptr;
const char *targets_list_features_arch = nullptr;
const char *targets_list_cpus_arch = nullptr;
bool targets_show_dependencies = false;
ZigList<const char *> llvm_argv = {0};
llvm_argv.append("zig (LLVM option parsing)");
@ -792,8 +701,6 @@ int main(int argc, char **argv) {
cur_pkg = cur_pkg->parent;
} else if (strcmp(arg, "-ffunction-sections") == 0) {
function_sections = true;
} else if (strcmp(arg, "--show-dependencies") == 0) {
targets_show_dependencies = true;
} else if (i + 1 >= argc) {
fprintf(stderr, "Expected another argument after %s\n", arg);
return print_error_usage(arg0);
@ -951,10 +858,6 @@ int main(int argc, char **argv) {
, argv[i]);
return EXIT_FAILURE;
}
} else if (strcmp(arg, "--list-features") == 0) {
targets_list_features_arch = argv[i];
} else if (strcmp(arg, "--list-cpus") == 0) {
targets_list_cpus_arch = argv[i];
} else if (strcmp(arg, "-target-cpu") == 0) {
cpu = argv[i];
} else if (strcmp(arg, "-target-feature") == 0) {
@ -1468,21 +1371,7 @@ int main(int argc, char **argv) {
return main_exit(root_progress_node, EXIT_SUCCESS);
}
case CmdTargets:
if (targets_list_features_arch != nullptr) {
stage2_list_features_for_arch(
targets_list_features_arch,
strlen(targets_list_features_arch),
targets_show_dependencies);
return 0;
} else if (targets_list_cpus_arch != nullptr) {
stage2_list_cpus_for_arch(
targets_list_cpus_arch,
strlen(targets_list_cpus_arch),
targets_show_dependencies);
return 0;
} else {
return print_target_list(stdout);
}
return stage2_cmd_targets();
case CmdNone:
return print_full_usage(arg0, stderr, EXIT_FAILURE);
}

15
src/userland.cpp
View File

@ -89,16 +89,6 @@ void stage2_progress_complete_one(Stage2ProgressNode *node) {}
void stage2_progress_disable_tty(Stage2Progress *progress) {}
void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){}
void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {
const char *msg = "stage0 called stage2_list_features_for_arch";
stage2_panic(msg, strlen(msg));
}
void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {
const char *msg = "stage0 called stage2_list_cpus_for_arch";
stage2_panic(msg, strlen(msg));
}
struct Stage2CpuFeatures {
const char *llvm_cpu_name;
const char *llvm_cpu_features;
@ -150,3 +140,8 @@ void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features,
*ptr = cpu_features->builtin_str;
*len = strlen(cpu_features->builtin_str);
}
int stage2_cmd_targets(void) {
const char *msg = "stage0 called stage2_cmd_targets";
stage2_panic(msg, strlen(msg));
}

15
src/userland.h
View File

@ -78,6 +78,11 @@ enum Error {
ErrorNotLazy,
ErrorIsAsync,
ErrorImportOutsidePkgPath,
ErrorUnknownCpu,
ErrorUnknownSubArchitecture,
ErrorUnknownCpuFeature,
ErrorInvalidCpuFeatures,
ErrorInvalidLlvmCpuFeaturesFormat,
};
// ABI warning
@ -174,12 +179,6 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node);
ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node,
size_t completed_count, size_t estimated_total_items);
// ABI warning
ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures);
// ABI warning
ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures);
// ABI warning
struct Stage2CpuFeatures;
@ -212,4 +211,8 @@ ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const struct Stage2CpuFeat
ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatures *cpu_features,
const char **ptr, size_t *len);
// ABI warning
ZIG_EXTERN_C int stage2_cmd_targets(void);
#endif