1645 Commits

Author SHA1 Message Date
Jacob Young
f399dd107a cbe: implement tag name 2022-10-25 05:11:28 -04:00
Jacob Young
40b5bb7161 cbe: fix loads and stores of 0-bit types 2022-10-25 05:11:28 -04:00
Jacob Young
962f33ee11 cbe: implement airUnionInit 2022-10-25 05:11:28 -04:00
Jacob Young
6a4266d62a cbe: fix infinite recursion on recursive types 2022-10-25 05:11:28 -04:00
Jacob Young
7c9a9a0fd4 cbe: cleanup code and fix cases test breakage 2022-10-25 05:11:28 -04:00
Jacob Young
525dcaecba behavior: enable stage2_c tests that are currently passing
Also fix C warnings triggered by these tests.
2022-10-25 05:11:28 -04:00
Jacob Young
e875530f8f c: improve lowering of undef values
All remaining behavior test -Wall -Wextra warnings are unused (but set)
warnings.
2022-10-25 05:11:28 -04:00
Jacob Young
5ae3ac9c43 c: fix redefinition of typedef warnings
Closes #11651
2022-10-25 05:11:28 -04:00
Jacob Young
f81651932a c: hacks to fix incompatible redeclaration of library function warnings 2022-10-25 05:11:28 -04:00
Jacob Young
f8a8197caa c: fix incompatible pointer types warning 2022-10-25 05:11:28 -04:00
Jacob Young
3b501b2d81 c: cast NULL in advance to avoid comparison warnings 2022-10-25 05:11:28 -04:00
Jacob Young
497329622a c: fix nonscalar type cast warning 2022-10-25 05:11:28 -04:00
Jacob Young
72e2fc4c73 c: fix stage1 compatibility 2022-10-25 05:11:28 -04:00
Jacob Young
0092f6ed88 c: fix int literal warnings 2022-10-25 05:11:28 -04:00
Jacob Young
61bf43d790 c: fix switch on bool warning 2022-10-25 05:11:28 -04:00
Jacob Young
da939b032e c: fix empty container warnings 2022-10-25 05:11:28 -04:00
Jacob Young
6f3654ad69 c: implement @errorName 2022-10-25 05:11:28 -04:00
Jacob Young
c8d0e71de6 c: fix mangling of error names
Closes #12751
2022-10-25 05:11:28 -04:00
Jacob Young
ab024d3524 c: fix undefined tests in ReleaseSafe 2022-10-25 05:11:28 -04:00
Andrew Kelley
04472af328
Merge pull request #13251 from Vexu/c-abi
implement ARM C ABI, separate C ABI tests from standalone tests
2022-10-23 12:16:58 -07:00
Veikka Tuominen
f2a7aba586 x86_64 llvm: correct lowering of ptr sized float struct
Closes #13211
2022-10-22 22:00:59 +03:00
Veikka Tuominen
5e0b4836a1 stage2: implement RISCV C ABI 2022-10-22 14:52:26 +03:00
Veikka Tuominen
031c768cc8 add C ABI tests for simd vectors 2022-10-22 11:31:41 +03:00
Cody Tapscott
f0e66ac4d0 std.Target: Remove longDoubleIs
This function is redundant with CType.sizeInBits(), and until the
previous commit they disagreed about the correct long double type
for several targets. Although they're all synced up now, it's much
simpler just to have a single source of truth.
2022-10-21 19:20:58 -07:00
Cody Tapscott
724d753638 stage2: Add .save_err_return_trace_index AIR op
This is encoded as a primitive AIR instruction to resolve one corner
case: A function may include a `catch { ... }` or `else |err| { ... }`
block but not call any errorable fn. In that case, there is no error
return trace to save the index of and codegen needs to avoid
interacting with the non-existing error trace.

By using a primitive AIR op, we can depend on Liveness to mark this
unused in this corner case.
2022-10-21 10:44:20 -07:00
Veikka Tuominen
3981250b84 aarch64 C ABI: return union instead of array of two enums
The result is much cleaner and the second element was unused most of the time.
2022-10-21 20:30:45 +03:00
Veikka Tuominen
9ae78a5890 stage2: implement ARM C ABI
Six new passing tests and the previously incorrectly passing
complex tests are now skipped.
2022-10-21 18:07:11 +03:00
Veikka Tuominen
972c39e2c0
Merge pull request #13219 from Vexu/stage2-fixes
Stage2 bug fixes
2022-10-21 12:11:49 +02:00
Veikka Tuominen
646d927c79 stage2: fix handling of aarch64 C ABI float array like structs
Closes #11702
Closes #13125
2022-10-20 20:11:12 +03:00
Ali Chraghi
ca27055cda all: rename @maximum to @max and @minimum to @min 2022-10-18 14:15:16 +03:00
Jacob Young
1e963053d0 tools: add lldb stage2 pretty printers
* Fix untagged struct names in debug info for llvm.
 * Factor out common stage2 pretty printer data.
 * Add lldb version of stage2 pretty printers.
2022-10-17 07:55:28 -04:00
Jacob Young
f9192adaba llvm: fix lowering of non-byte-aligned field pointers
* When a field starts at some bit offset within a byte you need to load
   starting from that byte and shift, not starting from the next byte,
   so a rounded-down divide is required here, not a rounded-up one.
 * Remove paragraph from doc that no longer relates to anything.

Closes #12363
2022-10-15 14:19:40 -04:00
Jacob Young
cb0e22db4e llvm: fix lowering of runtime refs to comptime-only decls
When we want a runtime pointer to a zero-bit value we use an undef
pointer, but what if we want a runtime pointer to a comptime-only value?
Normally, if `T` is a comptime-only type such as `*const comptime_int`,
then `*const T` would also be a comptime-only type, so anything
referencing a comptime-only value is usually also comptime-only, and
therefore not emitted to the executable.

However, what if instead we have a `*const anyopaque` pointing to a
comptime-only value?  Certainly, `*const anyopaque` is a runtime type,
and so we need some runtime value to store, even when it happens to be
pointing to a comptime-only value.  In this case we want to do the same
thing as we do when pointing to a zero-bit value, so we use
`hasRuntimeBits` to handle both cases instead of ignoring comptime.

Closes #12025
2022-10-15 14:17:25 -04:00
Andrew Kelley
66d6183001 Merge branch 'amdgpu-improvements' of https://github.com/Snektron/zig into Snektron-amdgpu-improvements 2022-10-15 10:36:10 -07:00
Jacob Young
400319872b llvm: fix bug lowering aggregate_init with a byref sentinel
Closes #12972
2022-10-15 11:12:04 -04:00
Andrew Kelley
b4e3424594
Merge pull request #13100 from topolarity/powerpc64le
stage2: Fix softfloat support for PPC64(LE)
2022-10-15 10:05:00 -04:00
Jacob Young
9b45dc1608 stage2: fix emitting asm and bin at the same time
This logic is copied from stage1.

Fixes #12800
2022-10-14 14:46:50 -04:00
Cody Tapscott
46fb730712 stage2: Use softfloat for f16 on MIPS targets 2022-10-13 12:53:20 -07:00
Cody Tapscott
db9058e41a Disable llvm.prefetch for PowerPC
This instruction is not supported on this backend, so should
just be a noop.
2022-10-13 12:53:20 -07:00
Cody Tapscott
f0d12dd82b stage2: Add softfloat support for @reduce 2022-10-13 12:53:20 -07:00
Cody Tapscott
37c6fcafa2 stage2 LLVM: Correct long double for WASM
Also, f16 is not supported on this backend.
2022-10-13 12:53:20 -07:00
Cody Tapscott
aedafb20cf stage2: Fix softfloat support for PPC64(LE)
Stage 2's softfloat support still had a couple of gaps, which were
preventing us from lowering `f16` on this target. With any luck,
this is enough to get PPC64 working as a Tier 2 target again.
2022-10-13 12:53:20 -07:00
Robin Voetter
e90a42a808
stage2: improve globals with address spaces a little 2022-10-12 20:36:15 +02:00
Robin Voetter
8894d1c45e
stage2: f128 improvements for targets that do not support it 2022-10-12 20:36:14 +02:00
Robin Voetter
5d429b03e3
stage2: add @addrSpaceCast builtin 2022-10-12 20:36:12 +02:00
Robin Voetter
5f3b91437f
stage2: improve addrspace handling
This commit changes the way Zig is intended to deal with variable
declaration for exotic targets. Where previously the idea was to
enfore local/global variables to be placed into their respective
address spaces, depending on the target, this is now fixed to the
generic address space.

To facilitate this for targets where local variables _must_ be
generated into a specific address space (ex. amdgcn where locals
must be generated into the private address space), the variable
allocations (alloca) are generated into the right address space
and then addrspace-casted back to the generic address space. While this
could be less efficient in theory, LLVM will hopefull deal with figuring
out the actual correct address space for a pointer for us. HIP seems to
do the same thing in this regard.

Global variables are handled in a similar way.
2022-10-12 20:34:42 +02:00
Robin Voetter
3392de87dc
allow global/local/shared address spaces on amdgcn 2022-10-12 20:34:41 +02:00
Robin Voetter
6b69dcfdd2
amdgpu: add AmdgpuKernel calling convention 2022-10-12 20:34:41 +02:00
jacobly0
562ac8be48
codegen: add support for lowering .field_ptr on a slice
Closes #13068
2022-10-12 12:40:59 +03:00
Cody Tapscott
e6ebdcb82e stage2 LLVM: Use a packed aggregate for union payload init
Without the packed qualifier, the type layout that we use to
initialize doesn't match the correct layout of the underlying
storage, causing corrupted data and past-the-end writes.
2022-10-11 15:42:01 -04:00