16273 Commits

Author SHA1 Message Date
Luuk de Gram
b9b20b14ea
wasm: use liveness analysis for locals
This hooks reusal of locals into liveness analysis.
Meaning that when an operand dies, and is a local,
it will automatically be freed so it can be re-used
when a new local is required. The result of this, is
a lower allocation required for locals. Having less
locals means smaller binary size, as well as faster
compilation speed when loaded by the runtime.
2022-10-16 15:54:16 +02:00
Jacob Young
f9192adaba llvm: fix lowering of non-byte-aligned field pointers
* When a field starts at some bit offset within a byte you need to load
   starting from that byte and shift, not starting from the next byte,
   so a rounded-down divide is required here, not a rounded-up one.
 * Remove paragraph from doc that no longer relates to anything.

Closes #12363
2022-10-15 14:19:40 -04:00
Jacob Young
c7f9833238 Module: fix early exit conditions during compilation
* `--verbose-llvm-ir` should trigger analysis and codegen
 * `-femit-asm` etc should trigger codegen even with `-fno-emit-bin`

Closes #12588
2022-10-15 14:18:35 -04:00
Jacob Young
cb0e22db4e llvm: fix lowering of runtime refs to comptime-only decls
When we want a runtime pointer to a zero-bit value we use an undef
pointer, but what if we want a runtime pointer to a comptime-only value?
Normally, if `T` is a comptime-only type such as `*const comptime_int`,
then `*const T` would also be a comptime-only type, so anything
referencing a comptime-only value is usually also comptime-only, and
therefore not emitted to the executable.

However, what if instead we have a `*const anyopaque` pointing to a
comptime-only value?  Certainly, `*const anyopaque` is a runtime type,
and so we need some runtime value to store, even when it happens to be
pointing to a comptime-only value.  In this case we want to do the same
thing as we do when pointing to a zero-bit value, so we use
`hasRuntimeBits` to handle both cases instead of ignoring comptime.

Closes #12025
2022-10-15 14:17:25 -04:00
Guillaume Wenzek
ac1f17f63f disable sema.addConstant 2022-10-15 10:39:19 -07:00
Guillaume Wenzek
577f0aa54b addrSpaceCastIsValid nvptx 2022-10-15 10:39:19 -07:00
Guillaume Wenzek
aad983cf40 sanitize qualified name for nvptx backend 2022-10-15 10:39:19 -07:00
Guillaume Wenzek
92a857b76c debug 2022-10-15 10:39:19 -07:00
Guillaume Wenzek
004fca2c64 restore comp when leaving flushModule 2022-10-15 10:39:19 -07:00
Guillaume Wenzek
b3dc80a1e3 disable debug info for ptx<7.5 2022-10-15 10:39:19 -07:00
Guillaume Wenzek
85c6b0f0bc allow ptx kernel export 2022-10-15 10:39:19 -07:00
Andrew Kelley
66d6183001 Merge branch 'amdgpu-improvements' of https://github.com/Snektron/zig into Snektron-amdgpu-improvements 2022-10-15 10:36:10 -07:00
Andrew Kelley
16cc65242f
Merge pull request #12918 from jacobly0/math-cast-comptime-int
std.math: fix behavior relating to comptime_int arguments
2022-10-15 12:11:55 -04:00
Jacob Young
400319872b llvm: fix bug lowering aggregate_init with a byref sentinel
Closes #12972
2022-10-15 11:12:04 -04:00
Andrew Kelley
b4e3424594
Merge pull request #13100 from topolarity/powerpc64le
stage2: Fix softfloat support for PPC64(LE)
2022-10-15 10:05:00 -04:00
Cody Tapscott
a168893e00 stage1: Fix ppcle long double size
Resolves #13110
2022-10-14 13:35:10 -07:00
Evan Haas
e4e1c21e1f i386 ABI: Fix some sizes and alignments
This makes the following changes for i386:

long long and unsigned long long have 4 byte alignment on non-Windows

f64 (double) has 4-byte alignment on non-Windows

long double is 80 bits and has 4 byte alignment on mingw

long double on android is 64 bits, not 80: https://www.uclibc.org/docs/psABI-i386.pdf

Fixes #12453
Fixes #12987
2022-10-14 15:22:00 -04:00
Jacob Young
9b45dc1608 stage2: fix emitting asm and bin at the same time
This logic is copied from stage1.

Fixes #12800
2022-10-14 14:46:50 -04:00
Cody Tapscott
46fb730712 stage2: Use softfloat for f16 on MIPS targets 2022-10-13 12:53:20 -07:00
Cody Tapscott
db9058e41a Disable llvm.prefetch for PowerPC
This instruction is not supported on this backend, so should
just be a noop.
2022-10-13 12:53:20 -07:00
Cody Tapscott
6e6ae8886e stage1: Add softfloat support for @reduce 2022-10-13 12:53:20 -07:00
Cody Tapscott
f0d12dd82b stage2: Add softfloat support for @reduce 2022-10-13 12:53:20 -07:00
Cody Tapscott
b992ea1b07 stage1: Rely on softfloat for f16 on non-arm targets 2022-10-13 12:53:20 -07:00
Cody Tapscott
37c6fcafa2 stage2 LLVM: Correct long double for WASM
Also, f16 is not supported on this backend.
2022-10-13 12:53:20 -07:00
Cody Tapscott
aedafb20cf stage2: Fix softfloat support for PPC64(LE)
Stage 2's softfloat support still had a couple of gaps, which were
preventing us from lowering `f16` on this target. With any luck,
this is enough to get PPC64 working as a Tier 2 target again.
2022-10-13 12:53:20 -07:00
cod1r
6af0eeb58d adding static and dynamic ZigEquivalent enums so that we can branch to set link_mode properly when we iterate over the clang arguments. also replaced dynamic flag in clang_options_data.zig with proper definition similarly to static. 2022-10-13 13:12:17 +02:00
kkHAIKE
d987bf859e Sema: add float128IntPartToBigInt to fix compare comptime float with int 2022-10-13 13:11:13 +02:00
Jacob Young
02d7292a8c build.zig: Forward LLVM lib/include dirs from CMake
Previously, you might obtain `-lLLVM-15` from the CMake configuration,
but we might not be able to locate the library if it's not in your
system library path.
2022-10-12 18:11:46 -04:00
Robin Voetter
e90a42a808
stage2: improve globals with address spaces a little 2022-10-12 20:36:15 +02:00
Robin Voetter
ad74773959
make addrSpaceCast work with optionals; forbid ptrCast'ing address spaces 2022-10-12 20:36:15 +02:00
Robin Voetter
8894d1c45e
stage2: f128 improvements for targets that do not support it 2022-10-12 20:36:14 +02:00
Robin Voetter
76ad9cb10e
backport @addrSpaceCast to stage 1 2022-10-12 20:36:14 +02:00
Robin Voetter
9f14681473
stage2: check address space cast validity 2022-10-12 20:36:14 +02:00
Robin Voetter
5d429b03e3
stage2: add @addrSpaceCast builtin 2022-10-12 20:36:12 +02:00
Robin Voetter
5f3b91437f
stage2: improve addrspace handling
This commit changes the way Zig is intended to deal with variable
declaration for exotic targets. Where previously the idea was to
enfore local/global variables to be placed into their respective
address spaces, depending on the target, this is now fixed to the
generic address space.

To facilitate this for targets where local variables _must_ be
generated into a specific address space (ex. amdgcn where locals
must be generated into the private address space), the variable
allocations (alloca) are generated into the right address space
and then addrspace-casted back to the generic address space. While this
could be less efficient in theory, LLVM will hopefull deal with figuring
out the actual correct address space for a pointer for us. HIP seems to
do the same thing in this regard.

Global variables are handled in a similar way.
2022-10-12 20:34:42 +02:00
Robin Voetter
3392de87dc
allow global/local/shared address spaces on amdgcn 2022-10-12 20:34:41 +02:00
Robin Voetter
d638b2e29f
stage 2: grammar 2022-10-12 20:34:41 +02:00
Robin Voetter
6b69dcfdd2
amdgpu: add AmdgpuKernel calling convention 2022-10-12 20:34:41 +02:00
Robin Voetter
5dd3d17c20
amdgpu: add amdhsa/amdpal ctype abi sizes 2022-10-12 20:34:40 +02:00
Michael Dusan
0b47e69b7c improve header searchlist handling in build, main
build.zig:
- use "-I" instead of "-isystem" for `b.addSearchPrefix()`

main.zig:
- silently ignore superfluous search dirs
- warn when a dir is added to multiple searchlists
- consolidate "expected paramter after {s}" fatal error messages
- rename command-line switch `-dirafter` → `-idirafter`

closes #12888
2022-10-12 13:50:25 -04:00
Veikka Tuominen
260b0ff7c5 Sema: add reference trace before checking for cached value
Closes #13143
2022-10-12 18:57:31 +03:00
jacobly0
562ac8be48
codegen: add support for lowering .field_ptr on a slice
Closes #13068
2022-10-12 12:40:59 +03:00
Andrew Kelley
7ce1ee1bce
Merge pull request #13081 from r00ster91/docs
fix(text): hyphenation and other fixes
2022-10-12 05:26:11 -04:00
Ryan Liptak
bec40a89c2 Windows: Fix stage1.zig's main failing to receive non-ASCII args
Closes #10506
2022-10-12 05:21:48 -04:00
Luuk de Gram
1f196b9e2f
stage2: implement exporting using field access (#13136)
This implements `@export(a.b, .{..});` in semantic analysis,
allowing users to directly export a variable from a namespace.

* add test case for exporting using field access
2022-10-12 04:38:07 -04:00
Andrew Kelley
a3c9c154b4
Merge pull request #13089 from ziglang/update-mingw 2022-10-12 03:17:52 -04:00
Cody Tapscott
e6ebdcb82e stage2 LLVM: Use a packed aggregate for union payload init
Without the packed qualifier, the type layout that we use to
initialize doesn't match the correct layout of the underlying
storage, causing corrupted data and past-the-end writes.
2022-10-11 15:42:01 -04:00
Veikka Tuominen
a72b584c76
Merge pull request #13126 from tau-dev/master
translate-c: Fix function pointers, add cast to subscripts in macros
2022-10-11 19:04:44 +02:00
Ali Chraghi
d086b371f0 Compilation: strip debug info from ReleaseSmall by default 2022-10-11 17:51:25 +02:00
Andrew Kelley
b020d83265 mingw-w64: pass -D__USE_MINGW_ANSI_STDIO=0 for crt files
Thanks to Martin Storsjö for explaining this to me on IRC:

__USE_MINGW_ANSI_STDIO redirects stdio functions towards mingw-w64
reimplementations of them (since msvcrt.dll lacks lots of things). For
x86 with "long double", this is also needed to get long doubles
formatted properly. It's enabled by default by headers when building in
C99 mode, unless you're targeting UCRT. The headers normally enable this
automatically - or you can request it enabled with
-D__USE_MINGW_ANSI_STDIO=1. However, the mingw-w64-crt files are
expected to be built with this explicitly turned off. Since there's a
half dozen various ways of configuring the CRT and various features, the
mingw-w64-crt files specifically need to be built in a very hardcoded
configuration, which is different from how end user source files are
compiled.

This commit removes a patch that we were carrying previously.

See #7356
2022-10-11 01:59:39 -07:00