265 Commits

Author SHA1 Message Date
joachimschmidt557
a06e9eca45
stage2 AArch64: add more slice support
* airSlice
* airArrayToSlice
* and initial support for airSlicePtr and co
2022-03-05 11:31:51 +01:00
joachimschmidt557
d486a7b811 stage2 ARM: generate less no-op branches
The checks detecting such no-op branches (essentially instructions
that branch to the instruction immediately following the branch) were
tightened to catch more of these occurrences.
2022-03-04 23:28:14 +01:00
Mitchell Hashimoto
b96d5fd71f
stage2: peer resolve const array pointer to unknown ptr 2022-03-03 11:08:14 -08:00
Mitchell Hashimoto
0924f17a23
stage2: peer resolve const u8 slices correctly 2022-03-03 11:04:04 -08:00
Andrew Kelley
1c8a86f063 Sema: detect comptime-known union initializations
Follow a similar pattern as we already do for validate_array_init and
validate_struct_init.

I threw in a bit of behavior test cleanup on top of it.
2022-03-02 17:28:39 -07:00
Jakub Konka
77072d1a17 x64: fix bug in lowering optionals directly to immediate 2022-03-02 17:40:37 +01:00
Jakub Konka
c9d1db7e8e x64: fix incorrect calc of rdi spill stack loc for backpatching 2022-03-02 14:53:02 +01:00
Jakub Konka
350bf9db13 x64: fix intCast to properly clear out dest register 2022-03-02 14:34:43 +01:00
Jakub Konka
d35cae551e x64: rectify and add missing optionals bits
Includes changes/additions to:
* `wrap_optional`
* `optional_payload`
* `isNull` helper
2022-03-02 14:05:29 +01:00
Jakub Konka
52205a3c16 x64: fix array to slice impl 2022-03-01 17:59:39 +01:00
Jakub Konka
ec54ceee6d
Merge pull request #11016 from ziglang/x64-more-codegen 2022-03-01 09:14:23 +01:00
Andrew Kelley
4763fd1a41 Sema: clean up peer resolution of errors
* Fix compile error for `zirErrorUnionType`.
 * Convert zirMergeErrorSets logic to call `Type.errorSetMerge`.
   It does not need to create a Decl as the TODO comment hinted.
 * Extract out a function called `resolveInferredErrorSetTy`.
 * Rework `resolvePeerTypes` with respect to error unions and
   error sets. This is a less complex implementation that passes all the
   same tests and uses many fewer lines of code by taking advantage of
   the function `coerceInMemoryAllowedErrorSets`.
   - Always merge error sets in the order that makes sense, even when
     that means `@typeInfo` incompatibility with stage1.
 * `Type.errorSetMerge` no longer overallocates.
 * Don't skip passing tests.
2022-02-28 23:15:58 -07:00
Mitchell Hashimoto
ea00e50045 stage2: skip error union test on native 2022-02-28 20:42:13 -07:00
Mitchell Hashimoto
0eb3cb9e8c stage2: order of error set merging should match stage1 2022-02-28 20:42:13 -07:00
Mitchell Hashimoto
6dae1de017 skip tests on native backends 2022-02-28 20:42:13 -07:00
Mitchell Hashimoto
b4ce855788 stage2: error union and non-error set/union peer cast resolution 2022-02-28 20:42:13 -07:00
Mitchell Hashimoto
38aae2cb7c stage2: peer resolve error sets and unions, add more tests 2022-02-28 20:42:13 -07:00
Jakub Konka
cfbc3537ef x64: pass more behavior tests 2022-02-28 23:20:05 +01:00
Mitchell Hashimoto
a7ca40b281 stage2: sentinel comp during peer type resolution should use elem type
We were using the array type, not the element type. Also, we should do
the sentinel comparison after we verify that the element types of both
are compatible.
2022-02-28 16:27:16 -05:00
joachimschmidt557
1bf8da19e1
stage2 ARM: implement slice and array_to_slice 2022-02-27 21:38:56 +01:00
joachimschmidt557
91fbcf7093
stage2 ARM: enable more behavior tests 2022-02-27 21:38:56 +01:00
Andrew Kelley
e81b21a0ea
Merge pull request #10992 from mitchellh/peer-slices
stage2: peer resolve *[N]T to []T and E![]T and [*]T, handle in-memory coercion
2022-02-26 18:49:44 -05:00
Mitchell Hashimoto
156316bc7c
stage2: skip more tests for native backends 2022-02-26 13:56:50 -08:00
Veikka Tuominen
ee149aaa03 stage2: actually coerce in coerce_result_ptr at comptime 2022-02-26 12:51:23 -07:00
Mitchell Hashimoto
f0232fc07d
stage2: split up the big sentinel peer cast test to multiple
This way we can fix them one at a time.
2022-02-25 18:56:27 -08:00
Mitchell Hashimoto
943ee59bb1
stage2: *[N]T to [*]T (and vice versa) 2022-02-25 17:29:50 -08:00
Mitchell Hashimoto
e442f88b76
stage2: add other backend skips until they determine they pass 2022-02-25 17:03:49 -08:00
Mitchell Hashimoto
bcf3eb5663
stage2: another passing test 2022-02-25 13:35:36 -08:00
Mitchell Hashimoto
1019181982
stage2: *[N]T and E![]T 2022-02-25 13:33:11 -08:00
Mitchell Hashimoto
65c0475970 stage2: peer type resolution *[N]T and *[M]T to []const T 2022-02-24 08:50:26 +02:00
joachimschmidt557
f91fe9afb9
stage2 AArch64: more support for MCValue.got_load and direct_load 2022-02-23 21:58:13 +01:00
joachimschmidt557
25f73224f7
stage2 AArch64: pass a few more behavior tests 2022-02-21 23:05:16 +01:00
joachimschmidt557
2ba1ef165a
stage2 AArch64: implement genSetReg for ptr_stack_offset 2022-02-21 22:54:14 +01:00
Jakub Konka
3193cc1c1e x64: fix ptr_add and ptr_sub
Add standalone implementation of operand reuse for ptr related
arithmetic operations of add and sub.
2022-02-17 15:07:42 +01:00
Jakub Konka
9c82f3ae6f stage2: disable failing aarch64-macos behavior tests 2022-02-15 21:04:36 +01:00
joachimschmidt557
22895f5616
stage2 AArch64: Enable behavior testing 2022-02-14 22:33:01 +01:00
Andrew Kelley
c349191b75 organize behavior tests
moving towards disabling failing tests on an individual basis
2022-02-12 21:13:07 -07:00
joachimschmidt557
6b0c950cb8
stage2 ARM: support all integer types in genTypedValue 2022-02-08 21:02:50 +01:00
Jakub Konka
5944e89016 stage2: lower unnamed constants in Elf and MachO
* link: add a virtual function `lowerUnnamedConsts`, similar to
  `updateFunc` or `updateDecl` which needs to be implemented by the
  linker backend in order to be used with the `CodeGen` code
* elf: implement `lowerUnnamedConsts` specialization where we
  lower unnamed constants to `.rodata` section. We keep track of the
  atoms encompassing the lowered unnamed consts in a global table
  indexed by parent `Decl`. When the `Decl` is updated or destroyed,
  we clear the unnamed consts referenced within the `Decl`.
* macho: implement `lowerUnnamedConsts` specialization where we
  lower unnamed constants to `__TEXT,__const` section. We keep track of the
  atoms encompassing the lowered unnamed consts in a global table
  indexed by parent `Decl`. When the `Decl` is updated or destroyed,
  we clear the unnamed consts referenced within the `Decl`.
* x64: change `MCValue.linker_sym_index` into two `MCValue`s: `.got_load` and
  `.direct_load`. The former signifies to the emitter that it should
  emit a GOT load relocation, while the latter that it should emit
  a direct load (`SIGNED`) relocation.
* x64: lower `struct` instantiations
2022-02-07 08:39:00 +01:00
Jakub Konka
09e69c8c77 x86_64: start moving to new regalloc freeze API 2022-02-02 10:48:21 +01:00
Andrew Kelley
2c9a5e791b organize behavior tests
Every test that is moved in this commit has been checked to see if it is
now passing.
2022-01-26 00:36:12 -07:00
Andrew Kelley
ef7eff3939 Sema: coercion of pointers to C pointers 2022-01-25 14:53:41 -07:00
Jakub Konka
8c233687b4 stage2: partially implement intcast on x86_64
* fix violating encoding invariant for memory encoding
* enable some cast tests for x86_64 and arm
2022-01-18 13:18:59 +01:00
Andrew Kelley
4d05f2ae5f remove zig_is_stage2 from @import("builtin")
Instead use the standarized option for communicating the
zig compiler backend at comptime, which is `zig_backend`. This was
introduced in commit 1c24ef0d0b09a12a1fe98056f2fc04de78a82df3.
2022-01-17 21:55:49 -07:00
Luuk de Gram
e7b7088056
wasm: Implement float_to_int
- This implements the float_to_int AIR instruction.
- Lowering a decl_ref to a slice was previously assumed to contain a pointer
to a slice, rather than an array. This is now fixed, making `@src()` work as well.
- Some preliminary work on 128bit integers have been done to find out what needs to be done
to implement 128bit arithmetic.
2022-01-10 21:01:00 +01:00
Meghan
c08b190c69
lint: duplicate import (#10519) 2022-01-07 00:06:06 -05:00
Andrew Kelley
b4d6e85a33 Sema: implement peer type resolution of signed and unsigned ints
This allows stage2 to build more of compiler-rt.

I also changed `-%` to `-` for comptime ints in the div and mul
implementations of compiler-rt. This is clearer code and also happens to
work around a bug in stage2.
2022-01-02 14:11:37 -07:00
Robin Voetter
2b589d71fb stage2: move some tests which are now passing 2021-11-22 04:36:57 +01:00
Andrew Kelley
09588c795c stage2: LLVM backend: memset to 0xaa for undefined stores
Also support `one` and `int_big_positive` tags for const pointers.
2021-11-16 17:46:39 -07:00
Drew P
68fe391de0 typo 2021-11-16 16:51:31 -07:00