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Run update_cpu_features against LLVM 18.1.8

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- RISCV unaligned-scalar-mem was added in LLVM 18.1.6
- Fixes arm v9_5a confusion
This commit is contained in:
Ryan Liptak 2024-08-07 09:03:05 -07:00
parent cf2558e971
commit e912411fbe
2 changed files with 15 additions and 8 deletions
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17
lib/std/Target/arm.zig
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@ -86,6 +86,7 @@ pub const Feature = enum {
has_v9_2a,
has_v9_3a,
has_v9_4a,
has_v9_5a,
has_v9a,
hwdiv,
hwdiv_arm,
@ -754,6 +755,13 @@ pub const all_features = blk: {
.has_v9_3a,
}),
};
result[@intFromEnum(Feature.has_v9_5a)] = .{
.llvm_name = "v9.5a",
.description = "Support ARM v9.5a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v9_4a,
}),
};
result[@intFromEnum(Feature.has_v9a)] = .{
.llvm_name = "v9a",
.description = "Support ARM v9a instructions",
@ -1582,20 +1590,13 @@ pub const all_features = blk: {
.db,
.dsp,
.fp_armv8,
.has_v9_5a,
.mp,
.ras,
.trustzone,
.v9_5a,
.virtualization,
}),
};
result[@intFromEnum(Feature.v9_5a)] = .{
.llvm_name = "v9.5a",
.description = "Support ARM v9.5a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v9_4a,
}),
};
result[@intFromEnum(Feature.v9a)] = .{
.llvm_name = "armv9-a",
.description = "ARMv9a architecture",

6
lib/std/Target/riscv.zig
View File

@ -78,6 +78,7 @@ pub const Feature = enum {
svnapot,
svpbmt,
tagged_globals,
unaligned_scalar_mem,
use_postra_scheduler,
v,
ventana_veyron,
@ -584,6 +585,11 @@ pub const all_features = blk: {
.description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.unaligned_scalar_mem)] = .{
.llvm_name = "unaligned-scalar-mem",
.description = "Has reasonably performant unaligned scalar loads and stores",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.use_postra_scheduler)] = .{
.llvm_name = "use-postra-scheduler",
.description = "Schedule again after register allocation",